M54HC165D [STMICROELECTRONICS]
RAD-HARD 8 BIT PISO SHIFT REGISTER; RAD - HARD 8位PISO移位寄存器
| 型号： | M54HC165D |
| 厂家： | 
ST |
| 描述： | RAD-HARD 8 BIT PISO SHIFT REGISTER |
| 文件： | 总12页 (文件大小：321K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M54HC165
RAD-HARD 8 BIT PISO SHIFT REGISTER
■
■
■
■
■
■
■
HIGH SPEED:
= 15ns (TYP.) at V
t
= 6V
CC
PD
LOW POWER DISSIPATION:
=4µA(MAX.) at T =25°C
I
CC
A
HIGH NOISE IMMUNITY:
= V = 28% V (MIN.)
V
NIH
NIL
CC
DILC-16
FPC-16
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 4mA (MIN)
OH
OL
BALANCED PROPAGATION DELAYS:
t
t
ORDER CODES
PACKAGE
PLH
PHL
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
FM
EM
V
CC
DILC
FPC
M54HC165D
M54HC165K
M54HC165D1
M54HC165K1
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 165
■
■
SPACE GRADE-1: ESA SCC QUALIFIED
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
when the shift/load input is low. The parallel data
can change while shift/load is low, provided that
the recommended set-up and hold times are
observed. For clocked operation, shift/load must
be high. The two clock input perform identically;
one can be used as a clock inhibit by applying a
high signal; to permit this operation clocking is
accomplished through a 2 input nor gate.
■
■
DEVICE FULLY COMPLIANT WITH
SCC-9306-042
DESCRIPTION
To avoid double clocking, however, the inhibit
signal should only go high while the clock is high.
Otherwise the rising inhibit signal will cause the
same response as rising clock edge.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
The M54HC165 is an high speed CMOS 8 BIT
PISO SHIFT REGISTER fabricated with silicon
gate C MOS technology.
This device contains eight clocked master slave
RS flip-flops connected as a shift register, with
2
auxiliary
gating
to
provide
over-riding
asynchronous parallel entry. Parallel data enters
PIN CONNECTION
March 2004
1/12
M54HC165
IEC LOGIC SYMBOLS
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN N°
SYMBOL
NAME AND FUNCTION
1
2
7
SHIFT/LOAD Data Inputs
QH
QH
Complementary Output
Serial Output
Clock Input (LOW to
HIGH, Edge Triggered
9
CLOCK
SI
10
Serial Data Inputs
11, 12, 13,
14, 3, 4, 5, 6
A to H
Parallel Data Inputs
15
8
CLOCK INH Clock Inhibit
GND
Ground (0V)
V
16
Positive Supply Voltage
CC
TRUTH TABLE
INPUTS
INTERNAL OUTPUTS
OUTPUTS
QH
SHIFT /
LOAD
CLOCK INH
CLOCK
SI
A..........H
QA
QB
L
X
L
L
X
X
H
L
a..........h
a
H
L
b
h
H
H
H
H
X
X
X
X
QAn
QAn
QAn
QAn
QGn
QGn
QGn
QGn
L
L
H
L
H
L
H
H
X
H
H
X
X
X
X
X
NO CHANGE
NO CHANGE
a........h : The level of steady input voltage at inputs a through respectively
QAn - QGn : The level of QA - QG, respectively. before the most-recent transition of the clock
2/12
M54HC165
LOGIC DIAGRAM
TIMING CHART
3/12
M54HC165
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V + 0.5
I
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
± 20
± 20
mA
mA
mA
mA
mW
°C
IK
I
OK
I
± 25
O
I
or I
DC V
or Ground Current
CC
± 50
CC
GND
P
Power Dissipation
300
D
T
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
265
stg
T
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 6
0 to V
V
V
CC
V
Input Voltage
I
CC
V
Output Voltage
0 to V
CC
V
O
T
Operating Temperature
Input Rise and Fall Time
-55 to 125
0 to 1000
0 to 500
0 to 400
°C
ns
ns
ns
op
V
V
V
= 2.0V
= 4.5V
= 6.0V
CC
CC
CC
t , t
r
f
4/12
M54HC165
DC SPECIFICATIONS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
V
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
IH
V
V
V
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
IL
V
High Level Output
Voltage
I =-20 µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
OH
O
I =-20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
O
I =-20 µA
5.9
5.9
V
V
O
I =-4.0 mA
4.18 4.31
4.13
5.63
4.10
5.60
O
I =-5.2 mA
5.68
5.8
0.0
0.0
0.0
O
V
Low Level Output
Voltage
I =20 µA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
O
I =20 µA
O
I =20 µA
0.1
0.1
O
I =4.0 mA
0.17 0.26
0.18 0.26
0.33
0.33
0.40
0.40
O
I =5.2 mA
O
I
Input Leakage
Current
I
V = V or GND
6.0
6.0
± 0.1
± 1
± 1
µA
µA
I
CC
I
Quiescent Supply
Current
CC
V = V or GND
4
40
80
I
CC
5/12
M54HC165
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6ns)
L
r
f
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
t
t
Output Transition
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
30
8
75
15
95
19
110
22
TLH THL
ns
ns
7
13
16
19
t
t
t
Propagation Delay
Time
(CLOCK - QH, QH)
55
18
15
65
21
150
30
190
38
225
45
PLH PHL
26
33
38
t
Propagation Delay
Time
(SHIFT/LOAD -
165
33
205
41
250
PLH PHL
50
43
ns
6.0
18
28
35
QH, QH)
t
t
Propagation Delay
Time
(H - QH, QH)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
52
17
14
15
60
71
24
6
135
27
170
34
205
41
PLH PHL
ns
MHz
ns
23
29
35
f
Maximum Clock
Frequency
7.4
37
44
6.0
30
35
4.8
24
28
MAX
t
t
Minimum Pulse
Width
(CLOCK)
75
15
13
75
15
13
75
15
95
19
16
95
19
16
95
19
110
22
W(H)
W(L)
5
19
t
Minimum Pulse
Width
(SHIFT/LOAD)
32
8
110
22
W(L)
ns
7
19
t
Minimum Set-up
Time
(PI-SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD - CK)
24
6
110
22
s
ns
6.0
5
13
16
19
t
Minimum Hold
Time
(PI - SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD - CK)
2.0
4.5
0
0
0
0
0
0
h
ns
ns
6.0
0
0
0
t
Minimum Removal
Time
(CLOCK - CK INH)
2.0
4.5
6.0
20
5
75
15
13
95
19
16
110
22
REM
4
19
CAPACITIVE CHARACTERISTICS
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5.0
5
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
5.0
55
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
6/12
M54HC165
TEST CIRCUIT
C
R
= 50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
WAVEFORM 1: SERIAL MODE PROPAGATION DELAY (f=1MHz; 50% duty cycle)
7/12
M54HC165
WAVEFORM 2: PARALLEL MODE PROPAGATION DELAY (f=1MHz; 50% duty cycle)
WAVEFORM 3: MINIMUM PULSE WIDTH (S/L), PROPAGATION DELAY TIMES
(f=1MHz; 50% duty cycle)
8/12
M54HC165
WAVEFORM 4: SETUP AND HOLD TIME (PI TO S/L) (f=1MHz; 50% duty cycle)
WAVEFORM 5: MINIMUM REMOVAL TIME (CK INH TO CK) (f=1MHz; 50% duty cycle)
9/12
M54HC165
DILC-16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
a1
a2
B
2.1
3.00
0.63
1.82
0.40
0.20
20.06
7.36
2.71
3.70
1.14
2.39
0.50
0.30
20.58
7.87
0.083
0.118
0.025
0.072
0.016
0.008
0.790
0.290
0.107
0.146
0.045
0.094
0.020
0.012
0.810
0.310
0.88
0.035
b
0.45
0.254
20.32
7.62
0.018
0.010
0.800
0.300
0.100
0.700
0.310
0.295
b1
D
e
e1
e2
e3
F
2.54
17.65
7.62
7.29
17.78
7.87
17.90
8.12
7.70
3.83
12.1
1.5
0.695
0.300
0.287
0.705
0.320
0.303
0.151
0.476
0.059
7.49
I
K
10.90
1.14
0.429
0.045
L
0056437F
10/12
M54HC165
FPC-16 MECHANICAL DATA
mm.
inch
TYP.
0.272
DIM.
MIN.
6.75
9.76
1.49
0.102
8.76
TYP
6.91
9.94
MAX.
7.06
MIN.
0.266
0.384
0.059
0.004
0.345
MAX.
0.278
0.399
0.077
0.006
0.355
A
B
C
D
E
F
10.14
1.95
0.392
0.127
8.89
1.27
0.43
0.152
9.01
0.005
0.350
0.050
0.017
G
H
L
0.38
6.0
0.48
0.015
0.237
0.738
0.013
0.019
18.75
0.33
22.0
0.43
0.867
0.017
M
N
0.38
4.31
0.015
0.170
G
D
F
H
16
9
A
N
L
1
8
H
M
E
B
C
0016030E
11/12
M54HC165
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
12/12
相关型号：
M54HC165F1
HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CDIP16, FRIT SEALED, CERAMIC, DIP-16
STMICROELECTR
M54HC165F1R
HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16
STMICROELECTR
©2020 ICPDF网 联系我们和版权申明