M54HC390D [STMICROELECTRONICS]
HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP16, CERAMIC, DIP-16;
| 型号： | M54HC390D |
| 厂家： | 
ST |
| 描述： | HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP16, CERAMIC, DIP-16 CD 逻辑集成电路 触发器 |
| 文件： | 总13页 (文件大小：399K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M54HC390
RAD HARD DUAL DECADE COUNTER
■
■
■
■
■
■
■
■
HIGH SPEED :
= 79 MHz (TYP.) at V = 6V
f
MAX
CC
LOW POWER DISSIPATION:
=4µA(MAX.) at T =25°C
I
CC
A
HIGH NOISE IMMUNITY:
= V = 28% V (MIN.)
V
NIH
NIL
CC
DILC-16
FPC-16
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 4mA (MIN)
OH
OL
BALANCED PROPAGATION DELAYS:
ORDER CODES
PACKAGE
t
t
PLH
PHL
FM
EM
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
V
CC
DILC
FPC
M54HC390D
M54HC390K
M54HC390D1
M54HC390K1
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 390
DEVICE FULLY COMPLIANT WITH
SCC-9204-078
dual biquinary, or various combination up to a
single divide by 100 counter.
Each 4-bit counter is incremented on the high to
low transition (negative edge) of the clock input,
and each has an independent clear input. When
clear is set low all four bits of each counter are set
to low. This enables count truncation and allows
the implementation of divide by N counter
configuration.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
DESCRIPTION
The M54HC390 is an high speed CMOS DUAL
DECADE COUNTER fabricated with silicon gate
2
C MOS technology.
This dual decade counter contains two
independent ripple carry counters. Each counter is
composed of a divide by two and divide by five
counter. The divide by two and divide by five
counters can be cascaded to form dual decade,
PIN CONNECTION
Rev. 1
1/13
June 2004
M54HC390
Figure 1: IEC Logic Symbols
Figure 2: Input And Output Equivalent Circuit
Table 1: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
Clock Input Divide by 2
Section (HIGH to LOW
Edge-Triggered)
1 CLOCK A
2 CLOCK B
1, 15
1 CLEAR Asynchronous Master
2 CLEAR Reset Inputs
2, 14
3, 5, 6, 7
1QA to 1QD Flip Flop Outputs
Clock Input Divide by 5
1 CLOCK A
4, 12
Section (HIGH to LOW
2 CLOCK B
Edge-Triggered)
13, 11, 10, 9 2QA to 2QD Flip Flop Outputs
8
GND
Vcc
Ground (0V)
16
Positive Supply Voltage
2/13
M54HC390
Table 2: Truth Table
COUNT
OUTPUTS
BCD COUNT*
BI-QUINARY**
QD
QC
QB
QA
QA
QD
QC
QB
0
1
2
3
4
5
6
7
8
9
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
H
H
L
L
L
H
H
L
L
H
L
L
L
H
L
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
H
L
L
H
H
L
L
H
L
H
L
L
H
H
L
L
H
L
L
L
H
H
INPUTS
OUTPUTS
CLOCK A
CLOCK B
CLEAR
QA
QB
QC
QD
X
X
X
H
L
L
L
L
L
BINARY COUNT UP
QUINARY COUNT UP
X
L
* : Output QA is connected to input CLOCK B for BCD count.
** : Output QD is connected to input CLOCK A for bi-quinary count.
Figure 3: Block Diagram
3/13
M54HC390
Figure 4: Logic Diagram
This logic diagram has not be used to estimate propagation delays
4/13
M54HC390
Figure 5: Timing Chart
Table 3: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V + 0.5
I
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
± 20
± 20
mA
mA
mA
mA
mW
°C
IK
I
OK
I
± 25
O
I
or I
DC V or Ground Current
± 50
CC
GND
CC
P
Power Dissipation
300
D
T
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
265
stg
T
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
5/13
M54HC390
Table 4: Recommended Operating Conditions
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 6
0 to V
V
V
CC
V
Input Voltage
I
CC
V
Output Voltage
0 to V
CC
V
O
T
Operating Temperature
Input Rise and Fall Time
-55 to 125
0 to 1000
0 to 500
0 to 400
°C
ns
ns
ns
op
V
V
V
= 2.0V
= 4.5V
= 6.0V
CC
CC
CC
t , t
r
f
Table 5: DC Specifications
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
T = 25°C
Symbol
Parameter
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
IH
V
V
V
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
IL
V
High Level Output
Voltage
I =-20 µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
OH
O
I =-20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
O
I =-20 µA
5.9
5.9
V
V
O
I =-4.0 mA
4.18 4.31
4.13
5.63
4.10
5.60
O
I =-5.2 mA
5.68
5.8
0.0
0.0
0.0
O
V
Low Level Output
Voltage
I =20 µA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
O
I =20 µA
O
I =20 µA
0.1
0.1
O
I =4.0 mA
0.17 0.26
0.18 0.26
0.33
0.33
0.40
0.40
O
I =5.2 mA
O
I
Input Leakage
Current
I
V = V or GND
6.0
6.0
± 0.1
± 1
± 1
µA
µA
I
CC
I
Quiescent Supply
Current
CC
V = V or GND
4
40
80
I
CC
6/13
M54HC390
Table 6: AC Electrical Characteristics (C = 50 pF, Input t = t = 6ns)
L
r
f
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
V
CC
(V)
t
t
Output Transition
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
30
8
75
15
95
19
110
22
TLH THL
ns
ns
7
13
16
19
t
t
t
t
t
Propagation Delay
Time
(CLOCK A - QA)
42
14
12
45
15
13
108
36
31
72
24
20
45
15
13
17
65
79
17
67
79
24
6
120
24
150
30
180
36
PLH PHL
20
26
31
t
Propagation Delay
Time
(CLOCK A-QB,QD)
120
24
150
30
180
36
PLH PHL
ns
20
26
31
t
Propagation Delay
Time
(CLOCK A - QC)
280
56
350
70
420
84
PLH PHL
QA Connected to
CKB
ns
48
60
71
t
Propagation Delay
Time
(CLOCK B - QC)
185
37
230
46
280
56
PLH PHL
ns
31
39
48
t
Propagation Delay
Time (CLEAR - Qn)
125
25
155
31
190
38
PHL
ns
21
26
32
f
f
Maximum Clock
Frequency
(CLOCK A - QA)
8.4
42
50
8.4
42
50
6.8
34
40
6.8
34
40
5.6
28
33
5.6
28
33
MAX
MAX
MHz
MHz
ns
Maximum Clock
Frequency
(CLOCK B - QB)
t
t
Minimum Pulse
Width (CLOCK)
75
15
13
75
15
13
25
5
95
19
16
95
19
16
30
6
110
22
19
110
22
19
35
7
W(H)
t
W(L)
5
Minimum Pulse
Width (CLEAR)
24
6
W(H)
ns
5
t
Minimum Removal
Time
REM
ns
5
5
6
7/13
M54HC390
Table 7: Capacitive Characteristics
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
84
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
Figure 6: Test Circuit
C
R
= 50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
Figure 7: Waveform - Clock Waveform (f=1MHz; 50% duty cycle)
8/13
M54HC390
Figure 8: Waveform - Propagation Delay Times, Minimum Pulse Width And Removal Time
(f=1MHz; 50% duty cycle)
9/13
M54HC390
DILC-16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
a1
a2
B
2.1
3.00
0.63
1.82
0.40
0.20
20.06
7.36
2.71
3.70
1.14
2.39
0.50
0.30
20.58
7.87
0.083
0.118
0.025
0.072
0.016
0.008
0.790
0.290
0.107
0.146
0.045
0.094
0.020
0.012
0.810
0.310
0.88
0.035
b
0.45
0.254
20.32
7.62
0.018
0.010
0.800
0.300
0.100
0.700
0.310
0.295
b1
D
E
e
2.54
e1
e2
F
17.65
7.62
7.29
17.78
7.87
17.90
8.12
7.70
3.83
12.1
1.5
0.695
0.300
0.287
0.705
0.320
0.303
0.151
0.476
0.059
7.49
I
K
10.90
1.14
0.429
0.045
L
0056437F
10/13
M54HC390
FPC-16 MECHANICAL DATA
mm.
inch
TYP.
0.272
DIM.
MIN.
6.75
9.76
1.49
0.102
8.76
TYP
6.91
9.94
MAX.
7.06
MIN.
0.266
0.384
0.059
0.004
0.345
MAX.
0.278
0.399
0.077
0.006
0.355
A
B
C
D
E
F
10.14
1.95
0.392
0.127
8.89
1.27
0.43
0.152
9.01
0.005
0.350
0.050
0.017
G
H
L
0.38
6.0
0.48
0.015
0.237
0.738
0.013
0.019
18.75
0.33
22.0
0.43
0.867
0.017
M
N
0.38
4.31
0.015
0.170
G
D
F
H
16
9
A
N
L
1
8
H
M
E
B
C
0016030E
11/13
M54HC390
Table 8: Revision History
Date
Revision
Description of Changes
16-Jun-2004
1
First Release
12/13
M54HC390
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
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13/13
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