M74HC181TTR [STMICROELECTRONICS]
HC/UH SERIES, 4-BIT ARITHMETIC LOGIC UNIT, PDSO24, TSSOP-24;
| 型号： | M74HC181TTR |
| 厂家： | 
ST |
| 描述： | HC/UH SERIES, 4-BIT ARITHMETIC LOGIC UNIT, PDSO24, TSSOP-24 光电二极管 逻辑集成电路 |
| 文件： | 总15页 (文件大小：622K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M74HC181
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR
■
■
■
■
■
■
■
HIGH SPEED:
= 13 ns (TYP.) at V
t
= 6V
CC
PD
LOW POWER DISSIPATION:
= 4µA(MAX.) at T =25°C
I
CC
A
HIGH NOISE IMMUNITY:
= V = 28 % V (MIN.)
V
NIH
NIL
CC
DIP
SOP
TSSOP
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 4mA (MIN)
OH
OL
BALANCED PROPAGATION DELAYS:
t
t
ORDER CODES
PACKAGE
PLH
PHL
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
TUBE
T & R
V
CC
DIP
SOP
M74HC181B1R
M74HC181M1R
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 181
M74HC181RM13TR
M74HC181TTR
TSSOP
DESCRIPTION
The M74HC181 is an high speed CMOS
two cascade-outputs (pins 15 and 17) for the four
bits in the package. When used in conjunction with
the M74HC182, full carry look-ahead circuits, high
speed arithmetic operations can be performed.
These circuits will accommodate active-high or
active-low data, if the pin designations are
interpreted as shown below . Subtraction is
accomplished by 1,s complement addition where
1’s complement of the subtrahend is generated
internally. The resultant output is 1-B-1, which
requires an end around or forced carry to produce
A-B. The 181 can also be utilized as a comparator.
The A=B output is internally decoded from the
function outputs (F0, F1, F2, F3) so that when two
words of equal magnitude are applied at the A and
ARITHMETIC
LOGIC
UNIT/FUNCTION
GENERATOR fabricated with silicon gate
2
C MOS technology.
This circuit performs 16 binary arithmetic
operations on two 4-bit words as shown in tables 1
and 2. These operations are selected by the four
function select lines (S0, S1, S2, S3) and include
addition, subtraction, decrement and straight
transfer.
When
performing
arithmetic
manipulations, the internal carries must be
enabled by applying a low level voltage to the
mode control input (M). A full carry look-ahead
scheme is made available in these devices for
fast, simultaneous carry generation by means of
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2003
1/15
M74HC181
DESCRIPTION (Continued)
B inputs , it will assume a high level to indicated
equality (A=B). The ALU should be in the subtract
have been designed to not only incorporate all of
the designer’s requirements for arithmetic
operations, but also to provide 16 possible
function of two Boolean variables without the use
of external circuitry. These logic functions are
selected by use of the four function-select inputs
(S0, S1, S2, S3) with the mode - control (M) at a
high level to disable the internal carry.
mode with C = H when performing this
n
comparison. The A = B output is open drain so
that it can be wire-AND connected to give a
comparison for more that four bits. The carry
output (C + 4) can also be used to supply relative
n
magnitude information.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
Again, the ALU should be placed in the subtract
mode by placing the function select inputs S3, S2,
S1, S0 at L, H, H, L, respectively. These circuits
INPUT AND OUTPUT EQUIVALENT CIRCUITS
ONLY OUTPUT A = B
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
2, 23, 21, 19
1, 22, 20, 18
6, 5, 4, 3
7
A0 to A3
B0 to B3
S0 to S3
Word A Inputs
Word B Inputs
Function Select Inputs
Inv. Carry Input
C
n
8
M
F0 to F3
A = B
P
Mode Control Input
Function Outputs
9, 10, 11, 13
14
15
16
Comparator Output
Carry Propagate Output
Inv. Carry Output
C + 4
n
17
12
24
G
Carry Generate Output
Ground (0V)
GND
V
Positive Supply Voltage
CC
PIN NUMBER
2
1
23 22 21 20 19 18
9
10 11 13
7
16
C + 4
15 17
ACTIVE LOW DATA (Table 1)
ACTIVE HIGH DATA (Table 1)
A0 B0 A1 B1 A2 B2 A3 B3 F0 F1 F2 F3
A0 B0 A1 B1 A2 B2 A3 B3 F0 F1 F2 F3
C
C
P
X
G
Y
n
n
C + 4
n
n
INPUT C
INPUT C + 4
N
ACTIVE LOW DATA (FIGURE1)
ACTIVE HIGH DATA (FIGURE 2)
N
H
H
L
H
L
A > B
A < B
A > B
A < B
A < B
A > B
A < B
A > B
H
L
L
2/15
M74HC181
TRUTH TABLE 1
SELECTION
ACTIVE LOW DATA
M = L ARITHMETIC OPERATIONS
M = H LOGIC
FUNCTIONS
S3
S2
S1
S0
Cn = L (no carry)
Cn = H (with carry)
L
L
L
L
L
L
L
H
L
F = A
F = A minus 1
F = AB minus 1
F = AB minus 1
F = minus 1 (2’s Compl)
F = A plus (A + B)
F =AB plus (A + B)
F = A minus B minus 1
F = A + B
F = A
F = AB
F = A + B
F = 1
F = AB
F = (AB)
F = Zero
L
L
H
H
L
L
L
H
L
L
H
H
H
H
L
F = A + B
F = B
F = A plus (A + B) plus 1
F = AB plus (A + B) plus 1
F = A minus B
L
L
H
L
L
H
H
L
F = A
B
L
H
L
F = A + B
F = AB
F = (A + B) plus 1
H
H
H
H
H
H
H
H
F = A plus (A + B)
F = A plus B
F = A plus (A + B) plus 1
F = A plus B plus 1
F = AB plus (A + B) plus 1
F = (A + B) plus 1
L
L
H
L
F = A
F = B
B
L
H
H
L
F =AB plus (A + B)
F = A + B
L
H
L
F = A + B
F = 0
H
H
H
H
F = A plus A*
F = A plus A plus 1
F = AB plus A plus 1
F = AB plus A plus 1
F = A plus 1
L
H
L
F = AB
F = AB
F = A
F = AB plus A
F = AB plus A
F = A
H
H
H
* : Each bit is shifted to the next more significant position.
FIGURE 1
3/15
M74HC181
TRUTH TABLE 2
SELECTION
ACTIVE HIGH DATA
M = L ARITHMETIC OPERATIONS
M = H LOGIC
FUNCTIONS
S3
S2
S1
S0
Cn = H (no carry)
Cn = L (with carry)
L
L
L
L
L
L
L
H
L
F = A
F = A minus 1
F = A plus 1
F = A + B
F = AB
F = 0
F = A + B
F = (A + B) plus 1
F = (A + B) plus 1
F = Zero
L
L
H
H
L
F = A + B
L
L
H
L
F = minus 1 (2’s Compl)
F = A plus (AB)
F =A + B plus AB
F = A minus B minus 1
F = AB minus 1
F = A plus AB
L
H
H
H
H
L
F = AB
F = B
F = A plus AB plus 1
F = (A + B) plus (AB) plus 1
F = A minus B
L
L
H
L
L
H
H
L
F = A
B
L
H
L
F = AB
F = A + B
F = AB
H
H
H
H
H
H
H
H
F = A plus AB plus 1
F = A plus B plus 1
F = (A + B) plus AB plus 1
F = AB
L
L
H
L
F = A
B
F = A plus B
L
H
H
L
F = B
F = (A + B) plus AB
F = AB minus 1
F = A plus A*
L
H
L
F = AB
F = 1
H
H
H
H
F = A plus A plus 1
F = (A + B) plus A plus 1
F = (A + B) plus A plus 1
F = A
L
H
L
F = A + B
F = A + B
F = A
F = (A + B) plus A
F = (A + B) plus A
F = A minus 1
H
H
H
* : Each bit is shifted to the next more significant position.
FIGURE 2
4/15
M74HC181
LOGIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V + 0.5
I
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
± 20
± 20
mA
mA
mA
mA
mW
°C
IK
I
OK
I
± 25
O
I
or I
DC V
or Ground Current
CC
± 50
CC
GND
P
Power Dissipation
500(*)
-65 to +150
300
D
T
Storage Temperature
Lead Temperature (10 sec)
stg
T
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
5/15
M74HC181
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 6
0 to V
V
V
CC
V
Input Voltage
I
CC
V
Output Voltage
0 to V
CC
V
O
T
Operating Temperature
Input Rise and Fall Time
-55 to 125
0 to 1000
0 to 500
0 to 400
°C
ns
ns
ns
op
V
V
V
= 2.0V
= 4.5V
= 6.0V
CC
CC
CC
t , t
r
f
DC SPECIFICATIONS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
V
CC
(V)
V
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
IH
V
V
V
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
IL
V
High Level Output
Voltage
(except A = B
I =-20 µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
OH
O
I =-20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
O
I =-20 µA
5.9
5.9
V
V
output)
O
I =-4.0 mA
4.18 4.31
4.13
5.63
4.10
5.60
O
I =-5.2 mA
5.68
5.8
0.0
0.0
0.0
O
V
Low Level Output
Voltage
I =20 µA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
O
I =20 µA
O
I =20 µA
0.1
0.1
O
I =4.0 mA
0.17 0.26
0.18 0.26
0.33
0.33
0.40
0.40
O
I =5.2 mA
O
I
Input Leakage
Current
I
V = V
or GND
6.0
6.0
± 0.1
± 1
± 1
µA
µA
I
CC
CC
I
Quiescent Supply
Current
CC
V = V
or GND
4
40
80
I
6/15
M74HC181
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6ns)
L
r
f
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
V
CC
(V)
t
t
Output Transition
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
30
8
75
15
95
19
110
22
TLH THL
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
13
16
19
t
t
t
t
t
t
t
t
t
t
t
t
t
Propagation Delay
Time
(1)
54
16
13
90
26
20
97
27
21
80
23
18
81
24
19
80
23
18
80
23
18
80
23
18
95
27
21
95
27
21
86
24
18
92
27
27
120
24
150
30
170
45
PLH PHL
20
26
35
t
Propagation Delay
Time
(2)
215
43
270
54
300
65
PLH PHL
37
46
55
t
Propagation Delay
Time
(3)
215
43
270
54
300
65
PLH PHL
37
46
60
t
Propagation Delay
Time
(4)
180
36
225
45
250
60
PLH PHL
31
38
50
t
Propagation Delay
Time
(5)
190
38
240
48
260
60
PLH PHL
32
41
50
t
Propagation Delay
Time
(6)
180
36
225
45
240
55
PLH PHL
31
38
50
t
Propagation Delay
Time
(7)
170
34
215
43
230
50
PLH PHL
29
37
48
t
Propagation Delay
Time
(8)
170
34
215
43
230
56
PLH PHL
29
37
50
t
Propagation Delay
Time
(9)
220
44
275
55
290
65
PLH PHL
37
47
60
t
Propagation Delay
Time
(10)
220
44
275
55
285
70
PLH PHL
37
47
65
t
Propagation Delay
Time
(11)
200
40
250
50
260
65
PLH PHL
34
43
60
t
Propagation Delay
Time
(12)
210
42
265
53
280
60
PLH PHL
R = 1KΩ
L
36
45
55
7/15
M74HC181
CAPACITIVE CHARACTERISTICS
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
195
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
PROPAGATION DELAY TIME TEST CONDITIONS
Test No
(1)
INPUT
OUTPUT
C + 4
Test Conditions
C
n
n
(2)
Any A or B
Any A or B
C + 4
M=GND, S0=S3=Vcc, S1=S2=GND (SUM mode)
M=GND, S0=S3=GND, S1=S2=Vcc (DIFF mode)
M=GND (SUM or DIFF)
n
(3)
C + 4
n
(4)
C
Any F
n
(5)
(6)
Any A or B
Any A or B
Any A or B
Any A or B
Ai or Bi
G
G
M=GND, S0=S3=Vcc, S1=S2=GND (SUM mode)
M=GND, S0=S3=GND, S1=S2=Vcc (DIFF mode)
M=GND, S0=S3=Vcc, S1=S2=GND (SUM mode)
M=GND, S0=S3=GND, S1=S2=Vcc (DIFF mode)
M=GND, S0=S3=Vcc, S1=S2=GND (SUM mode)
M=GND, S0=S3=GND, S1=S2=Vcc (DIFF mode)
M = Vcc (Logic Mode)
(7)
F
(8)
F
(9)
Fi
(10)
(11)
(12)
Ai or Bi
Fi
Ai or Bi
Fi
Any A or B
A = B
M=GND, S0=S3=GND, S1=S2=Vcc (DIFF mode)
TEST CIRCUIT
C
R
= 50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
8/15
M74HC181
WAVEFORM : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
9/15
M74HC181
Plastic DIP-24 (0.25) MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
MIN.
MAX.
A
A1
A2
B
4.32
0.170
0.38
0.015
3.3
0.46
1.52
0.25
31.75
0.130
0.018
0.060
0.010
1.250
0.41
1.40
0.20
31.62
7.62
6.35
0.51
1.65
0.30
31.88
8.26
6.86
0.016
0.055
0.008
1.245
0.300
0.250
0.020
0.065
0.012
1.255
0.325
0.270
B1
c
D
E
E1
e
6.60
2.54
7.62
0.260
0.100
0.300
E1
L
3.18
0˚
3.43
15˚
0.125
0˚
0.135
15˚
M
E
E1
Stand-off
B
B1
e
e1
c
D
24
13
12
.015
0,38
Gage Plane
1
M
0034965/D
10/15
M74HC181
SO-24 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
2.65
0.2
MIN.
MAX.
0.104
0.008
0.096
0.019
0.012
A
a1
a2
b
0.1
0.004
2.45
0.49
0.32
0.35
0.23
0.014
0.009
b1
C
0.5
0.020
c1
D
45˚ (typ.)
15.20
10.00
15.60
10.65
0.598
0.393
0.614
0.419
E
e
1.27
0.050
0.550
e3
F
13.97
7.40
0.50
7.60
1.27
0.291
0.020
0.300
0.050
L
S
˚ (max.)
8
L
c1
b
e
s
e3
E
D
24
13
1
1
2
PO13T
11/15
M74HC181
TSSOP24 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.1
MIN.
MAX.
0.043
0.006
A
A1
A2
b
0.05
0.15
0.002
0.9
0.035
0.19
0.09
7.7
0.30
0.20
7.9
0.0075
0.0035
0.303
0.246
0.169
0.0118
0.0079
0.311
0.256
0.177
c
D
E
6.25
4.3
6.5
E1
e
4.5
0.65 BSC
0.0256 BSC
K
0˚
8˚
0˚
8˚
L
0.50
0.70
0.020
0.028
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
7047476A
12/15
M74HC181
Tape & Reel SO-24 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
11.0
15.9
3.1
1.197
0.433
0.626
0.122
0.161
0.476
Ao
Bo
Ko
Po
P
10.8
15.7
2.9
0.425
0.618
0.114
0.153
0.468
3.9
4.1
11.9
12.1
13/15
M74HC181
Tape & Reel TSSOP24 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
7
0.882
0.276
0.331
0.075
0.161
0.476
Ao
Bo
Ko
Po
P
6.8
8.2
0.268
0.323
0.067
0.153
0.468
8.4
1.9
4.1
12.1
1.7
3.9
11.9
14/15
M74HC181
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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