M74HC533M1R [STMICROELECTRONICS]
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC373 NON INVERTING - HC533 INVERTING; 八D型具有三态输出HC373非反相LATCH - HC533反转
| 型号： | M74HC533M1R |
| 厂家： | 
ST |
| 描述： | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC373 NON INVERTING - HC533 INVERTING |
| 文件： | 总13页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M54/74HC373
M54/74HC533
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT
HC373 NON INVERTING - HC533 INVERTING
.
.
.
.
.
.
.
.
HIGH SPEED
PD = 11 ns (TYP.) AT VCC = 5 V
LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY
t
V
NIH = VNIL = 28 % VCC (MIN.)
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
IOL = IOH = 6 mA (MIN.)
BALANCED PROPAGATION DELAYS
tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS373/533
ORDER CODES :
M54HCXXXF1R
M74HCXXXB1R
M74HCXXXM1R
M74HCXXXC1R
DESCRIPTION
The M54/74HC373/533 are high speed CMOS
OCTAL LATCH WITH 3-STATE OUTPUTS
fabricated with in silicon gate C2MOS technology.
of D input data. While the OE input is at low level,
the eight outputs will be in a normal logic state (high
or low logic level) and while high level the outpts will
be in a high impedance state.
These ICs achive the high speed operation similar
to equivalent LSTTL while maintaning the CMOS
low power dissipation.
The application designer has
a choise of
combination of inverting and non inverting outputs.
These 8 bit D-Type latches are controlled by a latch
enable input (LE) and a output enable input (OE).
The three state output configuration and the wide
choise of outline make bus organized system
simple.
While the LE input is held at a high level, the Q
outputs will follow the data input precisely or
inversely. When the LE is taken low, the Q outputs
will be latched precisely or inversely at the logic level
All inputs are equipped with protection circuits
against discharge and transient excess voltage.
PIN CONNECTION (top view)
HC373
HC533
HC373
HC533
October 1993
1/13
M54/M74HC373/533
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION (HC373)
PIN DESCRIPTION (HC533)
PIN No
SYMBOL
NAME AND FUNCTION
PIN No
SYMBOL
NAME AND FUNCTION
1
OE
3 State output Enable
Input (Active LOW)
1
OE
3 State output Enable
Input (Active LOW)
2, 5, 6, 9,
12, 15, 16,
19
Q0 to Q7
D0 to D7
3 State outputs
2, 5, 6, 9,
12, 15, 16,
19
Q0 to Q7
D0 to D7
3 State outputs
3, 4, 7, 8,
13, 14, 17,
18
Data Inputs
3, 4, 7, 8,
13, 14, 17,
18
Data Inputs
11
10
20
LE
Latch Enable Input
Ground (0V)
11
10
20
LE
GND
VCC
Latch Enable Input
Ground (0V)
GND
VCC
Positive Supply Voltage
Positive Supply Voltage
IEC LOGIC SYMBOLS
HC373
HC533
2/13
M54/M74HC373/533
TRUTH TABLE
INPUTS
OUTPUTS
Q (HC533)
Z
OE
H
L
LE
X
D
X
X
L
Q (HC373)
Z
L
NO CHANGE *
NO CHANGE *
L
H
H
L
H
L
L
H
H
X: DON’T CARE
Z: HIGH IMPEDANCE
*: Q/Q OUTPUTS ARE LATCHED AT THE TIME WHEN THE LE INPUT IS TAKEN LOW LOGIC LEVEL.
LOGIC DIAGRAMS
HC373
HC533
3/13
M54/M74HC373/533
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
VI
Parameter
Value
-0.5 to +7
-0.5 to VCC + 0.5
-0.5 to VCC + 0.5
± 20
Unit
V
Supply Voltage
DC Input Voltage
V
VO
DC Output Voltage
V
IIK
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin
mA
mA
mA
mA
mW
oC
IOK
± 20
IO
± 35
ICC or IGND DC VCC or Ground Current
± 70
PD
Tstg
TL
Power Dissipation
500 (*)
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
300
oC
Absolute Maximum Ratingsarethose values beyond whichdamage tothe devicemayoccur. Functional operation under theseconditions is not implied.
(*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VI
Parameter
Value
2 to 6
Unit
V
Supply Voltage
Input Voltage
0 to VCC
0 to VCC
V
VO
Output Voltage
V
Top
Operating Temperature:
M54HC Series
M74HC Series
-55 to +125
-40 to +85
oC
oC
tr, tf
Input Rise and Fall Time
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
0 to 1000
0 to 500
0 to 400
ns
4/13
M54/M74HC373/533
DC SPECIFICATIONS
Test Conditions
VCC
Value
-40 to 85 oC -55 to 125 oC
74HC 54HC
TA = 25 oC
54HC and 74HC
Symbol
Parameter
Unit
(V)
Min. Typ. Max. Min. Max. Min. Max.
VIH
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
VIL
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
VOH
High Level
Output Voltage
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
VI =
VIH
or
IO=-20 µA
V
V
5.9
5.9
VIL
IO=-6.0 mA 4.18 4.31
4.13
5.63
4.10
5.60
IO=-7.8 mA 5.68
5.8
0.0
0.0
0.0
VOL
Low Level Output 2.0
Voltage
0.1
0.1
0.1
0.1
0.1
0.1
0.1
VI =
VIH
or
IO= 20 µA
4.5
6.0
4.5
6.0
0.1
0.1
VIL
IO= 6.0 mA
IO= 7.8 mA
0.17 0.26
0.18 0.26
±0.1
0.33
0.33
±1
0.40
0.40
±1
II
Input Leakage
6.0
VI = VCC or GND
µA
µA
µA
Current
IOZ
ICC
3 State Output
Off State Current
6.0
VI = VIH or VIL
VO = VCC or GND
±0.5
±5.0
±10
Quiescent Supply 6.0 VI = VCC or GND
Current
4
40
80
5/13
M54/M74HC373/533
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Test Conditions
Value
TA = 25 oC
54HC and 74HC
-40 to 85 oC -55 to 125 oC
Symbol
Parameter
Unit
VCC CL
74HC
54HC
(V) (pF)
2.0
Min. Typ. Max. Min. Max. Min. Max.
tTLH
tTHL
Output Transition
Time
25
7
60
12
10
125
25
21
175
35
30
125
25
21
175
35
30
125
25
21
75
15
13
50
10
9
75
15
13
155
31
26
220
44
37
155
31
26
220
44
37
155
31
26
95
19
16
65
13
11
5
90
18
15
190
38
32
265
53
45
190
38
32
265
53
45
190
38
32
110
22
19
75
15
13
5
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
4.5
6.0
2.0
6
tPLH
tPHL
Propagation
Delay Time
(LE, D - Q, Q)
42
14
12
57
19
16
39
13
11
54
18
15
30
14
13
15
6
50
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
150
tPZL
tPZH
3 State Output
Enable Time
50 RL = 1 KΩ
150 RL = 1 KΩ
tPLZ
tPHZ
3 State Output
Disable Time
50 RL = 1 KΩ
tW(H)
Minimum Pulse
Width (LE)
50
50
50
6
ts
Minimum Set-up
Time
16
4
3
th
Minimum Hold
Time
5
5
5
5
5
5
5
CIN
Input Capacitance
5
10
10
10
pF
pF
COUT
Out put
Capacitance
10
CPD (*) Power Dissipation
Capacitance
38
pF
(*) CPD is defined as the value of the IC’sinternal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to TestCircuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/8 (per Flip Flop) and the
CPD when n pcs of Flip Flop operate, can be gained by following equation: CPD (TOTAL) = 22 + 16 x n [pF]
6/13
M54/M74HC373/533
SWITCHING CHARACTERISTICS TEST WAVEFORM
tPLH, tPHL, (D - Q, Q)
tPLH, tPHL (LE - Q, Q), ts, th, tW
tPLZ, tPZL
tPHZ, tPZH
The 1KΩ load resistors should be connected between
outputs and VCC line and the 50pF load capacitors
should be connected between outputsand GND line.
All inputs except OE input should be connected to VCC
line or GND line such that outputs will be in low logic
level while OE input is held low.
The 1KΩ load resistors and the 50pF load capacitors
should be connected between each output and GND
line.
All inputs except OE input should be connected to VCC
or GND line such that output will be in high logic level
while OE input is held low.
7/13
M54/M74HC373/533
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHINGCHARACTERISTICSTEST.
8/13
M54/M74HC373/533
Plastic DIP20 (0.25) MECHANICAL DATA
mm
inch
DIM.
MIN.
0.254
1.39
TYP.
MAX.
MIN.
0.010
0.055
TYP.
MAX.
a1
B
b
1.65
0.065
0.45
0.25
0.018
0.010
b1
D
E
e
25.4
1.000
8.5
2.54
22.86
0.335
0.100
0.900
e3
F
7.1
0.280
0.155
I
3.93
L
3.3
0.130
Z
1.34
0.053
P001J
9/13
M54/M74HC373/533
Ceramic DIP20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
25
MIN.
MAX.
0.984
0.307
A
B
D
7.8
3.3
0.130
0.900
E
e3
F
0.5
1.78
0.020
0.070
22.86
2.29
0.4
2.79
0.55
1.52
0.31
1.27
0.090
0.016
0.050
0.009
0.020
0.110
0.022
0.060
0.012
0.050
G
I
1.27
0.22
0.51
L
M
N1
P
4° (min.), 15° (max.)
7.9
8.13
5.71
0.311
0.320
0.225
Q
P057H
10/13
M54/M74HC373/533
SO20 MECHANICAL DATA
mm
inch
DIM.
MIN.
TYP.
MAX.
2.65
0.20
2.45
0.49
0.32
MIN.
TYP.
MAX.
0.104
0.007
0.096
0.019
0.012
A
a1
a2
b
0.10
0.004
0.35
0.23
0.013
0.009
b1
C
0.50
0.020
c1
D
45° (typ.)
12.60
10.00
13.00
10.65
0.496
0.393
0.512
0.419
E
e
1.27
0.050
0.450
e3
F
11.43
7.40
0.50
7.60
1.27
0.75
0.291
0.19
0.299
0.050
0.029
L
M
S
8° (max.)
P013L
11/13
M54/M74HC373/533
PLCC20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
10.03
9.04
MIN.
0.385
0.350
0.165
MAX.
0.395
0.356
0.180
A
B
9.78
8.89
4.2
D
4.57
d1
d2
E
2.54
0.56
0.100
0.022
7.37
8.38
0.290
0.330
0.004
e
1.27
5.08
0.38
0.050
0.200
0.015
e3
F
G
0.101
M
M1
1.27
1.14
0.050
0.045
P027A
12/13
M54/M74HC373/533
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
13/13
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