M74HC693RM13TR [STMICROELECTRONICS]
HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO20, SO-20;
| 型号： | M74HC693RM13TR |
| 厂家： | 
ST |
| 描述： | HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO20, SO-20 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总17页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M74HC693
4 BIT BINARY COUNTER/REGISTER (3-STATE)
■
■
■
■
HIGH SPEED:
= 53 MHz (TYP.) at V = 6V
f
MAX
CC
LOW POWER DISSIPATION:
= 4µA(MAX.) at T =25°C
I
CC
A
HIGH NOISE IMMUNITY:
= V = 28 % V (MIN.)
V
NIH
NIL
CC
DIP
SOP
TSSOP
T & R
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 6mA (MIN) for Q to Q OUTPUT
OH
OL
A
D
|I | = I = 4mA (MIN) for RCO OUTPUT
OH
OL
■
■
■
BALANCED PROPAGATION DELAYS:
ORDER CODES
PACKAGE
t
t
PLH
PHL
TUBE
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
DIP
SOP
M74HC693B1R
M74HC693M1R
V
CC
M74HC693RM13TR
M74HC693TTR
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 693
TSSOP
DESCRIPTION
The M74HC693 is an high speed CMOS
DECADE/COUNTER REGISTER (3 STATE)
QD. If the LOAD input (LOAD) is held ”L” DATA
input (A - D) are loaded into the internal counter at
positive edge of counter clock input (CCK). In the
counter mode, internal counter counts up at the
positive of the counter clock. If the counter clear
inputs (CCLR) is held ”L”, the internal counter is
cleared synchronously to the counter clock. The
internal counter’s outputs are stored in the output
register at the positive edge of the register clock
(RCK). If the register clear input (RCLR) is held ”L”
the register is cleared synchronously to register
clock.
2
fabricated with silicon gate C MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which offers high noise
immunity and stable output. This device
incorporates a synchronous counter, four bit
D-type register, and quadruple two-line to one-line
multiplexers with three-state outputs in a single 20
pin package. The counter can be programmed
from the data inputs and have enable P and
enable T inputs and a ripple carry output for easy
expansion. The register/counter select input, R/C,
selects the counter when low or the register when
high for the three state-outputs, QA, QB, QC, and
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
1/17
M74HC693
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
A to D
NAME AND FUNCTION
3 to 6
7, 14
Data Inputs
ENT, ENP Enable Inputs
QA to QD Data Outputs
15 to 18
1
CCLR
Counter Clear (Active
LOW)
2
11
8
CCK
R/C
Counter Clock
Counter/Register Select
RCLR
Register Clear (Active
LOW)
9
RCK
RCO
GND
Register Clock
19
10
20
Ripple Counter Output
Ground (0V)
V
Positive Supply Voltage
CC
TRUTH TABLE
INPUTS
OUTPUTS
QA QB QC QD
FUNCTION
CCLR LOAD ENP ENT CCK RCLR RCK
R/C
X
G
X
L
X
L
X
X
X
X
X
X
X
X
X
X
X
Z
L
Z
L
Z
L
Z
L
HIGH IMPEDANCE
CLEAR COUNTER
L
H
H
H
H
H
X
X
X
L
H
H
H
X
X
X
X
X
L
X
X
L
X
X
X
X
X
L
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
a
b
c
d
LOAD COUNTER
NO COUNT
NO CHANGE
NO CHANGE
COUNT UP
X
H
X
X
X
X
L
NO COUNT
H
X
X
X
X
L
COUNT UP
L
NO CHANGE
NO COUNT
X
X
X
H
H
H
L
L
L
L
CLEAR REGISTER
LOAD REGISTER
NO LOAD
H
H
a’
b’
c’
d’
NO CHANGE
X : Don’t Care
Z : High Impedance
a-d : The level of steady state inputs at inputs A through D respectively.
a’-d’ : The level of steady state outputs at internal counter outputs a’ through qd’ respectively
RCO = QA · QB · QC · QD · ENT
2/17
M74HC693
BLOCK DIAGRAM
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
3/17
M74HC693
TIMING CHART
4/17
M74HC693
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V
+ 0.5
I
O
IK
CC
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
-0.5 to V
+ 0.5
V
I
± 20
± 20
mA
mA
I
OK
DC Output Source Sink Current per Output PIN (RCO)
(QA to QD)
± 25
I
mA
O
± 35
I
or I
DC V
or Ground Current
CC
± 70
mA
mW
°C
CC
GND
P
Power Dissipation
500(*)
D
T
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
300
stg
T
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 6
0 to V
V
V
CC
V
Input Voltage
I
CC
V
Output Voltage
0 to V
CC
V
O
T
Operating Temperature
Input Rise and Fall Time
-55 to 125
0 to 1000
0 to 500
0 to 400
°C
ns
ns
ns
op
V
V
V
= 2.0V
= 4.5V
= 6.0V
CC
CC
CC
t , t
r
f
5/17
M74HC693
DC SPECIFICATIONS
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
IH
V
V
V
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
IL
V
High Level Output
Voltage (QA - QD)
I =-20 µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
OH
O
I =-20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
O
I =-20 µA
5.9
5.9
V
V
V
V
O
I =-6.0 mA
4.18 4.31
4.13
5.63
1.9
4.10
5.60
1.9
O
I =-7.8 mA
5.68
1.9
4.4
5.9
5.8
2.0
4.5
6.0
O
V
High Level Output
Voltage (RCO)
I =-20 µA
OH
O
I =-20 µA
4.4
4.4
O
I =-20 µA
5.9
5.9
O
I =-4.0 mA
4.18 4.31
4.13
5.63
4.10
5.60
O
I =-5.2 mA
5.68
5.8
0.0
0.0
0.0
O
V
V
Low Level Output
Voltage (QA - QD)
I =20 µA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
OL
O
I =20 µA
O
I =20 µA
0.1
0.1
O
I =6.0 mA
0.17 0.26
0.18 0.26
0.37
0.37
0.1
0.40
0.40
0.1
O
I =7.8 mA
O
Low Level Output
Voltage (RCO)
I =20 µA
0.0
0.0
0.0
0.1
0.1
0.1
O
I =20 µA
0.1
0.1
O
I =20 µA
0.1
0.1
O
I =4.0 mA
0.17 0.26
0.18 0.26
0.37
0.37
0.40
0.40
O
I =5.2 mA
O
I
Input Leakage
Current
I
V = V or GND
6.0
6.0
6.0
± 0.1
± 0.5
4
± 1
± 5
40
± 1
± 10
80
µA
µA
µA
I
CC
I
High Impedance
Output Leakage
Current
OZ
V = V or V
IL
I
IH
V
= V or GND
CC
O
I
Quiescent Supply
Current
CC
V = V or GND
I
CC
6/17
M74HC693
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6ns)
L
r
f
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T
= 25°C
Symbol
Parameter
A
V
C
L
(pF)
CC
(V)
t
t
t
Output Transition
Time (Q)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
25
7
60
12
75
15
90
19
TLH THL
50
ns
ns
6
10
13
15
t
Output Transition
Time (RCO)
30
8
75
95
115
23
TLH THL
50
50
15
19
7
13
16
20
t
t
Propagation Delay
Time
(CCK - Q)
82
26
22
95
30
26
86
27
23
99
31
26
65
21
18
59
18
15
72
22
19
36
12
10
12
45
53
48
15
13
61
19
17
32
15
13
28
7
205
41
255
51
310
62
PLH PHL
35
43
53
ns
235
47
295
59
255
71
150
50
40
50
60
t
t
Propagation Delay
Time
(RCK - Q)
210
42
265
53
315
63
PLH PHL
36
45
54
ns
ns
ns
240
48
300
60
360
72
150
50
41
51
61
t
t
Propagation Delay
Time
(CCK - RCO)
165
33
205
41
250
50
PLH PHL
28
35
43
t
t
Propagation Delay
Time
(R/C - Q)
145
29
180
36
220
44
PLH PHL
50
25
31
37
175
35
220
44
265
53
150
50
30
37
45
t
t
Propagation Delay
Time
(ENT - RCO)
100
20
125
25
150
30
PLH PHL
ns
MHz
ns
17
21
26
f
Maximum Clock
Frequency
4.4
22
26
3.6
18
21
3
MAX
50
15
18
t
t
t
High Impedance
Output Enable
Time
120
24
150
30
180
36
PZL PZH
R
R
R
= 1 KΩ
= 1 KΩ
= 1 KΩ
50
L
L
L
20
26
31
150
30
190
38
225
45
150
50
ns
26
32
38
t
High Impedance
Output Disable
Time
145
29
180
36
220
44
PLZ PHZ
ns
25
31
37
t
t
Minimum Pulse
Width (CCK, RCK)
75
95
110
22
W(L)
50
15
19
ns
W(H)
6
13
16
19
7/17
M74HC693
Test Condition
Value
T
= 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
C
L
CC
(V)
(pF)
Min. Typ. Max. Min. Max. Min. Max.
t
t
t
t
t
Minimum Set-up
Time (LOAD, ENT,
ENP)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
68
17
14
44
11
9
150
30
26
100
20
17
100
20
17
125
25
21
0
190
38
32
125
25
21
125
25
21
155
31
26
0
220
44
37
145
29
25
145
29
25
180
36
31
0
s
s
s
s
h
50
ns
ns
ns
ns
ns
Minimum Set-up
Time (A, B, C, D)
50
50
50
50
Minimum Set-up
Time (CCLR -
RCLR)
44
11
9
Minimum Set-up
Time (CCK - RCK)
48
12
10
Minimum Hold
Time
0
0
0
0
0
0
CAPACITIVE CHARACTERISTICS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
80
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
8/17
M74HC693
TEST CIRCUIT
TEST
SWITCH
Open
t
t
t
, t
PLH PHL
, t
V
CC
PZL PLZ
, t
GND
PZH PHZ
C
R
R
= 50pF/150pF or equivalent (includes jig and probe capacitance)
L
1
T
= 1KΩ or equivalent
= Z
of pulse generator (typically 50Ω)
OUT
WAVEFORM 1: INPUT WAVEFORM (f=1MHz; 50% duty cycle)
9/17
M74HC693
WAVEFORM 2 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
WAVEFORM 3 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
10/17
M74HC693
WAVEFORM 4 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
WAVEFORM 5 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
11/17
M74HC693
WAVEFORM 6 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
WAVEFORM 7 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
12/17
M74HC693
WAVEFORM 8 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
t
, t
t
,
PHZ tPZH
PLZ PZL
The 1KΩ load resistors sholud be connected
The 1KΩ load resistors and the 50pF load
capacitors should be connected between each
output and GND line.
between outputs and V line and the 50pF load
CC
capacitor should be connected between outputs
and GND line.
All inputs except G input should be connected to
All inputs except G input should be connected to
V
or GND line such that outputs will be in low
V
or GND line such that outputs will be in low
CC
CC
logic level while G input is held low.
logic level while G input is held low.
WAVEFORM 9 : (f=1MHz; 50% duty cycle)
13/17
M74HC693
Plastic DIP-20 (0.25) MECHANICAL DATA
mm.
TYP
inch
DIM.
MIN.
0.254
1.39
MAX.
MIN.
0.010
0.055
TYP.
MAX.
a1
B
b
1.65
0.065
0.45
0.25
0.018
0.010
b1
D
E
e
25.4
1.000
8.5
2.54
0.335
0.100
0.900
e3
F
22.86
7.1
0.280
0.155
I
3.93
L
3.3
0.130
Z
1.34
0.053
P001J
14/17
M74HC693
SO-20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
2.65
0.2
MIN.
TYP.
MAX.
0.104
0.008
0.096
0.019
0.012
A
a1
a2
b
0.1
0.004
2.45
0.49
0.32
0.35
0.23
0.014
0.009
b1
C
0.5
0.020
c1
D
45° (typ.)
12.60
10.00
13.00
10.65
0.496
0.393
0.512
0.419
E
e
1.27
0.050
0.450
e3
F
11.43
7.40
0.50
7.60
1.27
0.75
0.291
0.020
0.300
0.050
0.029
L
M
S
8° (max.)
PO13L
15/17
M74HC693
TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
1.2
MIN.
TYP.
MAX.
0.047
0.006
0.041
0.012
0.0089
0.260
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
6.6
0.002
0.031
0.007
0.004
0.252
0.244
0.169
0.004
0.039
1
0.19
0.09
6.4
c
D
6.5
6.4
0.256
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0°
8°
0°
8°
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
16/17
M74HC693
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may resultfrom
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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17/17
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