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PSD934F3-20MIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
Prototype PCB
Part No.:   PSD934F3-20MIT
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Description:   Flash In-System Programmable ISP Peripherals For 8-bit MCUs
File Size :   1732 K    
Page : 110 Pages
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Maker   STMICROELECTRONICS [ STMICROELECTRONICS ]http://www.st.com
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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
SUMMARY DESCRIPTION
The PSD8XXFX family of memory systems for mi-
crocontrollers (MCUs) brings In-System-Program-
mability (ISP) to Flash memory and programmable
logic. The result is a simple and flexible solution for
embedded designs. PSD devices combine many
of the peripheral functions found in MCU based
applications.
Table
1
summarizes all the devices in the
PSD834F2, PSD853F2, PSD854F2.
The CPLD in the PSD devices features an opti-
mized macrocell logic architecture. The PSD mac-
rocell was created to address the unique
requirements of embedded system designs. It al-
lows direct connection between the system ad-
dress/data bus, and the internal PSD registers, to
simplify communication between the MCU and
other supporting devices.
The PSD device includes a JTAG Serial Program-
ming interface, to allow In-System Programming
(ISP) of the
entire device.
This feature reduces de-
velopment time, simplifies the manufacturing flow,
and dramatically lowers the cost of field upgrades.
Using ST’s special Fast-JTAG programming, a de-
sign can be rapidly programmed into the PSD in as
little as seven seconds.
The innovative PSD8XXFX family solves key
problems faced by designers when managing dis-
crete Flash memory devices, such as:
– First-time In-System Programming (ISP)
– Complex address decoding
– Simultaneous read and write to the device.
The JTAG Serial Interface block allows In-System
Programming (ISP), and eliminates the need for
an external Boot EPROM, or an external program-
mer. To simplify Flash memory updates, program
execution is performed from a secondary Flash
memory while the primary Flash memory is being
updated. This solution avoids the complicated
hardware and software overhead necessary to im-
plement IAP.
ST makes available a software development tool,
PSDsoft Express, that generates ANSI-C compli-
ant code for use with your target MCU. This code
allows you to manipulate the non-volatile memory
(NVM) within the PSD. Code examples are also
provided for:
– Flash memory IAP via the UART of the host
MCU
– Memory paging to execute code across
several PSD memory pages
– Loading, reading, and manipulation of PSD
macrocells by the MCU.
Table 1. Product Range
Part Number
(1)
Primary Flash
Memory
(8 Sectors)
1 Mbit
1 Mbit
1 Mbit
1 Mbit
1 Mbit
2 Mbit
1 Mbit
2 Mbit
Secondary
Flash Memory
4 Sectors)
256 Kbit
none
256 Kbit
none
256 Kbit
256 Kbit
256 Kbit
256 Kbit
SRAM
(2)
I/O Ports
Number of
Macrocells
Input
16 Kbit
16 Kbit
none
none
64 Kbit
64 Kbit
256 Kbit
256 Kbit
27
27
27
27
27
27
27
27
24
24
24
24
24
24
24
24
Output
16
16
16
16
16
16
16
16
Serial
ISP
JTAG/
ISC Port
yes
yes
yes
yes
yes
yes
yes
yes
Turbo
Mode
yes
yes
yes
yes
yes
yes
yes
yes
PSD813F2
PSD813F3
PSD813F4
PSD813F5
PSD833F2
PSD834F2
PSD853F2
PSD854F2
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
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