SMT6321Z6F [STMICROELECTRONICS]
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5, LEAD FREE, SOT-23, 5 PIN;
| 型号： | SMT6321Z6F |
| 厂家： | 
ST |
| 描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5, LEAD FREE, SOT-23, 5 PIN 光电二极管 |
| 文件： | 总21页 (文件大小：315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STM6321/6322
STM6821/6822/6823/6824/6825
5-Pin Supervisor with
Watchdog Timer and Push-button Reset
PRELIMINARY DATA
FEATURES SUMMARY
■
PRECISION V MONITORING OF 5V, 3.3V,
Figure 1. Package
CC
3V, OR 2.5V POWER SUPPLIES
–
–
–
–
–
–
STM6xxxL
STM6xxxM
STM6xxxT
STM6xxxS
STM6xxxR
STM6xxxZ
■
■
RST OUTPUTS (ACTIVE-LOW, PUSH-PULL
OR OPEN DRAIN)
RST OUTPUTS (ACTIVE-HIGH, PUSH-
PULL)
SOT23-5 (WY)
■
■
■
■
■
200ms (TYP) t
rec
WATCHDOG TIMER - 1.6sec (TYP)
MANUAL RESET INPUT (MR)
LOW SUPPLY CURRENT - 3µA (TYP)
GUARANTEED RST (RST) ASSERTION
DOWN TO V = 1.0V
CC
■
OPERATING TEMPERATURE:
–40°C to 85°C (Industrial Grade)
Table 1. Device Options
Reset Output
Manual Reset
Input
Part Number Watchdog Input
Active-Low
(Push-pull)
Active-High
(Push-pull)
Active-Low
(Open Drain)
STM6321
STM6322
STM6821
STM6822
STM6823
STM6824
STM6825
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
December 2004
1/21
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
STM6321/6322/6821/6822/6823/6824/6825
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram (STM6821/6822/6823). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram (STM6321/6322/6824/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. STM6821/6822/6823 SOT23-5 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 5. STM6321/6322/6824/6825 SOT23-5 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Active-Low, Push-pull Reset Output (RST) - STM6822/6823/6824/6825 . . . . . . . . . . . . . . . . . . . . . 5
Active-Low, Open Drain Reset Output (RST) - STM6321/6322/6822 . . . . . . . . . . . . . . . . . . . . . . . . 5
Push-button Reset Input (MR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Watchdog Input (WDI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Active-High Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Pin Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. Block Diagram (STM6xxx). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Open Drain RST Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 8. STM6321/6322/6822 Open Drain RST Output with Multiple Supplies . . . . . . . . . . . . . . . 7
Push-button Reset Input (STM6322/6821/6822/6823/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Watchdog Input (STM6321/6821/6822/6823/6824) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Watchdog Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ensuring a Valid Reset Output Down to V = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Interfacing to Microprocessors with Bi-directional Reset Pins . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 9. Ensuring RST Valid to V = 0, (Active-Low Push-pull Outputs) . . . . . . . . . . . . . . . . . . . 8
CC
Figure 10.Ensuring RST Valid to V = 0, (Active-High, Push-pull Outputs) . . . . . . . . . . . . . . . . . . 8
CC
Figure 11.Interfacing to Microprocessors with Bi-directional Reset I/O. . . . . . . . . . . . . . . . . . . . . . . 8
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 12.V -to-Reset Output Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Figure 13.Supply Current vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 14.MR-to-Reset Output Delay vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 15.Normalized Power-up t vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
rec
Figure 16.Normalized Reset Threshold Voltage vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 17.Normalized Power-up Watchdog Time-Out Period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 18.Voltage Output Low vs. I
Figure 19.Voltage Output High vs. I
SINK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 20.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . . 13
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5. Operating and AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23.Watchdog Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 24.SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Drawing . . . . . . . . . . 18
Table 7. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Data . . . . . . . . . . . . . 18
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 8. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. Marking Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3/21
STM6321/6322/6821/6822/6823/6824/6825
SUMMARY DESCRIPTION
The STM6xxx Supervisors are self-contained de-
vices which provide microprocessor supervisory
functions. A precision voltage reference and com-
high in the case of RST). These devices also offer
a watchdog timer (except for STM6322/6825) and/
or a push-button (MR) reset input.
parator monitors the V
ance condition. When an invalid V
occurs, the reset output (RST) is forced low (or
input for an out-of-toler-
CC
These devices are available in a standard 5-pin
SOT23 package.
condition
CC
Figure 2. Logic Diagram (STM6821/6822/6823)
Table 2. Signal Names
MR
WDI
RST
RST
Push-button Reset Input
Watchdog Input
V
CC
Active-Low Reset Output
Active-High Reset Output
Supply Voltage
WDI
MR
(1)
STM6XXX
RST (RST)
V
CC
V
SS
Ground
Figure 4. STM6821/6822/6823 SOT23-5
Connections
V
SS
AI09128
SOT23-5
Note: 1. For STM6821 only.
(1)
(2)
V
5
1
2
3
CC
RST (RST)
V
SS
Figure 3. Logic Diagram (STM6321/6322/6824/
6825)
WDI
MR
4
AI09130
Note: 1. Push-pull only.
V
CC
2. Open Drain for STM6822.
Figure 5. STM6321/6322/6824/6825 SOT23-5
Connections
RST
RST
(1)
SOT23-5
(1)
STM6XXX
(WDI) MR
5
V
1
2
3
RST
CC
V
SS
(2)
(3)
4
MR (WDI)
RST
AI09131
V
SS
AI09129
Note: 1. Open Drain for STM6321/6322.
2. Push-pull only.
3. For STM6321/6824
Note: 1. For STM6321/6824
4/21
STM6321/6322/6821/6822/6823/6824/6825
Pin Descriptions
Active-Low, Push-pull Reset Output (RST) -
STM6822/6823/6824/6825. Pulses low when trig-
Push-button Reset Input (MR). A logic low on
MR asserts the reset output. Reset remains as-
gered, and stays low whenever V
reset threshold or when MR is a logic low. It re-
is below the
serted as long as MR is low and for t after MR
CC
rec
returns high. This active-low input has an internal
52kΩ pull-up. It can be driven from a TTL or CMOS
logic line, or shorted to ground with a switch.
Leave open if unused.
mains low for t after either V rises above the
rec
CC
reset threshold, the watchdog triggers a reset, or
MR goes from low to high.
Active-Low, Open Drain Reset Output (RST) -
STM6321/6322/6822. Pulses low when triggered,
Watchdog Input (WDI). If WDI remains high or
low for at least 1.6sec, the internal watchdog timer
expires and reset is asserted. The internal watch-
dog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog
function CAN be disabled if WDI is left unconnect-
ed or is connected to a tri-state buffer output.
and stays low whenever V
is below the reset
CC
threshold or when MR is a logic low. It remains low
for t after either V rises above the reset
rec
CC
threshold, the watchdog triggers a reset, or MR
goes from low to high. Connect a pull-up resistor
to supply voltage.
Active-High Reset Output. Active-high, push-
pull reset output; inverse of RST.
Table 3. Pin Functions
Pin
Name
Function
STM6822
STM6823
STM6321 STM6322
STM6824 STM6825
STM6821
1
3
4
–
5
2
–
3
4
1
5
2
1
–
4
3
5
2
1
4
–
3
5
2
RST Active-Low Reset Output
MR Push-button Reset Input
WDI Watchdog Input
RST Active-High Reset Output
V
Supply Voltage
Ground
CC
SS
V
Figure 6. Block Diagram (STM6xxx)
WDI
Transitional
Detector
WATCHDOG
TIMER
WDI(1)
RST (RST)(3)
RST(4)
VCC
trec
Generator
COMPARE
VRST
VCC
MR(2)
AI09132
Note: 1. For STM6321/6821/6822/6823/6824
2. For STM6322/6821/6822/6823/6825
3. For STM6821/ (RST output only)
4. For STM6321/6322/6824/6825 (both RST and RST outputs)
5/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 7. Hardware Hookup
VCC
VCC
0.1µF
STM6XXX
WDI(1)
MR(2)
From Microprocessor
Push-button
RST (RST)(3)
To Microprocessor Reset
To Microprocessor Reset
RST(4)
AI09133
Note: 1. For STM6321/6821/6822/6823/6824
2. For STM6322/6821/6822/6823/6825
3. For STM6821/ (RST output only)
4. For STM6321/6322/6824/6825 (both RST and RST outputs)
6/21
STM6321/6322/6821/6822/6823/6824/6825
OPERATION
Reset Output
The STM6xxx Supervisor asserts a reset signal to
Push-button Reset Input (STM6322/6821/6822/
6823/6825)
the MCU whenever V
goes below the reset
A logic low on MR asserts reset. Reset remains
CC
threshold (V
), a watchdog time-out occurs, or
asserted while MR is low, and for t (see Figure
RST
rec
22., page 15) after it returns high. The MR input
has an internal 52kΩ pull-up resistor, allowing it to
be left open if not used. This input can be driven
with TTL/CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open mo-
mentary switch from MR to GND to create a man-
ual reset function; external debounce circuitry is
not required. If MR is driven from long cables or
the device is used in a noisy environment, connect
a 0.1µF capacitor from MR to GND to provide ad-
ditional noise immunity. MR may float, or be tied to
V
when not used.
CC
Watchdog Input (STM6321/6821/6822/6823/
6824)
The STM6321/6322/6822 have an active-low,
open drain reset output. This output structure will
sink current when RST is asserted. Connect a pull-
up resistor from RST to any supply voltage up to
6V (see Figure 8.). Select a resistor value large
enough to register a logic low, and small enough
to register a logic high while supplying all input cur-
rent and leakage paths connected to the reset out-
put line. A 10kΩ pull-up resistor is sufficient in
most applications.
The watchdog timer can be used to detect an out-
of-control MCU. If the MCU does not toggle the
Watchdog Input (WDI) within t
(1.6sec), the re-
WD
set is asserted. The internal watchdog timer is
cleared by either:
1. a reset pulse, or
2. by toggling WDI (high-to-low or low-to-high),
which can detect pulses as short as 50ns.
The timer remains cleared and does not count for
as long as reset is asserted. As soon as reset is re-
leased, the timer starts counting.
Note: The watchdog function may be disabled by
floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maxi-
mum allowable leakage current is 10uA and the
maximum allowable load capacitance is 200pF.
Figure 8. STM6321/6322/6822 Open Drain RST
Output with Multiple Supplies
3.3V
5.0V
VCC
Applications Information
STM6XXX
5V System
10k
MR(1)
Watchdog Input Current. The WDI input is inter-
nally driven through a buffer and series resistor
from the watchdog counter. For minimum watch-
dog input current (minimum overall power con-
sumption), leave WDI low for the majority of the
watchdog time-out period. When high, WDI can
draw as much as 160µA. Pulsing WDI high at a
low duty cycle will reduce the effect of the large in-
put current. When WDI is left unconnected, the
watchdog timer is serviced within the watchdog
time-out period by a low-high-low pulse from the
counter chain.
WDI(2)
RST(3)
RST
GND
AI09137
Note: 1. STM6322/6822
2. STM6321/6822
3. STM6321/6322
7/21
STM6321/6322/6821/6822/6823/6824/6825
Ensuring a Valid Reset Output Down to
Figure 9. Ensuring RST Valid to V = 0,
CC
V
= 0V. The STM6xxx Supervisors are guaran-
CC
(Active-Low Push-pull Outputs)
teed to operate properly down to V = 1V. In ap-
CC
plications that require valid reset levels down to
STM6XXX
VCC
V
= 0, a pull-down resistor to active-low outputs
CC
(push/pull only, see Figure 9.) and a pull-up resis-
tor to active-high outputs (push/pull only, see Fig-
ure 10.) will ensure that the reset line is valid while
the reset output can no longer sink or source cur-
rent. This scheme does not work with the open
drain outputs of the STM6321/6322/6822.
VCC
GND
RST
R1
AI09138
The resistor value used is not critical, but it must
be large enough not to load the reset output when
Figure 10. Ensuring RST Valid to V = 0,
CC
V
is above the reset threshold. For most appli-
CC
(Active-High, Push-pull Outputs)
cations, 100kΩ is adequate.
Interfacing to Microprocessors with Bi-
directional Reset Pins
Microprocessors with bi-directional reset pins can
contend with the STM6321/6322/6821/6822/6823/
6824/6825 reset output. For example, if the reset
output is driven high and the microprocessor
wants to pull it low, signal contention will result. To
prevent this from occurring, connect a 4.7kΩ resis-
tor between the reset output and the microproces-
sor’s reset I/O as in Figure 11..
VCC
STM6XXX
R1
VCC
GND
RST
AI09139
Note: This configuration does not work on open drain outputs of the
STM6321/6322/6822.
Figure 11. Interfacing to Microprocessors with
Bi-directional Reset I/O
Buffered Reset to other
System Components
VCC
VCC
STM6XXX
Microprocessor
4.7k
RST
RST
GND
GND
AI09135
8/21
STM6321/6322/6821/6822/6823/6824/6825
TYPICAL OPERATING CHARACTERISTICS
Figure 12. V -to-Reset Output Delay vs. Temperature
CC
35
30
25
20
15
10
5
0
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09627a
Figure 13. Supply Current vs. Temperature
7
6
5
4
3
2
1
0
V
V
= 3V
= 5V
CC
CC
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09628a
9/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 14. MR-to-Reset Output Delay vs. Temperature
600
500
400
300
200
100
0
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09669
Figure 15. Normalized Power-up t
vs. Temperature
rec
1.05
1.04
1.03
1.02
1.01
1.00
0.99
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09670
10/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 16. Normalized Reset Threshold Voltage vs. Temperature
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09631a
Figure 17. Normalized Power-up Watchdog Time-Out Period
1.05
1.04
1.03
1.02
1.01
1.00
0.99
–40
–20
0
20
40
60
80
Temperature (˚C)
AI09671
11/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 18. Voltage Output Low vs. I
SINK
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
= 2.9V
CC
0
1
2
3
4
5
6
I
(mA)
SINK
AI09634a
Figure 19. Voltage Output High vs. I
SOURCE
2.92
2.90
2.88
2.86
2.84
V
= 2.9V
CC
2.82
2.80
2.78
2.76
2.74
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
I
(mA)
SOURCE
AI09635a
12/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 20. Maximum Transient Duration vs. Reset Threshold Overdrive
35
30
25
20
15
10
5
S
Z
L
0
0
20
40
60
80
100
120
140
160
180
200
Reset Threshold Overdrive (mV)
AI09637a
13/21
STM6321/6322/6821/6822/6823/6824/6825
MAXIMUM RATING
Stressing the device above the rating listed in the
Absolute Maximum Ratings” table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 4. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
T
Storage Temperature (V Off)
–55 to 150
°C
STG
CC
Lead Solder Temperature for 10 seconds
Input or Output Voltage
Supply Voltage
(1)
260
°C
V
T
SLD
V
–0.3 to V +0.3
IO
CC
V
–0.3 to 7.0
20
V
CC
I
O
Output Current
mA
mW
P
Power Dissipation
320
D
Note: 1. Reflow at peak temperature of 255°C to 260°C for < 30 seconds (total thermal budget not to exceed 180°C for between 90 to 150
seconds).
14/21
STM6321/6322/6821/6822/6823/6824/6825
DC AND AC PARAMETERS
This section summarizes the operating measure-
ment conditions, and the DC and AC characteris-
tics of the device. The parameters in the DC and
AC characteristics Tables that follow, are derived
from tests performed under the Measurement
Conditions summarized in Table 5., Operating and
AC Measurement Conditions. Designers should
check that the operating conditions in their circuit
match the operating conditions when relying on
the quoted parameters.
Table 5. Operating and AC Measurement Conditions
Parameter
STM6xxx
1.0 to 5.5
–40 to 85
≤ 5
Unit
V
V
CC
Supply Voltage
Ambient Operating Temperature (T )
°C
ns
V
A
Input Rise and Fall Times
0.2 to 0.8V
Input Pulse Voltages
CC
0.3 to 0.7V
Input and Output Timing Ref. Voltages
V
CC
Figure 21. AC Testing Input/Output Waveforms
0.8V
CC
0.7V
CC
0.3V
CC
0.2V
CC
AI02568
Figure 22. MR Timing Waveform
MR
tMLRL
RST (1)
trec
tMLMH
AI07837a
Note: 1. RST for STM6322/6821/6825.
Figure 23. Watchdog Timing
VCC
trec
RST
tWD
WDI
AI09136
15/21
STM6321/6322/6821/6822/6823/6824/6825
Table 6. DC and AC Characteristics
Alter-
(1)
Sym
Description
Min
Typ
Max
Unit
Test Condition
native
(2)
V
Operating Voltage
5.5
12
17
V
CC
1.2
V
CC
Supply Current
T/S/R/Z (V < 3.6V)
4
6
3
3
µA
µA
CC
(MR and WDI
unconnected)
L/M (V < 5.5V)
CC
I
CC
V
CC
Supply Current
T/S/R/Z (V < 3.6V)
8
µA
µA
CC
(MR unconnected;
STM6322/6825)
L/M (V < 5.5V)
12
CC
0V = V = V
Input Leakage Current
–1
+1
µA
µA
µA
IN
CC
I
LI
WDI = V , time average
120
–15
160
CC
Input Leakage Current
(3)
(WDI)
WDI = GND, time average
–20
–1
V
CC
> V
,
RST
Open Drain Reset Output
Leakage Current
I
+1
µA
LO
Reset not asserted
V
V
> 4.0V
< 4.0V
2.0
V
V
RST
RST
V
V
Input High Voltage (MR)
Input High Voltage
IH
IH
0.7V
CC
V
RST
(max) < V < 5.5V
0.7V
V
CC
CC
(4)
(WDI)
V
V
> 4.0V
< 4.0V
0.8
V
V
RST
RST
V
V
Input Low Voltage (MR)
IL
0.3V
CC
Input Low Voltage
V
V
(max) < V < 5.5V
0.3V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
RST
CC
CC
(4)
(WDI)
≥ 1.0V, I
Reset asserted
= 50µA,
SINK
CC
0.3
0.3
0.3
0.4
0.3
0.4
V
V
V
V
V
≥ 1.2V, I = 100µA,
Reset asserted
CC
CC
CC
CC
SINK
Output Low Voltage
(RST; Push-pull or Open
Drain)
≥ 2.7V, I = 1.2mA,
Reset asserted
SINK
V
OL
≥ 4.5V, I = 3.2mA,
Reset asserted
SINK
≥ 2.7V, I = 1.2mA,
Reset not asserted
SINK
Output Low Voltage
(RST; Push-pull Only)
≥ 4.5V, I = 3.2mA,
Reset not asserted
CC
SINK
V
≥ 2.7V, I = 500µA,
Reset not asserted
CC
SOURCE
0.8V
0.8V
0.8V
0.8V
0.8V
0.8V
CC
CC
CC
CC
CC
CC
Output High Voltage
(RST)
V
≥ 4.5V, I = 800µA
, Reset not asserted
CC
SOURCE
V
CC
≥ 1.0V, I = 1µA,
Reset asserted (0°C to 85°C)
SOURCE
V
OH
V
≥ 1.5V, I = 100µA,
CC
SOURCE
Reset asserted
Output High Voltage
(RST)
V
V
≥ 2.55V, I
= 500µA,
SOURCE
CC
CC
Reset asserted
≥ 4.25V, I
= 800µA,
SOURCE
Reset asserted
16/21
STM6321/6322/6821/6822/6823/6824/6825
Alter-
native
(1)
Sym
Description
Min
Typ
Max
Unit
Test Condition
Reset Thresholds
25°C
4.561
4.630
4.390
3.080
2.930
2.630
2.320
4.699
4.746
4.446
4.490
3.110
3.150
2.960
3.000
2.660
2.696
2.350
2.380
V
V
STM6xxxL
STM6xxxM
STM6xxxT
STM6xxxS
STM6xxxR
–40 to 85°C 4.514
25°C 4.314
–40 to 85°C 4.270
25°C 3.040
–40 to 85°C 3.000
25°C 2.890
–40 to 85°C 2.857
25°C 2.590
–40 to 85°C 2.564
25°C 2.280
–40 to 85°C 2.250
L/M versions
T/S/R/Z versions
V
V
V
V
(5)
Reset Threshold
V
RST
V
V
V
V
V
(6)
STM6xxxZ
V
10
5
mV
mV
Reset Threshold
Hysteresis
V
to RST Delay
CC
(V
– V = 100mV,
20
µs
RST
CC
V
CC
falling at 1mV/µs)
t
rec
Reset Pulse Width
Reset Threshold
140
200
40
280
ms
ppm/
°C
Temperature Coefficient
Push-button Reset Input
t
t
MR
MR Pulse Width
MR to RST Output Delay
MR Glitch Immunity
MR Pull-up Resistor
1
µs
ns
ns
kΩ
MLMH
t
t
MRD
500
100
52
MLRL
35
75
Watchdog Timer
Watchdog Timeout
Period
t
1.12
50
1.60
2.24
s
WD
WDI Pulse Width
ns
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; V = 4.5V to 5.5V for “L/M” versions; V = 2.7V to 3.6V for “T/S/R”
A
CC
CC
versions; and VCC = 2.1V to 2.75V for “Z” version (except where noted).
2. V (min) = 1.0V for T = 0°C to +85°C.
CC
A
3. WDI input is designed to be driven by a three-state output device. To float WDI, the “high-impedance mode” of the output device
must have a maximum leakage current of 10µA and a maximum output capacitance of 200pF. The output device must also be able
to source and sink at least 200µA when active.
4. WDI is internally serviced within the watchdog period if WDI is left unconnected.
5. The leakage current measured on the RST pin is tested with the reset asserted (output high impedance).
6. Contact local sales office for availability.
17/21
STM6321/6322/6821/6822/6823/6824/6825
PACKAGE MECHANICAL
Figure 24. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Drawing
E
E1
M
0.15
C A B
A1
B
e/2
e
D
4X
M
0.20
C A B
A2
A
C 0.10
A
5X b
C
C
θ
L1
C
L
SOT23-5b
Note: Drawing is not to scale.
Table 7. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Data
mm
Min
0.90
–
inches
Symb
Typ
1.20
–
Max
1.45
0.15
1.30
0.50
0.20
3.00
3.00
1.75
–
Typ
0.047
–
Min
0.035
–
Max
0.057
0.006
0.051
0.020
0.008
0.118
0.118
0.069
–
A
A1
A2
b
1.05
0.40
0.15
2.90
2.80
1.60
1.90
0.95
0.60
0.35
–
0.90
0.35
0.09
2.80
2.60
1.50
–
0.041
0.016
0.006
0.114
0.110
0.063
0.075
0.037
0.024
0.014
–
0.035
0.014
0.004
0.110
0.102
0.059
–
C
D
E
E1
e
e/2
L
–
–
–
–
0.55
0.10
0°
0.63
0.60
10°
0.022
0.004
0°
0.025
0.024
10°
L1
α
N
5
5
18/21
STM6321/6322/6821/6822/6823/6824/6825
PART NUMBERING
Table 8. Ordering Information Scheme
Example:
STM6xxx
L
M
6
E
Device Type
STM6xxx
Reset Threshold Voltage
L: V
= 4.514V to 4.746V
= 4.270V to 4.490V
= 3.000V to 3.150V
= 2.850V to 3.000V
= 2.564V to 2.696V
RST
M: V
RST
RST
RST
T: V
S: V
R: V
RST
(1)
Z: V
= 2.250V to 2.380V
RST
Package
WY = SOT23-5
Temperature Range
6 = –40 to 85°C
Shipping Method
®
E = Tubes (Pb-Free - ECO PACK )
®
F = Tape & Reel (Pb-Free - ECO PACK )
Note: 1. Contact local sales office for availability.
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
Table 9. Marking Description
(1)
Part Number
Reset Threshold
Topside Marking
321X
STM6321
STM6322
322X
L: V
= 4.63V
= 4.39V
= 3.08V
= 2.93V
= 2.63V
= 2.32V
RST
M: V
STM6821
821X
RST
RST
RST
RST
RST
T: V
S: V
R: V
Z: V
STM6822
822X
STM6823
823X
STM6824
824X
STM6825
825X
Note: 1. Where “X” = L, M, T, S, R, or Z.
19/21
STM6321/6322/6821/6822/6823/6824/6825
REVISION HISTORY
Table 10. Document Revision History
Date
Version
1.0
Revision Details
August 25, 2004
15-Dec-04
First Draft
Update characteristics (Figure 12, 13, 14; Table 6, 8)
2.0
20/21
STM6321/6322/6821/6822/6823/6824/6825
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
21/21
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