ST1L08PUR [STMICROELECTRONICS]
800 mA ultra low drop, high PSRR voltage regulator;
| 型号： | ST1L08PUR |
| 厂家： | 
ST |
| 描述： | 800 mA ultra low drop, high PSRR voltage regulator |
| 文件： | 总21页 (文件大小：1725K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ST1L08
800 mA ultra low drop, high PSRR voltage regulator
Datasheet - production data
Applications
Consumer
Hard disk drives, SSD
Computer
Battery-powered systems
Low voltage point of load
Description
The ST1L08 provides 0.8 A of maximum current
from an input voltage in the range from 1 V to
5.5 V, with a typical dropout voltage as low as
70 mV.
It is stabilized with a ceramic capacitor on the
output.
Features
Input voltage from 1 to 5.5 V
Ultra low-dropout voltage (90 mV max. @
800 mA load)
The very low drop voltage, low quiescent current
and high PSRR features make it suitable for low
power battery-powered applications.
Low ground current (35 μA typ. @ no load)
Output voltage tolerance: ± 2.0% @ 25 °C
High PSRR: 80 dB @ 100 Hz, 50 dB @
1 MHz
Enable logic control function puts the ST1L08 in
shutdown mode, reducing the total current
consumption.
800 mA guaranteed output current
Wide range of output voltages available on
request: from 0.5 V to 4 V and adjustable
Logic-controlled electronic shutdown
Internal current and thermal limit
Power Good function
Available in DFN8 2x3 mm package
Temperature range: -40 °C to 125 °C
Input voltage control for the ST1L08Sxx
Power Good function and input voltage control
feature the ST1L08Sxx version.
The device is equipped with current limit and
thermal protection.
Table 1: Device summary
Order code
ST1L08SPU12R
ST1L08SPU33R
ST1L08SPUR
ST1L08PUR
Power Good and VIN control
Package
Output voltages
1.2 V
Yes
Yes
Yes
No
3.3 V
DFN8 (2x3 mm)
Adjustable
Adjustable
November 2015
DocID026624 Rev 2
1/21
www.st.com
This is information on a product in full production.
Contents
ST1L08
Contents
1
2
3
4
5
6
Diagram............................................................................................3
Pin configuration.............................................................................4
Typical application ..........................................................................5
Maximum ratings.............................................................................6
Electrical characteristics ................................................................7
Application information ................................................................11
6.1
6.2
6.3
6.4
Thermal and short-circuit protections..............................................11
Output voltage setting for ADJ version............................................11
Bias pin voltage requirements.........................................................11
External capacitors requirements....................................................11
7
8
Typical characteristics..................................................................12
Package information .....................................................................16
8.1
8.2
DFN8 (2x3 mm) package information .............................................16
DFN8 (2x3 mm) packing information...............................................18
9
Revision history ............................................................................20
2/21
DocID026624 Rev 2
ST1L08
Diagram
1
Diagram
Figure 1: Block diagram
DocID026624 Rev 2
3/21
Pin configuration
ST1L08
2
Pin configuration
Figure 2: Pin connection (top view)
Table 2: Pin description
Function
Symbol
VIN
Input voltage of the LDO (power element)
VBIAS
GND
EN
Bias input of the LDO
Common ground
Enable pin logic input: low = shutdown, high = active
Adjustable pin (on adjustable version)
Output voltage of the LDO
ADJ
VOUT
PG
Power Good pin (not connected on the ST1L08PUR)
Not connected
NC
EXP
Exposed pad (should be connected to GND)
4/21
DocID026624 Rev 2
ST1L08
Typical application
3
Typical application
Figure 3: Typical application circuits
Power Good feature is not present on the ST1L08PUR.
DocID026624 Rev 2
5/21
Maximum ratings
ST1L08
4
Maximum ratings
Table 3: Absolute maximum ratings
Symbol
VIN
Parameter
Value
Unit
V
DC input voltage
DC bias voltage
DC output voltage
- 0.3 to 7
VBIAS
VOUT
VEN
- 0.3 to 7
V
- 0.3 to VI + 0.3
- 0.3 to VBIAS + 0.3
- 0.3 to VBIAS + 0.3
- 0.3 to VBIAS + 0.3
Internally limited
Internally limited
- 65 to 150
V
Enable input voltage
Power Good pin voltage
ADJ pin voltage
V
VPG
V
VADJ
IOUT
V
Output current
mA
mW
°C
°C
PD
Power dissipation
TSTG
TOP
Storage temperature range
Operating junction temperature range
- 40 to 125
Absolute maximum ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. All values
are referred to GND.
Table 4: Thermal data
Symbol
RthJA
Parameter
Thermal resistance junction-ambient
Thermal resistance junction-case
DFN8 (2x3 mm)
Unit
°C/W
°C/W
55
12
RthJC
6/21
DocID026624 Rev 2
ST1L08
Electrical characteristics
5
Electrical characteristics
TJ = 25 °C, VIN = 1.5 V, VBIAS = 3.6 V, VOUT = VADJ, CIN = CBIAS = 1 μF, COUT = 4.7 μF,
VEN = VBIAS, unless otherwise specified.
Table 5: Electrical characteristics for the ST1L08 (adjustable)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Operating input
voltage
VIN
1
5.5
V
Operating bias
voltage (1)
VBIAS
IIN
2.7
5.5
10
V
VIN operating
current
0.2
40
µA
µA
VBIAS operating
current
IBIAS
IOUT = 10 µA
150
IOUT = 1 mA to 800 mA
TJ = 25 °C
0.490
0.487
0.500
0.500
0.510
0.512
VADJ
VADJ accuracy
V
-40 °C < TJ < 125 °C
VOUT = 0.5 V
IOUT = 1 mA
VOUT = 0.5 V
VBIAS = 3.6 V
1 V ≤ VIN ≤ 5.5 V
VIN static line
regulation
0.002
0.04
0.01
%/V
%/V
ΔVOUT
IOUT = 100 mA
VOUT = 0.5 V
VBIAS static line
regulation
0.2
VIN = 1.5 V
2.7 V ≤ VBIAS ≤ 5.5 V
Static load
regulation
ΔVOUT
IOUT = 1 mA to 800 mA
0.0002
70
0.001
%/mA
mV
IOUT = 800 mA
VBIAS = 3.6 V
90
VDROP
Dropout voltage
40 °C < TJ < 125 °C
120
10 Hz to 100 kHz
IOUT = 10 mA
Output noise
voltage
eN
50
80
µVRMS
VIN > VOUT + 0.5 V +/- VRIPPLE
VRIPPLE = 0.1 V
f = 100 Hz
Supply voltage
rejection
SVR
f = 10 kHz
f = 1 MHz
60
50
dB
DocID026624 Rev 2
7/21
Electrical characteristics
ST1L08
Unit
Symbol
Parameter
Test conditions
IOUT = 0 mA
Min.
Typ.
Max.
35
TJ = 25 °C
IOUT = 500 mA
TJ = 25 °C
IGND
Ground current
40
IOUT = 800 mA
40
150
0.8
1
µA
A
40 °C < TJ < 125 °C
Short-circuit
current
ISC
VEN
IEN
RL = 0
1.8
Enable input
logic low
Enable input
logic high
1.3
V
Enable pin
input current
VEN = 1.3 V
Rising edge
µA
0.92*
VOUT
Power Good
output
threshold
V
V
0.8*
Falling edge
PG (2)
VOUT
Power Good
output voltage
low
Isink = 6 mA open drain output
0.4
Thermal
shutdown
165
20
TSHDN
Hysteresis
°C
Notes:
(1)Important: in any case VBIAS ≥ VOUT + 1.5 V.
(2)Power Good feature is not available on the ST1L08PUR.
8/21
DocID026624 Rev 2
ST1L08
Electrical characteristics
TJ = 25 °C, VIN = VOUT + 0.5 V, VBIAS = VOUT + 1.5 Va, CIN = CBIAS = 1 μF, COUT = 4.7 μF,
VEN = VBIAS, unless otherwise specified.
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Operating input
voltage
VIN
1
5.5
V
Operating bias
voltage (1)
VBIAS
VOUT
IIN
2.7
0.5
5.5
4
V
V
Output voltage
range
VIN operating
current
4
10
150
µA
µA
VBIAS operating
current
IBIAS
IOUT = 10 µA
45
IOUT = 1 mA to 800 mA
TJ = 25 °C
-2
2
VOUT
VOUT accuracy
-40 °C < TJ < 125 °C
-2.5
2.5
%
IOUT = 1 mA
VIN static line
regulation
VBIAS = VOUT + 1.5 V
VOUT + 0.5 V ≤ VIN ≤ 5.5 V
0.003
0.04
0.015
0.2
%/V
ΔVOUT
IOUT = 100 mA
VBIAS static line
regulation
VIN = VOUT + 0.5 V
%/V
VOUT + 1.5 V ≤ VBIAS ≤ 5.5 V
Static load
regulation
ΔVOUT
IOUT = 1 mA to 800 mA
0.0005 0.0025 %/mA
IOUT = 800 mA
VBIAS = 4.8 V
VOUT = 3.3 V
100
VDROP
Dropout voltage
mV
40 °C < TJ < 125 °C
150
10 Hz to 100 kHz
IOUT = 10 mA
Output noise
voltage
eN
200
70
µVRMS
VOUT = 3.3 V
VIN > VOUT + 0.5 V +/- VRIPPLE
VRIPPLE = 0.1 V
Supply voltage
rejection
f = 100 Hz
f = 10 kHz
f = 1 MHz
SVR
dB
53
30
IOUT = 0 mA
TJ = 25 °C
40
50
IGND
Ground current
μA
IOUT = 500 mA
TJ = 25 °C
a
Important: in any case V
≥ V
+ 1.5 V.
BIAS
OUT
DocID026624 Rev 2
9/21
Electrical characteristics
ST1L08
Unit
Symbol
Parameter
Test conditions
IOUT = 800 mA,
Min.
Typ.
Max.
50
150
40 °C < TJ < 125 °C
Short-circuit
current
ISC
VEN
IEN
RL = 0
1.8
A
V
Enable input
logic low
0.8
1
Enable input
logic high
1.3
Enable pin input
current
VEN = 1.3 V
Rising edge
Falling edge
μA
V
0.92 *
VOUT
Power Good
output threshold
0.8 *
VOUT
PG
Power Good
output voltage
low
Isink = 6 mA open drain output
0.4
V
Thermal
shutdown
165
20
TSHDN
°C
Hysteresis
Notes:
(1)Important: in any case VBIAS ≥ VOUT + 1.5 V.
10/21
DocID026624 Rev 2
ST1L08
Application information
6
Application information
6.1
Thermal and short-circuit protections
The ST1L08 is self-protected from short-circuit condition and overtemperature. When the
output load is higher than the one supported by the device, the output current increases
until the limit of typically 1.8 A is reached, at this point the current is kept constant even
when the load impedance is zero.
Thermal protection acts when the junction temperature reaches 165 °C typical. At this point
the output of the IC shuts down. As soon as the junction temperature falls below the
thermal hysteresis value the device starts working again.
In order to calculate the maximum power that the device can dissipate, keeping the junction
temperature below the TOP, the following formula is used:
Equation 1
6.2
Output voltage setting for ADJ version
In the adjustable version, the output voltage can be set from 0.5 V up to 4 V, by connecting
a resistor divider between the ADJ pin and the output, thus allowing remote voltage
sensing.
The resistor divider should be selected using the following equation:
Equation 2
The resistors to be used, should have values in the range from 10 kΩ to 100 kΩ.
Lower values can also be suitable, but they increase current consumption.
6.3
6.4
Bias pin voltage requirements
The bias input is designed for low drop applications. The bias pin must be at least 2.7 V,
and at least 1.5 V higher than the output, to ensure proper biasing to the N-channel power
pass transistor.
If VIN supply voltage meets these requirements, the bias pin can be tied to VIN.
External capacitors requirements
The regulator is designed to be stable with ultra low ESR ceramic capacitors on the input
and the output. The suggested minimum value of the input, bias and output capacitors is
1 μF. The input capacitor must be connected as closer as possible to the VIN terminal. The
output capacitor must also be connected as closer as possible to the output pin.
DocID026624 Rev 2
11/21
Typical characteristics
ST1L08
7
Typical characteristics
TJ = 25 °C, VIN = 1.5 V, VBIAS = 3.6 V, VOUT = VADJ, CIN = CBIAS = 1 μF, COUT = 4.7 μF, VEN
=
VBIAS, unless otherwise specified.
Figure 4: Output voltage vs. temperature
(adjustable, IOUT = 1 mA)
Figure 5: Output voltage vs. temperature
(fixed 3.3 V, IOUT = 1 mA)
Figure 6: Output voltage vs. temperature
(adjustable, IOUT = 800 mA)
Figure 7: Output voltage vs.temperature
(fixed 3.3 V, IOUT = 800 mA)
Figure 9: VBIAS line regulation vs. temperature
(adjustable)
Figure 8: VIN line regulation vs. temperature
(adjustable)
12/21
DocID026624 Rev 2
ST1L08
Typical characteristics
Figure 10: Load regulation vs. temperature
(adjustable)
Figure 11: Ground current vs. temperature
(adjustable, IOUT = 0 mA)
Figure 12: Ground current vs. temperature
(adjustable, IOUT = 500 mA)
Figure 13: Ground current vs. temperature
(adjustable, IOUT = 800 mA)
Figure 14: Ground current in off mode vs.
temperature (adjustable)
Figure 15: Ground current vs. output current
(adjustable)
DocID026624 Rev 2
13/21
Typical characteristics
Figure 16: Dropout voltage vs. temperature
ST1L08
Figure 17: Dropout voltage temperature
(adjustable)
(fixed 3.3 V)
Figure 19: Supply voltage rejection vs.
frequency
Figure 18: Dropout voltage vs. output current
Figure 20: Output noise spectral density
Figure 21: Stability area vs. (COUT, ESR)
14/21
DocID026624 Rev 2
ST1L08
Typical characteristics
Figure 23: VBIAS line transient
Figure 22: VIN line transient
Figure 24: Load transient, COUT = 4.7 μF
Figure 25: Load transient, COUT =1 μF
Figure 26: Enable transient, VBIAS before VIN
Figure 27: Enable transient VIN before VBIAS
DocID026624 Rev 2
15/21
Package information
ST1L08
8
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
8.1
DFN8 (2x3 mm) package information
Figure 28: DFN8 (2x3 mm) package outline
16/21
DocID026624 Rev 2
ST1L08
Package information
Table 6: DFN8 (2x3 mm) mechanical data
mm
Dim.
Min.
0.80
0.00
0.18
Typ.
0.90
0.02
0.25
0.10
2.00
3.00
1.65
1.80
0.50
0.40
0.20
Max.
1.00
0.05
0.30
A
A1
b
c
D
E
D2
E2
e
1.50
1.65
1.75
1.90
L
0.30
0.50
K
Figure 29: DFN8 (2x3 mm) recommended footprint
DocID026624 Rev 2
17/21
Package information
ST1L08
8.2
DFN8 (2x3 mm) packing information
Figure 30: DFN8 (2x3 mm) tape outline
Figure 31: DFN8 (2x3 mm) reel outline
18/21
DocID026624 Rev 2
ST1L08
Package information
Table 7: DFN8 (2x3 mm) tape and reel mechanical data
mm
Dim.
Min.
Typ.
Max.
180
A
C
D
N
T
12.8
20.2
60
13.2
14.4
DocID026624 Rev 2
19/21
Revision history
ST1L08
9
Revision history
Table 8: Document revision history
Date
Revision Changes
23-Oct-2014
1
First release.
Updated Table 5: "Electrical characteristics for the
ST1L08 (adjustable)".
16-Nov-2015
2
Minor text changes.
20/21
DocID026624 Rev 2
ST1L08
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