ST2S08B [STMICROELECTRONICS]

Dual synchronous rectification, 1.5 A, 1.5 MHz adjustable step-down switching regulator; 双通道同步整流, 1.5 A , 1.5 MHz的可调降压型开关稳压器
ST2S08B
型号: ST2S08B
厂家: ST    ST
描述:

Dual synchronous rectification, 1.5 A, 1.5 MHz adjustable step-down switching regulator
双通道同步整流, 1.5 A , 1.5 MHz的可调降压型开关稳压器

稳压器 开关
文件: 总18页 (文件大小:757K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ST2S08B  
Dual synchronous rectification, 1.5 A, 1.5 MHz  
adjustable step-down switching regulator  
Datasheet production data  
Features  
Step-down current mode PWM (1.5 MHz) DC-  
DC converter  
Adjustable output voltage from 0.8 V  
2 % DC output voltage tolerance  
Synchronous rectification  
Integrated current limit  
QFN12L (4 x 4 mm)  
Inhibit function  
Soft-start for start delay of 800 µs typ.  
Typical efficiency: > 80 % at VOUT = 1.2 V  
1.5 A output current capability  
ST2S08B is available in the QFN12L (4 x 4 mm)  
package.  
Non-switching quiescent current: max 1.5 mA  
over temperature range  
RDS(ON) 150 mΩ (typ.)  
Uses tiny capacitors and inductors  
Available in QFN12L (4 x 4 mm)  
Description  
The ST2S08B is a dual step-down DC-DC  
converter optimized for powering low-voltage  
digital cores in ODD applications and, generally,  
to replace the high current linear solution when  
the power dissipation may cause a high heating of  
the application environment. It provides up to 1.5  
A over an input voltage range of 3 V to 5.5 V. A  
high switching frequency of 1.5 MHz allows the  
use of tiny surface-mounted components as well  
as a resistor divider to set the output voltage  
value. Only an inductor and two capacitors are  
required. A low output ripple is guaranteed by the  
current mode PWM topology and the utilization of  
low ESR SMD ceramic capacitors. The device is  
thermally protected and current limited. The  
Table 1.  
Device summary  
Order code  
Package  
Packaging  
ST2S08BPQR  
QFN12L (4 x 4 mm)  
Tape and reel  
May 2012  
Doc ID 18290 Rev 2  
1/18  
This is information on a product in full production.  
www.st.com  
18  
 
Contents  
ST2S08B  
Contents  
1
2
3
4
5
6
7
8
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
8.1  
8.2  
8.3  
8.4  
8.5  
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Programming the output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
10  
2/18  
Doc ID 18290 Rev 2  
ST2S08B  
1
Diagram  
Diagram  
Figure 1.  
Schematic diagram  
6)?37  
6)?!  
$ELAY  
2EF  
(6  
4RIMMING  
6)?37  
&"ꢀ  
'.$  
).(  
!-ꢅꢆꢉVꢄ  
* Not available on the ST2S08B version.  
Doc ID 18290 Rev 2  
3/18  
Pin configuration  
ST2S08B  
2
Pin configuration  
Figure 2.  
Pin connections (top view)  
Table 2.  
Pin n°  
Pin description  
Name  
Function  
1
2
3
4
5
6
7
8
9
HV  
FB2  
Programing pin. It must be floating or connected to GND.  
Feedback voltage  
GND2  
SW2  
Power ground  
Switching pin  
VIN_SW  
SW1  
Power input voltage pin  
Switching pin  
GND1  
FB1  
Power ground  
Feedback voltage/output voltage  
Not connect  
NC  
Inhibit pin:  
10  
INH  
- High device on  
- Low device off  
11  
12  
VIN_A  
Supply for analog circuit  
System ground  
GND_A  
4/18  
Doc ID 18290 Rev 2  
ST2S08B  
3
Maximum ratings  
Maximum ratings  
Table 3.  
Absolute maximum ratings  
Symbol  
VIN_SW  
Parameter  
Value  
Unit  
Positive power supply voltage  
Positive power supply voltage  
Inhibit voltage  
-0.3 to 7  
-0.3 to 7  
-0.3 to 7  
-0.3 to 7  
V
V
V
V
VIN_A  
VINH  
SWITCH voltage Max. voltage of output pin  
VFB1,2 Feedback voltage/output voltage  
Current into VFB pin Common mode input voltage  
-0.3 to 2.5  
+1 to -1  
150  
V
mA  
°C  
°C  
°C  
TJ  
Max junction temperature  
TSTG  
TLEAD  
Storage temperature range  
-65 to +150  
300  
Lead temperature (soldering) 10 sec.  
Note:  
Absolute maximum ratings are those values beyond which damage to the device may occur.  
Functional operation under these conditions is not implied.  
Table 4.  
Symbol  
Thermal data  
Parameter  
Thermal resistance junction-case  
Value  
Unit  
RthJC  
RthJA  
10  
60  
°C/W  
°C/W  
Thermal resistance junction-ambient  
Table 5.  
ESD performance  
Parameter  
Symbol  
Test conditions  
HBM-DH11C  
Value  
Unit  
kV  
ESD  
ESD protection voltage  
4
Doc ID 18290 Rev 2  
5/18  
Electrical characteristics  
ST2S08B  
4
Electrical characteristics  
VIN_SW = VIN_A = 5 V, VO1,2 =1.2 V, C1= 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3 µH,  
TJ = -30 to 125 °C, unless otherwise specified. Typical values refer to 25 °C.  
Table 6.  
Symbol  
Electrical characteristics  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
FB1,2  
IFB1,2  
Feedback voltage  
784  
800  
816  
600  
1.5  
mV  
nA  
VFB pin bias current  
VFB = 1 V  
VINH > 1.2 V, VFB = 1 V  
VINH = GND  
mA  
µA  
IQ  
Quiescent current  
20  
VIN = 3.0 to 5.5 V (1)  
TJ = - 30 to 85 °C  
,
IO1,2  
IMIN  
Output current  
1.5  
A
Minimum output current  
1
mA  
3.0 V < VIN < 5 V  
3.0 V < VIN < 5.5 V  
Device OFF  
1.2  
1.3  
VINH  
Inhibit threshold  
V
0.4  
2
IINH1,2  
Inhibit pin current  
µA  
%VO1,2  
ΔVIN  
/
%VO/  
VIN  
Reference line regulation  
3.0 V < VIN < 5.5 V  
10 mA < IO < 1.5 A  
0.04  
ΔVO1,2  
Reference load regulation  
PWM switching frequency  
Maximum duty cycle  
10  
1.5  
94  
mV  
MHz  
%
PWM fS  
DMAX  
ISWL  
VFB = 0.7 V, TA = 25 °C  
1.2  
85  
1.8  
VFB = 0.7 V, TA = 25 °C  
(2)  
Switching current limitation  
NMOS leakage current  
PMOS leakage current  
2
A
ILKN  
VFB = 0.9 V, TA = 25 °C  
VFB = 0.9 V, TA = 25 °C  
0.1  
0.1  
0.15  
0.2  
75  
µA  
µA  
Ω
ILKP  
R
DSon-N NMOS switch on resistance ISW = 250 mA  
DSon-P PMOS switch on resistance ISW = 250 mA  
0.3  
0.4  
R
Ω
IO = 20 mA to 100 mA  
O = 100 mA to 1.5 A  
%
η
Efficiency  
I
80  
%
TSHDN  
THYS  
Thermal shutdown  
150  
°C  
Thermal shutdown  
hysteresis  
15  
°C  
V
ISC - VIN Short-circuit VIN range (2)  
Output short-circuit to ground  
3
5.3  
1. V = 90 % of nominal value.  
O
2. Guaranteed by design, but not tested in production.  
6/18  
Doc ID 18290 Rev 2  
ST2S08B  
Typical application  
5
Typical application  
Application circuit  
VIN_A  
Figure 3.  
VIN  
L2  
3.3 µH  
SW2  
R3  
VO2  
VFB2  
VIN_SW  
L1  
3.3 µF  
ST2S08B  
SW1  
INH  
NC  
R1  
VO1  
VFB1  
GND1 GND2 HV  
GND_A  
C1  
C2  
22 µF  
R2  
4.7 µF  
C3  
22 µF  
R4  
AM07870v1  
Note:  
R1, R2 and R3, R4 are calculated according to the following equations:  
- VO1 = VFB1 (1 + R1 / R2)  
- VO2 = VFB2 (1 + R3 / R4)  
Doc ID 18290 Rev 2  
7/18  
 
Typical performance characteristics  
ST2S08B  
6
Typical performance characteristics  
Figure 4.  
Feedback voltage vs. temperature Figure 5.  
Efficiency vs. output current 1  
AM07883v1  
0.84  
0.83  
0.82  
0.81  
0.8  
AM07884v1  
100  
VIN = 5 V, Vfb1,Vfb2 connected to VO1-2 , IO1 = IO2 = 10 mA  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0.79  
0.78  
0.77  
0.76  
-50  
VIN = 5 V, VO1 = 1.2 V, VO2 NO LOAD  
-25  
0
25  
50  
75  
100  
125  
0
0.25  
0.5  
0.75  
1
1.25  
1.5  
Temperature [°C]  
Output current 1 [A]  
Figure 6.  
Efficiency vs. output current 2  
Figure 7.  
Switching frequency vs.  
temperature  
AM07885v1  
AM07886v1  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
VIN = 5 V, VO2 = 3.3 V, VO1 NO LOAD  
VIN = 5 V, VFB1 = VFB2 = 0.7 V  
1.1  
-50  
0
0
-25  
0
25  
50  
75  
100  
125  
0.25  
0.5  
0.75  
1
1.25  
1.5  
Temperature [°C]  
Output Current 2 [A]  
Figure 8.  
Duty cycle vs. temperature  
Figure 9.  
Inhibit threshold vs. temperature  
AM07887v1  
AM07889v1  
100  
98  
96  
94  
92  
90  
88  
86  
84  
82  
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
ON  
VIN = 5 V, VFB1 = VFB2 = 0.7 V  
VIN = 5.5 V , IO1 =IO2 = 100 mA  
OFF  
0
80  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
T [°C]  
Temperature [°C]  
8/18  
Doc ID 18290 Rev 2  
ST2S08B  
Typical performance characteristics  
Figure 10. Switching current limitation vs.  
temperature  
Figure 11. Load transient response  
AM07888v1  
2.4  
2.2  
2
1.8  
1.6  
1.4  
1.2  
1
0.8  
0.6  
VIN = 5 V, Output1 maximum load current  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature [°C]  
V
= 5 V, I from 250 mA to 1.5 A V @ 1.2 V  
O1 O1  
IN  
Figure 12. Inhibit transient  
INH  
V
= from 0 V to 2 V, V = 5.5 V, I = I = 1.5 A  
IN O1 O2  
INH  
Doc ID 18290 Rev 2  
9/18  
General information  
ST2S08B  
7
General information  
The ST2S08B is a dual adjustable current mode PWM step-down DC-DC converter.  
It is a complete 1.5 A switching regulator with internal compensation that eliminates the  
need for additional components.  
The constant frequency, current mode, PWM architecture and stable operation with ceramic  
capacitors, results in low, predictable output ripple.  
To clamp the error amplifier reference voltage, a soft-start control block, generating a  
voltage ramp, has been implemented. Other circuits fitted to the device protection are the  
thermal shut-down block, which turns off the regulator when the junction temperature  
exceeds 150 °C (typ.), and cycle-by-cycle switching current limiting.  
Operation of the device requires few components: 2 inductors, 3 capacitors, and a resistor  
divider. The chosen inductor must be capable of not saturating at the peak current level. Its  
value should be selected keeping in mind that a large inductor value increases the efficiency  
at low output current and reduces output voltage ripple, while a smaller inductor can be  
chosen when it is important to reduce package size and total application cost.  
Finally, the ST2S08 has been designed to work properly with X5R or X7R SMD ceramic  
capacitors both at input and at output. These types of capacitors, due to their very low series  
resistance (ESR), minimize the output voltage ripple. Other low ESR capacitors can be  
used, according to the needs of the application, without compromising the correct  
functioning of the device.  
10/18  
Doc ID 18290 Rev 2  
ST2S08B  
Application information  
8
Application information  
8.1  
8.2  
Introduction  
The following technical information is used for estimating typical external component  
characteristics using standard equations. Nevertheless, it is strongly recommended to  
validate the suitability of external components to the application requirements by thoroughly  
testing any solution at bench level on a real evaluation circuit.  
Programming the output voltage  
The output voltage for both channels can be adjusted from 0.8 V up to 85 % of the input  
voltage value by connecting a resistor divider between VO and GND, the middle point of the  
divider must be connected to the feedback (FB) pin, as shown in Figure 3.  
The resistor divider must be chosen according to the following equations:  
Equation 1  
R1 ⎞  
V
= V  
× 1+  
O1  
FB1  
R2  
Equation 2  
R3 ⎞  
V
= V  
× 1+  
O2  
FB2  
R4  
Using a resistor with a value in the range of 1 kΩ to 50 kΩ is recommended. Lower values  
are also suitable, but increase current consumption.  
8.3  
Inductor selection  
The inductor is the key passive component for switching converters.  
The critical inductance values can then be obtained according to the following formulas:  
Equation 3  
V ×(V  
V )  
O
O
IN_MAX  
L
=
MIN  
V
×F  
× ΔI  
IN_MAX  
SW L  
F
SW = switching frequency  
ΔIL = the peak-to-peak inductor ripple current. As a rule of thumb, the peak-to-peak ripple  
can be set at 20 % - 40 % of the output current.  
The peak current of the inductor can be calculated as:  
Doc ID 18290 Rev 2  
11/18  
Application information  
Equation 4  
ST2S08B  
V ×(V  
V )  
O
O
IN_MAX  
I
= (I /0.8)+  
O
PEAK  
2×V  
×F  
×L  
IN_MAX SW  
In addition to the inductance value, in order to avoid saturation, the maximum saturation  
current of the inductor must be higher than that of the IPEAK  
.
8.4  
Input and output capacitor selection  
It is recommended to use ceramic capacitors with X5R or X7R dielectric and low ESR as  
input and output capacitors, in order to filter any disturbance present in the input line and to  
obtain stable operation. The output capacitor is very important for satisfying the output  
voltage ripple requirements.  
The output voltage ripple (VO_RIPPLE), in continuous mode, for the step-down channel, can  
be calculated as:  
Equation 5  
1
V
= ΔI × ESR+  
O_RIPPLE  
L
8× C  
×F  
OUT SW  
where Δ IL is the ripple current and FSW is the switching frequency.  
The use of ceramic capacitors with voltage ratings in the range higher than 1.5 times the  
maximum input or output voltage is recommended.  
8.5  
Layout considerations  
Due to the high switching frequency and peak current, the layout is an important design step  
for all switching power supplies. Important parameters (efficiency, output voltage ripple,  
switching noise immunity, etc.) can be affected if the PCB layout is not designed paying  
close attention to the following DC-DC general layout rules:  
Short, wide traces must be implemented for mains current and for power ground paths.  
The input capacitor must be placed as close as possible to the IC pins as well as the  
inductor and output capacitor.  
The FB pin connection to the external resistor divider is a high impedance node, so  
interference can be minimized by placing the routing of the feedback node as far as  
possible from the high current paths. To reduce pick-up noise, the resistor divider must  
be placed very close to the device.  
A common ground node minimizes ground noise.  
The exposed pad of the package must be connected to the common ground node.  
Moreover, the exposed pad ground connection must be properly designed in order to  
facilitate heat dissipation from the exposed pad to the ground layer using PCB vias.  
12/18  
Doc ID 18290 Rev 2  
ST2S08B  
Package mechanical data  
9
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK  
specifications, grade definitions, and product status are available at: www.st.com.  
ECOPACK is an ST registered trademark.  
Doc ID 18290 Rev 2  
13/18  
Package mechanical data  
ST2S08B  
QFN12L (4x4) mechanical data  
mm.  
inch.  
Typ.  
Dim.  
Min.  
Typ.  
0.90  
0.02  
0.20  
0.30  
4.00  
2.15  
4.00  
2.15  
0.80  
0.55  
Max.  
1.00  
0.05  
Min.  
Max.  
0.039  
0.002  
A
A1  
A3  
b
0.80  
0.031  
0.035  
0.001  
0.008  
0.012  
0.157  
0.085  
0.157  
0.085  
0.031  
0.022  
0.25  
3.90  
2.00  
3.90  
2.00  
0.35  
4.10  
2.25  
4.10  
2.25  
0.010  
0.154  
0.079  
0.154  
0.079  
0.014  
0.161  
0.089  
0.161  
0.089  
D
D2  
E
E2  
e
L
0.45  
0.65  
0.018  
0.026  
7936361B  
14/18  
Doc ID 18290 Rev 2  
ST2S08B  
Package mechanical data  
Tape & reel QFNxx/DFNxx (4x4) mechanical data  
mm.  
Typ.  
inch.  
Typ.  
Dim.  
Min.  
Max.  
330  
Min.  
Max.  
12.992  
0.519  
A
C
12.8  
20.2  
99  
13.2  
0.504  
0.795  
3.898  
D
N
101  
3.976  
T
14.4  
0.567  
Ao  
Bo  
Ko  
Po  
P
4.35  
4.35  
1.1  
4
0.171  
0.171  
0.043  
0.157  
0.315  
8
Doc ID 18290 Rev 2  
15/18  
Package mechanical data  
ST2S08B  
Figure 13. QFN12L (4 x 4 mm) footprint recommended data  
16/18  
Doc ID 18290 Rev 2  
ST2S08B  
10  
Revision history  
Revision history  
Table 7.  
Document revision history  
Revision  
Date  
Changes  
30-Nov-2010  
18-May-2012  
1
2
Initial release.  
Modified max 1.0 mA ==> max 1.5 mA : Features on page 1.  
Doc ID 18290 Rev 2  
17/18  
ST2S08B  
Please Read Carefully:  
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the  
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any  
time, without notice.  
All ST products are sold pursuant to ST’s terms and conditions of sale.  
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no  
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this  
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products  
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such  
third party products or services or any intellectual property contained therein.  
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED  
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED  
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS  
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.  
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT  
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING  
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,  
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE  
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.  
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void  
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any  
liability of ST.  
ST and the ST logo are trademarks or registered trademarks of ST in various countries.  
Information in this document supersedes and replaces all information previously supplied.  
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.  
© 2012 STMicroelectronics - All rights reserved  
STMicroelectronics group of companies  
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -  
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
www.st.com  
18/18  
Doc ID 18290 Rev 2  

相关型号:

ST2S08BPQR

Dual synchronous rectification, 1.5 A, 1.5 MHz adjustable step-down switching regulator
STMICROELECTR

ST2SA1015

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1016

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1024

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1048

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1174

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1175

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1266

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1267

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1268

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1270

PNP Silicon Epitaxial Planar Transistor
SEMTECH

ST2SA1271

PNP Silicon Epitaxial Planar Transistor
SEMTECH