ST72P651AR6T1E/XXX [STMICROELECTRONICS]
8-BIT, MROM, 12MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, TQFP-64;
| 型号： | ST72P651AR6T1E/XXX |
| 厂家： | 
ST |
| 描述： | 8-BIT, MROM, 12MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, TQFP-64 时钟 微控制器 外围集成电路 |
| 文件： | 总10页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ST7265x
LOW-POWER, FULL-SPEED USB 8-BIT MCU WITH 32K
2
FLASH, 5K RAM, FLASH CARD I/F, TIMER, PWM, ADC, I C, SPI
DATA BRIEFING
■ Memories
– Up to 32K of ROM or High Density Flash (HD-
Flash) program memory with read/write pro-
tection
– For HDFlash devices, In-Application Pro-
gramming (IAP) via USB and In-Circuit pro-
TQFP64 10x10
TQFP64 14x14
■ Mass Storage Interface
gramming (ICP)
– Up to 5 Kbytes of RAM with up to 256 bytes
stack
– DTC (Data Transfer Coprocessor): Universal
Serial/Parallel communications interface, with
software plug-ins for current and future proto-
col standards:
■ Clock, Reset and Supply Management
– PLL for generating 48 MHz USB clock using a
12 MHz crystal
Compact Flash
– Low Voltage Reset (except on E suffix devic-
Multimedia Card
es)
Secure Digital Card
– Dual supply management: analog voltage de-
tector on the USB power line to enable smart
power switching from USB power to battery
(on E suffix devices).
– Programmable Internal Voltage Regulator for
Memory cards (2.8V to 3.5V) supplying:
Flash Card I/O lines (voltage shifting)
Up to 50 mA for Flash card supply
SmartMediaCard
Sony Memory Stick
NAND Flash
ATA Peripherals
■ 2 Timers
– Configurable Watchdog for system reliability
– 16-bit Timer with 2 output compare functions.
■ 2 Communications Interfaces
– Clock-out capability
■ 47 programmable I/O lines
– SPI synchronous serial interface
2
– 15 high sink I/Os (8mA @0.6V / 20mA@1.3V)
– 5 true open drain outputs
– 24 lines programmable as interrupt inputs
■ USB (Universal Serial Bus) Interface
– I C Single Master Interface up to 400 KHz
■ D/A and A/D Peripherals
– PWM/BRM Generator (with 2 10-bit PWM/
BRM outputs)
– with DMA for full speed bulk applications com-
pliant with USB 12 Mbs specification (version
2.0 compliant)
– 8-bit A/D Converter (ADC) with 8 channels
■ Instruction Set
– 8-bit data manipulation
– 63 basic instructions
– On-Chip 3.3V USB voltage regulator and
transceivers with software power-down
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
– True bit manipulation
– 5 USB endpoints:
1 control endpoint
2 IN endpoints supporting interrupt and bulk
2 OUT endpoints supporting interrupt and
bulk
■ Development Tools
– Hardware conversion between USB bulk
– Full hardware/software development package
packets and 512-byte blocks
Device Summary
Features
ST72651
ST72F651
ST72652
ST72F652
Program memory
User RAM (stack) - bytes
32K ROM
32K FLASH
16K ROM
16K FLASH
5K (256)
512 (256)
2
USB, DTC, Timer, ADC, SPI, I C, PWM,
WDT
Peripherals
USB, DTC, WDT
Operating Supply
Package
Dual 2.7V to 5.5V or 4.0V to 5.5V (for USB)
TQFP64 (10 x10 or 14 x14)
Single 4.0V to 5.5V
TQFP64 (10 x10)
Operating Temperature
0°C to +70°C
Rev. 2.1
1/10
May 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1
ST7265x
1 INTRODUCTION
The ST7265x MCU supports volume data ex-
change with a host (computer or kiosk) via a full
speed USB interface. The MCU is capable of han-
dling various transfer protocols, with a particular
emphasis on mass storage applications.
– A dedicated 24 MHz Data Buffer Manager state
machine for handling 512-byte data blocks (this
size corresponds to a sector both on computers
and FLASH media cards).
– A Data Transfer Coprocessor (DTC), able to
handle fast data transfer with external devices.
This DTC also computes the CRC or ECC re-
quired to handle Mass storage media.
ST7265x is compliant with the USB Mass Storage
Class specifications, and supports related proto-
cols such as BOT (Bulk Only Transfer) and CBI
(Control, Bulk, Interrupt).
– An Arbitration block gives the ST7 core priority
over the USB and DTC when accessing the Data
Buffer. In USB mode, the USB interface is serv-
iced before the DTC.
It is based on the ST7 standard 8-bit core, with
specific peripherals for managing USB full speed
data transfer between the host and most types of
FLASH media card:
– A FLASH Supply Block able to provide program-
mable supply voltage and I/O electrical levels to
the FLASH media.
– A full speed USB interface with Serial Interface
Engine, and on-chip 3.3V regulator and trans-
ceivers.
Figure 1. USB Data Transfer Block Diagram
USB
SIE
DATA TRANSFER
BUFFER
USB DATA
TRANSFER
512-byte RAM
Buffer
BUFFER ACCESS
ARBITRATION
ST7 CORE
512-byte RAM
Buffer
DATA
TRANSFER
COPROCESSOR
(DTC)
LEVEL
SHIFTERS
MASS
STORAGE
DEVICE
2/10
1
ST7265x
INTRODUCTION (Cont’d)
In addition to the peripherals for USB full speed
data transfer, the ST7265x includes all the neces-
sary features for stand-alone applications with
FLASH mass storage.
– Serial Peripheral interface (not on all products -
see device summary)
2
– Fast I C Single Master interface (not on all prod-
ucts - see device summary)
– Low voltage reset ensuring proper power-on or
power-off of the device (not on all products)
– 8-bit Analog-to-Digital converter (ADC) with 8
multiplexed analog inputs (not on all products -
see device summary)
– Digital Watchdog
– 16-bitTimer with 2 output compare functions (not
on all products - see device summary).
The ST72F65x are the Flash versions of the
ST7265x in a TQFP64 package.
– Two 10-bit PWM outputs (not on all products -
see device summary)
The ST7265x are the ROM versions in a TQFP64
package.
Figure 2. Digital Audio Player Application Example in Play Mode
DATA TRANSFER
BUFFER
512-byte RAM
Buffer
512-byte RAM
Buffer
BUFFER ACCESS
ARBITRATION
ST7 CORE
DATA
TRANSFER
COPROCESSOR
(DTC)
I2C
LEVEL SHIFTERS
MASS
STORAGE
DEVICE
DIGITAL
AUDIO DEVICE
3/10
1
ST7265x
INTRODUCTION (Cont’d)
Figure 3. ST7265x Block Diagram
OSCIN
12MHz
OSC
OSCOUT
PA[7:0]
(8 bits)
CLOCK
DIVIDER
PORT A
48MHz
PLL
PB[7:0]
(8 bits)
PORT B
SPI *
f
CPU
PC[7:0]
(8 bits)
PORT C
DATA
TRANSFER
BUFFER
DATA
TRANSFER
COPROCESSOR
(1280 bytes)
DTC S/W RAM
(256 Bytes)
PE[7:0]
(8 bits)
PORT E
PWM*
USBDP
USBDM
USBVCC
PORT F
USB
PD[7:0]
(8 bits)
PF[6:0]
(7 bits)
2
I C*
PORT D
16-BIT TIMER*
WATCHDOG
8-BIT ADC*
V
DDF
FLASH SUPPLY
BLOCK
V
RESET
CONTROL
SSF
8-BIT CORE
ALU
V
DDA
POWER SUPPLY
REGULATOR
V
PP
V
SSA
LVD*
V
V
DD1, DD2
DUAL SUPPLY
MANAGER *
V
V
SS1, SS2
RAM
(0.5/5 KBytes)
USBV
USBV
DD
SS
PROGRAM
MEMORY
(16K/32 Kbytes)
* not on all products (refer to Table 1: Device Summary)
4/10
1
ST7265x
2 PIN DESCRIPTION
Figure 4. 64-Pin TQFP Package Pinout
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
PE3 / PWM0 / AIN7 / DTC
PE2 (HS) / AIN6 / DTC
PE1 (HS) / AIN5 / DTC
PE0 (HS) / AIN4 / DTC
PD7 / AIN3
PD6 / AIN2
PD5/OCMP2
PD4/OCMP1
PD3
PD2
PD1
PD0
PC7
PC6
PC5
PC4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
USBV
USBDM
USBDP
1
SS
2
3
USBVCC
4
USBV
5
DD
V
6
DDF
V
7
SSF
DTC / PE5 (HS)
DTC / PE6 (HS)
DTC / PE7 (HS)
DTC / PB0
8
ei1
9
10
11
12
13
14
15
16
DTC / PB1
DTC / PB2
DTC / PB3
DTC / PB4
ei2
ei0
ei2
DTC / PB5
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
I/O pin supplied by V
/ V
SSF
DDF
(HS) high sink capability
ei
associated external interrupt vector
x
5/10
1
ST7265x
PIN DESCRIPTION (Cont’d)
Legend / Abbreviations:
Type: I = input, O = output, S = supply
Port and control configuration:
V
powered: I/O powered by the alternate sup-
– Input:float = floating, wpu = weakpull-up, int = in-
terrupt
DDF
ply rail, supplied by V
and V
.
DDF
SSF
In/Output level: C = CMOS 0.3V /0.7V with
DD
– Output: OD = open drain, T = true open drain, PP
= push-pull, OP = pull-up enabled by option byte.
T
DD
input trigger
Output level: HS = High Sink (on N-buffer only)
The RESET configuration of each pin is shown in
bold.
Table 1. Device Pin Description
Pin
Level
Port / Control
Main
Function
(after reset)
Input
Output
Pin Name
Alternate Function
1
2
3
USBV
S
USB Digital ground
SS
USBDM
I/O
I/O
USB bidirectional data (data -)
USB bidirectional data (data +)
USBDP
USB power supply, output by the on-chip USB
3.3V linear regulator.
4
5
USBVCC
O
S
Note: An external decoupling capacitor (typ.
100nF, min 47nF) must be connected between
this pin and USBV
.
SS
USB Power supply voltage (4V - 5.5V)
Note: External decoupling capacitors (typ.
4.7µF+100nF, min 2.2µF+100nFmust be con-
USBV
DD
nected between this pin and USBV
.
SS
Power Line for alternate supply rail. Can be
used as input (with external supply) or output
(when using the on-chip voltage regulator).
Note: An external decoupling capacitor (min.
20nF) must be connected to this pin to stabilize
the regulator.
6
7
V
V
S
S
X
X
DDF
SSF
Ground Line for alternate supply rail. Can be
used as input (with external supply) or output
(when using the on-chip voltage regulator)
DTC I/O with serial capability
(MMC_CMD)
2
2
8
9
PE5/DTC
PE6/DTC
I/O
I/O
I/O
X
X
X
C
HS X
X
X
X
X
Port E5
T
T
T
DTC I/O with serial capability
(MMC_DAT)
C
C
HS
HS
X
X
Port E6
DTC I/O with serial capability
(MMC_CLK)
10 PE7/DTC
X
X
Port E7
11 PB0/DTC
12 PB1/DTC
13 PB2/DTC
14 PB3/DTC
15 PB4/DTC
I/O
I/O
I/O
I/O
I/O
X
X
X
X
X
CT
CT
CT
CT
CT
X
X
X
X
X
X
X
X
X
X
Port B0
Port B1
Port B2
Port B3
Port B4
DTC
DTC
DTC
DTC
DTC
6/10
1
ST7265x
Pin
Level
Port / Control
Input Output
Main
Pin Name
Function
(after reset)
Alternate Function
16 PB5/DTC
17 PB6/DTC
18 PB7/DTC
19 PA0/DTC
20 PA1/DTC
21 PA2/DTC
22 PA3/DTC
23 PA4/DTC
24 PA5/DTC
25 PA6/DTC
26 PA7/DTC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
X
X
X
X
X
X
X
X
X
X
X
CT
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Port B5
Port B6
Port B7
Port A0
Port A1
Port A2
Port A3
Port A4
Port A5
Port A6
Port A7
DTC
DTC
DTC
DTC
DTC
DTC
DTC
DTC
DTC
DTC
DTC
CT
CT
CT
CT
CT
CT
CT
CT
CT
CT
X
X
X
X
X
X
X
X
ei0
Main Clock Output / SPI Slave
Select
27 PC0/MCO/SS
28 PC1/DTC/MIS0
I/O
I/O
X
X
CT HS
X
X
X
X
Port C0
Port C1
1
DTC I/O with serial capability
(DATARQ) / SPI Master In
C
HS
T
1
Slave Out
ei2
DTC I/O with serial capability
(SDAT) / SPI Master Out Slave
29 PC2/DTC/MOSI
30 PC3/DTC/SCK
I/O
I/O
X
X
C
C
HS
HS
X
X
X
X
Port C2
Port C3
T
T
1
In
DTC I/O with serial capability
1
(SCLK) / SPI Serial Clock
31
32
V
V
S
Power supply voltage (2.7V - 5.5V)
Digital ground
DD1
SS1
S
33 PC4/DTC
34 PC5/DTC
35 PC6/DTC
36 PC7/DTC
37 PD0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
C
C
C
C
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Port C4
Port C5
Port C6
Port C7
Port D0
Port D1
Port D2
Port D3
Port D4
Port D5
Port D6
Port D7
Port E0
DTC
DTC
DTC
DTC
T
T
T
T
ei2
CT
CT
CT
CT
CT
CT
CT
CT
X
X
X
X
X
X
X
X
X
38 PD1
39 PD2
40 PD3
ei1
1
1
41 PD4/OCMP1
42 PD5/OCMP2
43 PD6/AIN2
44 PD7/AIN3
45 PE0/DTC/AIN4
Timer Output Compare 1
Timer Output Compare 2
1
Analog Input 2
1
Analog Input 3
1
CT HS
Analog Input 4 / DTC
7/10
1
ST7265x
Pin
Level
Port / Control
Main
Function
(after reset)
Input
Output
Pin Name
Alternate Function
1
46 PE1/DTC/AIN5
47 PE2/DTC/AIN6
I/O
I/O
C
HS
X
X
X
X
X
X
Port E1
Port E2
Analog Input 5 / DTC
T
T
1
C
C
C
HS
Analog Input 6 / DTC
1
PE3/AIN7/DTC/
PWM0
Analog Input 7 / DTC / PWM
48
I/O
I/O
S
X
X
X
X
X
X
Port E3
Port E4
1
T
T
Output 0
1
49 PE4/PWM1
PWM Output 1
Flash programming voltage. Must be held low
in normal operating mode.
50
V
/ICCSEL
PP
Bidirectional. This active low signal forces the
initialization of the MCU. This event is the top
priority non maskable interrupt. This pin is
switched low when the Watchdog has triggered
51 RESET
I/O
X
X
or V is low. It can be used to reset external
DD
peripherals.
1
2
52 PF0 / SCL
53 PF1 / SDA
54 PF2 / AIN0
55 PF3 / AIN1
I/O
I/O
I/O
I/O
C
C
C
C
HS
HS
X
X
X
X
T
T
Port F0
Port F1
Port F2
Port F3
I C Serial Clock
T
T
T
T
1
2
I C Serial Data
1
X
X
Analog Input 0
Analog Input 1
1
USB Power Management USB
Enable (alternate function se-
lected by option bit)
56 PF4 / USBEN
I/O
C
HS
X
T
Port F4
T
57 PF5 / ICCCLK
58 PF6 / ICCDATA
I/O
I/O
C
C
HS
HS
X
X
T
T
Port F5
Port F6
ICC Clock Output
ICC Data Input
T
T
Main Power supply voltage (2.7V - 5.5V on de-
vices without LVD, otherwise 4V - 5.5V).
59
V
S
DD2
60
61
62
V
V
V
S
S
S
I
Analog supply voltage
Analog ground
DDA
SSA
SS2
Digital ground
Input/Output Oscillator pins. These pins con-
nect a 12 MHz parallel-resonant crystal, or an
external source to the on-chip oscillator.
63 OSCIN
64 OSCOUT
O
1
2
If the peripheral is present on the device (see Device Summary on page 1)
A weak pull-up can be enabled on PE5 input and open drain output by configuring the PEOR register
and depending on the PE5PU bit in the option byte.
8/10
1
ST7265x
3 PACKAGE CHARACTERISTICS
3.1 PACKAGE MECHANICAL DATA
Figure 5. 64-Pin 14 x 14 Thin Quad Flat Package
0.10mm
.004
seating plane
mm
inches
Dim
Min Typ Max Min Typ Max
A
1.60
0.063
0.006
A1 0.05
0.15 0.002
A2 1.35 1.40 1.45 0.053 0.055 0.057
B
C
0.30 0.37 0.45 0.012 0.015 0.018
0.09 0.20 0.004 0.008
D
16.00
14.00
12.00
16.00
14.00
12.00
0.80
0.630
0.551
0.472
0.630
0.551
0.472
0.031
D1
D3
E
E1
E3
e
K
0° 3.5° 7°
0.45 0.60 0.75 0.018 0.024 0.030
L
L1
L
L1
1.00
0.039
Number of Pins
N
64
ND
16
NE
16
K
Figure 6. 64-Pin 10 x 10 Thin Quad Flat Package
0.10mm
.004
seating plane
mm
inches
Dim
Min Typ Max Min Typ Max
A
1.60
0.063
0.006
A1 0.05
0.15 0.002
A2 1.35 1.40 1.45 0.053 0.055 0.057
b
C
0.17 0.22 0.27 0.007 0.009 0.011
0.09 0.20 0.004 0.008
D
12.00
10.00
12.00
10.00
0.50
0.472
0.394
0.472
0.394
0.020
D1
E
E1
e
K
0° 3.5° 7°
0.45 0.60 0.75 0.018 0.024 0.030
1.00 0.039
Number of Pins
ND 16 NE
0° 3.5° 7°
L
L1
L1
L
N
64
16
K
9/10
ST7265x
Notes:
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2002 STMicroelectronics - All Rights Reserved.
Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an
I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips.
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ST72T101G1
8-BIT MICROCONTROLLER (MCU) WITH 4 TO 8K ROM/OTP/EPROM. 256 BYTES RAM. ADC. WGD. TIMERS. SPI - SO28. SDIP32Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ETC
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