ST75C530 [STMICROELECTRONICS]
SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES; 超级综合DEVICESWITH DSP ， AFE与MEMORIES FORTELEPHONY ， MODEM ， FAXOVERINTERNET ＆ POTSLINES
| 型号： | ST75C530 |
| 厂家： | 
ST |
| 描述： | SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES |
| 文件： | 总84页 (文件大小：596K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ST75C530
ST75C540
SUPER INTEGRATED DEVICES WITH DSP, AFE & MEMORIES
FOR TELEPHONY, MODEM, FAX OVER INTERNET & POTS LINES
SUMMARIZED FEATURES
(for detailed features, see page 4)
.
SINGLE CHIP FAX Up to 14.4Kbps(V.17)
FULL DUPLEX DATA MODEM UP TO
14.4Kbps(V.32Bis)
DIGITAL ANSWERING MACHINE :
- 4.8Kbps VOCODER
- VARIABLEPLAYBACKSPEED (+50% to -50%)
- ADPCM 32, 34, 16Kbps VOCODER
.
.
.
FULL-DUPLEX DIGITAL SPEAKERPHONE
WITH ECHO CANCELLATION
PROGRAMMABLE RING DETECTION
16 PROGRAMMABLE TONE DETECTORS
FOR CLID AND SCWID
DTMF DETECTION
VERSATILE HOST INTERFACES
16 GENERAL PURPOSE I/O PORTS
2 RELAY DRIVE OUTPUTS
TQFP80 (14 x 14 x 1.4mm)
(Full Thin Plastic Quad Flat Pack)
.
.
ORDER CODE : ST75C530FP-A
.
.
.
.
.
.
ST75C540FP-A
SINGLE 5V POWER SUPPLY
TYPICAL ACTIVE POWER CONSUMPTION :
650mW (ST75C530), 750 mW (ST75C540)
LOW POWER MODE < 30mW
80-PIN TQFP PACKAGE (14mm x 14mm)
The embedded software includes :
- handset with listening group capability,
- full duplex handsfree,
- voicecoder/decoderat 4.8Kbpsfor staticanswer-
ing machine applications and ADPCM 16Kbps,
24Kbps and 32Kbps for high quality message
recording,
.
.
- Tone and DTMF generators,
- Tone and DTMF detectors,
- FAX up to 14.4Kbps,
- Data-Modem up to 14.4Kbps(ST75C540 only).
DESCRIPTION
The DSP sofware is extensively user configurable
allowing specific functions to be supported like
Caller Identifier (CLID) and Second Call Waiting
Identifier (SCWID).
The DSP software includes a transparent mode
allowing the host controller to access directly the
modem Analog Front End and the Audio AFE
through the dual Port RAM. This is very useful for
hostprocessing modem solutions (or soft modem)
where the modulation andthe demodulation(V.34,
V.90) are done by the application main processor.
In transparent mode, the embedded DSP can be
used simultaneously with the same samples.
ST75C530 and ST75C540 are two super-inte-
grated devices including DSP, Modem and Audio
Analog Front Ends and memories for Telephony,
Modem and FAX applications.
These devices can be used for classical applica-
tions over POTS lines or over Internet.
The super integration technology allows a signifi-
cant cost reduction on bill of materials for equip-
ment like High-End phones, INTERNET phones,
phone-Fax, INTERNET FAX, ...
The devices are used with a host processor
through a Dual Port RAM allowing the use of any
kind of microcontroller (RISC, CISC, General Pur-
The transparentmode for audio AFE is providedto
play audio files or to record voice and/or audio.
µ
pose 8-bit C, ...).
1/84
February 1999
ST75C530 - ST75C540
CONTENTS
Page
I
DETAILED FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
II
PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
II.1
II.2
II.3
II.4
II.5
II.6
PIN CONNECTIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HOST INTERFACE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ANALOG INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GENERAL PURPOSE IO AND RELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MISCELLANEOUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
6
6
6
7
7
III
BLOCK DIAGRAMS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
III.1
III.2
ANALOG INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INTERNAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
8
IV
ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
IV.1
IV.2
IV.3
IV.4
IV.5
IV.6
MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RECOMMENDED OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DIGITAL INTERFACE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODEM ANALOG INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AUDIO ANALOG INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
9
10
11
11
12
V
FUNCTIONAL DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
V.1
V.2
V.3
SYSTEM ARCHITECTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODES OF OPERATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OPERATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
13
V.3.1
V.3.2
V.3.3
V.3.4
V.3.5
V.3.6
V.3.7
V.3.8
V.3.9
Modem Transmitter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Modem Receiver Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tone Generator Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tone Detector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.21 Channel 2 Flag Detector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HDLC Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DTMF Detector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ring Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
13
13
13
13
13
13
13
14
14
15
18
18
V.3.10 VOCODER Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.3.11 Voice Activity Detector (VAD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.3.12 Telephony Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.3.13 Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.3.14 Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V.4
MODEM INTERFACE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
V.4.1
V.4.2
V.4.3
V.4.4
V.4.5
Analog Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General I/O and Relay Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Application Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
19
19
19
VI
USER INTERFACE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
VI.1
VI.2
VI.3
VI.4
VI.5
DUAL PORT RAM DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COMMAND SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COMMAND SET SHORT FORM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STATUS - REPORTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DATA EXCHANGES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
25
26
27
27
2/84
ST75C530 - ST75C540
VII
COMMAND SET DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28
43
VIII
STATUS DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VIII.1
VIII.2
COMMAND ACKNOWLEDGE AND REPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODEM STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
44
IX
TONE DETECTORS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
IX.1
IX.2
IX.3
OVERVIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EXAMPLE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
53
59
X
PARALLEL DATA EXCHANGE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
X.1
X.2
X.3
X.4
X.5
X.6
OVERVIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRANSMIT BUFFER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RECEIVE BUFFER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INTERRUPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DATA FORMAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FORM COMMAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
60
61
61
61
63
XI
TRANSMITTING DATA IN PARALLEL MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
64
XI.1
XI.2
XI.3
XI.4
XI.5
XI.6
XI.7
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODEM FLOW CHART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HOST FLOW CHART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ERROR DETECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SYNCHRONOUS MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HDLC MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART MODE DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
64
65
65
66
66
67
69
XII
RECEIVING IN PARALLEL MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
XII.1
XII.2
XII.3
XII.4
XII.5
XII.6
XII.7
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODEM FLOW CHART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HOST FLOW CHART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ERROR DETECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SYNCHRONOUS MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HDLC MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
70
70
71
72
72
74
XIII
VOCODER DATA EXCHANGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
74
XIII.1
XIII.2
XIII.3
XIII.4
OVERVIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VOCODER BUFFER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRANSMIT (DECODER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RECEIVE (CODER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
74
74
74
75
XIV
XV
TRANSPARENT MODE DATA EXCHANGE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DEFAULT CALL PROGRESS TONE DETECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . .
DEFAULT ANSWER TONE DETECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ELECTRICAL SCHEMATICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB DESIGN GUIDELINES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
APPENDIX A : MODES OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
76
76
77
78
78
83
XVI
XVII
XVIII
XIX
XX
3/84
ST75C530 - ST75C540
I - DETAILED FEATURES
Single Chip Fax
Handset Mode
- ITU-T V.17, V.29, V.27ter, V.21 with Fax support
- V.17, V.29 (T104), V.27ter short trains,
V.33 half-duplex
- V.21 flag detection and 4 tone detection during
high speed reception modes
- Rx and Tx AGC versus line current for line
losses compensation comply with most of
country regulations
- Dynamic limiter in transmit path to prevent
distortion
- V.21 flag detection, DTMF detection and 4
tone detection duringV.21 channel 2 reception
modes
- Programmable call progress and call waiting
detection
- Parallel data handling
- HDLC and UART framing support
- 1700Hz and 1800Hz carrier
- Full implementation of the V.17, V.33, V.29 and
V.27 handshakes
- 0 to -15dBm programmable transmit power
- 0 to -47dBmreceiverdynamicrange(ST75C530)
0 to-45dBmreceiverdynamicrange (ST75C540)
- Two way conversation recording
Hands-free Mode
- Full duplex speakerphone using LMS adaptative
filtering including line echo cancellation and
acoustic echo cancellation
- Rx and Tx AGC versus line current for line
losses compensation comply with most of
country regulations
- Dynamic limiter in transmit path to prevent
distortion
- Loudspeakervolume control
- Two way conversation recording
Full Duplex Data Modem
- ITU-T V.32bis, V.32 (14400, 12000, 9600, 7200,
4800bps) (*)
- Maximum round trip delay : 1.2s (satellite hops)
(*)
- Up to 10Hz of phase roll on far end echo (*)
- ITU-T V.22bis, V.22 (2400, 1200bps)(*)
- V.32bis/V.32/V.22bis/V.22automode (*)
- ITU- V.23, V.21, bell 103 full-duplex,
Bell202 demodulator
Extended Modes of Operations
- Programmable ring detection
- 16 programmabletone detectors
- Tone and DTMF generators
- Caller ID reception
- Transparent mode allowing direct transfer of Mo-
dem AFE and audio AFE samples to and from
host processor for soft Modem applications and
sound files playing
- DTMF detection
- Wide dynamic range (>48dB)
- -10 to -25dBm programmable transmit power
- -10 to-38dBm receiverdynamic range(*)
- HDLC and UART framing support
- Train based on quality line sampling (*)
Versatile Interfaces
- Parallel 128 x 8-bit dual port RAM
- General purpose 16 I/O ports
- 2 relay drive outputs
- Full diagnostic capability
- Dual 8-bit DAC for constellation display
(*) ST75C540 only
Digital Answering Machine
- Low bit rate speech coder (4800bps)
- Variable playback speed (+50% to -50%)
- ARAM compatibility (error correction)
- ADPCM 32, 24, 16Kbps
Single 5V Power Supply
- Typical active power consumption :
650mW (ST75C530), 725mW (ST75C540)
- Low power mode < 30mW
- Line echo cancellation
- Voice activity detector
- Concurrent DTMF and tone detection
4/84
ST75C530 - ST75C540
II - PIN DESCRIPTION
II.1 - Pin Connections
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SPK1N
SPK1P
AGNDTA
VREFN
GIO10
DVDD4
2
3
DGND4
GIO07
GIO06
GIO05
GIO04
GIO03
GIO02
DVDD3
4
5
VREFP
6
VCM
7
AGNDRA
MIC1
8
9
MIC2
10
11
12
13
14
15
16
17
18
19
20
MIC3
RxA
DGND3
GIO01
GIO00
RING
AVDDM
AGNDM
TxA2
TxA1
RELAY1
RELAY0
RGND
INT/MOT
SINTR
SCS
EYEX
EYEY
DGND6
DVDD6
DGND1
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
5/84
ST75C530 - ST75C540
II - PIN DESCRIPTION (continued)
II.2 - Host Interface
The exchanges withthe control processor proceed through a 128 x 8 DUALport RAM shared between the
ST75C530/540and the Host. The signals associated with this interface are :
Pin Name
Type
Description
SD0..SD7
I/O
System Data Bus. 8-bit data bus used for asynchronous exchanges between the
ST75C530/540 and the Host through the dual port RAM. High impedance when exchanges
are not active.
SA0..SA6
I
I
System Address Bus. 7-bit address bus for dual port RAM, IO and interrupt registers.
SDS (SRD)
System Data Strobe. In Motorola mode SDS initiates the exchange, active low. In Intel mode
SRD initiates a read exchange, active low.
SR/W (SWR)
I
System Read/Write. In Motorola mode SR/W defines the type of exchange read/write. In Intel
mode SWR initiates a write exchange, active low.
SCS
I
System Chip Select. Active low.
SINTR
OD
System Interrupt Request. Opendrain. Active low. Thissignal isasserted by theST75C530/540
and negated by the host.
RESET
I
I
Reset. Active low.
INT/MOT
Select Intel or Motorola Interface
II.3 - Analog Interface
Pin Name
TxA1
Type
Description
Transmit Analog Output 1
O
O
I
TxA2
RxA
Transmit Analog Output 2
Receive Analog Input
SPK1P
O
Speaker Output 1, (differential positive), must be connected through Amplifier to the
loudspeaker.
SPK1N
SPK2P
O
O
Speaker Output 1, (differential negative)
Speaker Output 2, (differential positive), must be connected through Amplifier to the Handset
loudspeaker.
SPK2N
SPK3P
SPK3N
MIC1
O
O
O
I
Speaker Output 2, (differential negative)
Speaker Output 3, (differential positive)
Speaker Output 3, (differential negative)
Microphone Input 1
MIC2
I
Microphone Input 2
MIC3
I
Microphone Input 3
VCM
I/O
I
Analog Common Voltage (nominal+2.5V).This input must be decoupled withrespect to AGND.
Analog Negative Reference (nominal 1.25V). This input must be decoupled with respect to
VREFN
VCM
.
VREFP
I
Analog Positive Reference (nominal 3.75V). This input must be decoupled with respect to VCM.
II.4 - General Purpose IO and Relay
Pin Name
GIO[0,7]
Type
I/O
Description
General Purpose I/O Pins, can be independently selected as input or output.
General Purpose I/O Pins, can be independently selected as input or output.
Relay Outputs, Open Drain, Active Low. Can sink -10mA to RGND.
GIO[10,17]
I/O
RELAY0,
RELAY1
OD
RING
I
Ring detectsignal. Active low. If the ST75C530/540 is inlow power mode, a low level will awake
the chip. This input is a Schmidt’s trigger.
RGND
PWR Relay Digital Ground. To connect to GND.
6/84
ST75C530 - ST75C540
II - PIN DESCRIPTION (continued)
II.5 - Miscellaneous
Pin Name
EYEX
Type
Description
O
O
O
I
Constellation X analog coordinate
Constellation Y analog coordinate
EYEY
XTAL
Internal Oscillator Output. Left open if not used.
EXTAL
XPLL
Internal Oscillator Input, or External Clock Input.
I
Reserved for future use, must be connected to digital ground.
Output Clock, EXTAL/2 (not available in low power mode).
CLKOUT
TEST0
O
I
Test pin for normal operation, must be connected to digital ground.
Note : The nominal frequency of the crystal oscillator is 44.2368MHz with a precision better than ± 100ppm.
II.6 - Power Supply
Symbol
DVDD
Nber
Parameter
6
6
2
3
Digital +5V.
DGND
AVDD
Digital Ground.
Analog +5V.
Analog Ground.
AGND
7/84
ST75C530 - ST75C540
III - BLOCK DIAGRAMS
III.1 - Analog Interface
TXA1
15
14
DAC
MUTE
HYBRID
Line
TXA2
RXA
11
ADC
MUTE
[0..-30]dB
Step 3dB
1
2
SPK1
SPK3
DAC
76
77
78
79
MUTE
MUTE
SPK2
MIC2
9
8
ADC
MIC1
MIC3
10
ST75C530/540
III.2 - Internal Block Diagram
45 46
ST75C530/540
GIO AND RELAY
EYE DAC
Pins 34 to 40
SA[0..6]
DUAL
PORT RAM
16
17
EYEX
EYEY
Pins 22 to 29
SD[0..7]
42
SINTR
ANALOG
FRONT
END
RAM
6144 WORDS
TIME BASE
68
72
CLKOUT
XTAL
ROM
16368 WORDS
PROM
26624
OSC
INSTRUCTIONS
73
47
EXTAL
RING
AUTOTEST
1024
INSTRUCTIONS
ST18932
DSP
(24Mips)
8/84
ST75C530 - ST75C540
IV - ELECTRICAL SPECIFICATIONS
IV.1 - Maximum Ratings (AGND = DGND = RGND = 0V, all voltages with respect to 0V)
Symbol
AVDD
DVDD
II
Parameter
Value
-0.3, 6.0
Unit
V
Analog Power Supply
Digital Power Supply
-0.3, 6.0
V
Input Current per Pin (except supply pins and RELAY0 and RELAY1)
Output Current per Pin (except supply pins and RELAY0 and RELAY1)
Output Current per Pin RELAY0 or RELAY1 (respect to RGND)
Analog Input Voltage
-10, +10
-20, +20
-40, 0
mA
mA
mA
V
IO
IO2
VIA
-0.3, AVDD + 0.3
-0.3, DVDD + 0.3
5.25
VID
Digital Input Voltage
V
VIDGPIO Digital Input Voltage at GPIO
V
Toper
Tstg
Ptot
Operating Temperature
Storage Temperature
0, +70
°C
°C
mW
- 40, +125
1500
Maximum Power Dissipation
Warning : Operation beyond these limits may result in permanent damage to the device. Normal operation is not guaranted at these extremes.
IV.2 - Recommended Operating Conditions
(AGND = DGND = RGND = 0V, all voltages with respect to 0V)
Symbol
VDD
Parameter
Min.
Typ.
Max.
Unit
Supply Voltage
Supply Current
4.75
5
5.25
V
IDD
ST75C530
ST75C540
130
145
150
165
mA
mA
PDLP
PD
Low Power
Power
30
mW
ST75C530
ST75C540
650
725
790
866
mW
mW
VCM
ICM
Common Mode Voltage Output (refer to AVDD/2)
Common Mode Current (see Note 1)
-5
+5
%
100
µA
Note 1 : DC current only. If dynamic load exists, the VCM output must be buffered or the performances of ADCs and DACs will be degraded.
9/84
ST75C530 - ST75C540
IV - ELECTRICAL SPECIFICATIONS (continued)
IV.3 - Digital Interface
(AVDD = DVDD = 5V, AGND = DGND = RGND = 0V) except XTAL, EXTAL, RING.
Symbol
VIH
Parameter
Min. Typ. Max. Unit
High Level Input Voltage
Low Level Input Voltage
2.2
-0.3
2.4
V
V
VIL
0.8
VOH
VOL
High Level Output Voltage (Iload = -2mA, Iload = -4mA for SD[7..0])
Low Level Output Voltage (Iload = 2mA, Iload = 4mA for SD[7..0])
Input Leakage Current
V
0.4
10
V
ILEAK
IOL
-10
-2
µA
mA
Low Level Output Current (except RELAY0 and RELAY1, and SINTR)
(0 < VOL < VOLMax.
)
IOH
High Level Output Current (except RELAY0 and RELAY1, and SINTR)
(0 < VOL < VOLMax.
2
mA
)
IOZ
IOZ
GIO Three State Input Leakage Current (GND < VO < VDD
SD Three State Input Leakage Current (GND < VO < VDD
)
-50
-50
-10
0
0
50
50
0
A
µ
)
µA
IOLRELAY Low Level Output Current RELAY0 or RELAY1 (VOL = 0.8V)
CRYSTAL OSCILLATOR
mA
VIH
VIL
IH
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
3.5
-20
V
V
1.5
20
µA
IL
A
µ
RING (this input have hysteresis)
VIH
VIL
IH
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
2.4
1.2
2.8
20
V
1
V
-20
A
µ
IL
µA
10/84
ST75C530 - ST75C540
IV - ELECTRICAL SPECIFICATIONS (continued)
IV.4 - Modem Analog Interface
AVDD = DVDD = 5V, Tamb = 25oC
Measurement bandwidth is flat from 100Hz to 4800Hz ;Load impedance10k , 20pF
For differentialoutput (TxA1/TxA2) : 0dBr = 1.77VRMS 1kHzsinwave (equivalent to 5VPP).
For single input (RxA) : 0dBr = 886mVRMS 1kHz sinwave (equivalent to 2.5VPP).
Ω
Symbol
Rxrin
Pin Name
Parameter
Min.
Typ.
Max.
Unit
kΩ
VPP
V
RxA
Input Impedance
100
Rxmac
Rxdc
Maximum AC Input Voltage = 0dBr
DC Reference Voltage
2.5
2.5
Rxsndr
Rxin
Signal to (Noise + Distortion), at -6dBr
Idle Noise
75
dB
dBr
mV
kΩ
pF
-81
Rxov
DC Offset Voltage (Input = VCM
Minimum Differential Load
Maximum Differential Load
Output Impedance
)
-50
10
100
TxAdrl
TxAcl
TxA1/TxA2
20
100
5
TxArout
TxAmac
TxAdc
TxAov
TxAsndr
TxAin
Ω
Maximum AC Differential Output = 0dBr
DC Reference Voltage
VPP
V
2.5
DC Offset Voltage
-200
79
200
-85
mV
dB
dBr
Signal to (Noise + Distortion), at -6dBr
Idle Noise
IV.5 - Audio Analog Interface
AVDD = DVDD = 5V, Tamb = 25oC
Measurement bandwidth is flat from 100Hz to 4800Hz ;Load impedance10k , 20pF
Ω
For differentialoutput (SPK1N/SPK1P,SPK2N/SPK2P, SPK3N/SPK3P): 0dBr = 1.77VRMS 1kHz sinwave
(equivalent to 5VPP).
For single input (MIC1, MIC2, MIC3) : 0dBr = 886mVRMS 1kHz sinwave (equivalent to 2.5VPP).
Symbol
RArin
RAmac
RAdc
RAdis
RAin
Pin Name
Parameter
Min.
Typ.
Max.
Unit
kΩ
VPP
V
MIC1,
MIC2,
MIC3
Input Impedance
100
Maximum AC Input Voltage = 0dBr
DC Reference Voltage
Distortion at -6dBr
2.5
2.5
2
%
Idle Noise
-81
50
dBr
mV
kΩ
Ω
RAov
TAdrl
DC Offset Voltage (Input = VCM
)
-50
10
SPK1N/SPK1P, Minimum Differential Load
SPK2N/SPK2P,
Output Impedance
SPK3N/SPK3P
TArout
TAmac
TAdc
100
5
Maximum AC Differential Output = 0dBr
DC Reference Voltage
DC Offset Voltage
VPP
V
2.5
TAov
-200
200
1
mV
%
TAdis
TAin
Distortion at -6dBr
Idle Noise
-81
dBr
11/84
ST75C530 - ST75C540
IV - ELECTRICAL SPECIFICATIONS (continued)
IV.6 - AC ElectricalCharacteristics
WRITE CYCLE
READ CYCLE
SCS
SA[0..6]
1
3
2
SR/W
SDS
1
4
2
5
WR
RD
11
6
7
10
12
IN
OUT
SD[0..7]
SINTR
8
9
GIO(out),
RELAY
13
14
GIO(in)
Number
Description
Min.
Typ.
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
Address and Control Set-up Time
Address and Control Hold Time
Write Enable Low State
Read Enable Low State
Access Inhibition High State
Data Set-up Time
5
20
3
45
45
70
10
5
4
5
6
7
Data Hold Time
8
GIO Output, Relay, SINTR Clear Delay
GIO Output Hold Time
Read Data Access Time
Data Valid to Tristate Time
Data Hold Time
50
9
0
10
11
12
13
14
35
15
5
0
GIO Input Delay Time
40
GIO Input Hold Time
12/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION
V.1 - SystemArchitecture
pling rate at 4.8kHz. But this 4 additional tone
detectors can also detect tones up to 3.3kHz with
a sampling rate at 9.6kHz. In order to avoid wrong
detectgion, relative detectgion is also provided.
Thechipallowsthe designof a completeFAX, Data
Modem, Hands-Free Telephone and Answering
Machine system. A versatile dual port RAM allows
an easy interface with most micro-controllers.
V.3.5- V.21 Channel 2 Flag Detector Description
Inall theReceiveFAXModes, includingV.21Chan-
nel 2 Mode, the ST75C530/540 processes a V.21
Flag “7E” detector, either in the idle state, the train
sequence or the data mode. The detection time is
3 consecutive flags to detect and 1 byte to loose
the detection.
V.2 - Modes of Operation
Refer to AppendixA for Block Diagrams.
V.3 - Operations
V.3.1 - Modem Transmitter Description
The signal pulses are shaped in a dedicated filter
further combined with a compromise transmit
equalizersuited for transmissionover strongly dis-
torted lines. 3 different compromise equalizers are
available and can be selected by software.
V.3.6 - HDLC Description
In all FAX Modes (MODEM), including V.21 Chan-
nel
2
Mod e, and also Full Duplex
V.32bis/V.32/V.22bis/V.22 (Modem) modes, a
HDLC framing and deframing is supported by the
ST75C530/540. The number of transmitted flags
can be programmed.
V.3.2 - Modem Receiver Description
The receiver section handles complex signals and
uses a fractionally spaced complex equalizer. It is
able to cope with distant modem timing drifts up to
10-4 as specified in the ITU-T recommendations.It
also compensates for frequency drift up to 10Hz
and for phase jitter at multiple and simultaneous
frequencies.
V.3.7 - UART Description
In Full Duplex V.32bis/V.32/V.22bis/V.22 Modem
ModesandTONECIDV.23receivemode,a parallel
UART is performed by the ST75C530/540. This
UARTmanage the Break signal either at thetrans-
mit and the receive bit stream. The Data format
supported are 7 and 8 bit of Data; even, odd or no
Parity, 1 or 2 stop bits.
V.3.3 - Tone Generator Description
Fourtones canbe simultaneouslygeneratedby the
ST75C530/540. These tones are determined by
theirfrequenciesandby the outputamplitude level.
A set of specific commands are also available for
DTMFgeneration.Anyof the4 tonegeneratorscan
be output independently either on the Audio DAC
or the line DAC.
V.3.8 - DTMF Detector Description
ADTMF Detectoris includedin theST75C530/540,
it allows detection of valid DTMF Digits. A valid
DTMF Digit is defined as a dual tone with a total
power higher than -43dBm, a duration higher than
40msanda differentialamplitude within ±8dB. This
DTMF Detector is enabled in all modes except in
Fax Modem, Data Modem and Handset modes. It
is also enabled in V.21 Channel 2 Receive Mode.
The DTMF thresholds and duration can be
changed from they default value by overwriting
DSP’s RAM locations. In the default setup, this
detectoris compliant with the NET4 standard.The
frequencydeviationcan be changedby overwriting
the default DTMF’s filters coefficients.
V.3.4 - Tone Detector Description
During TONE (respectively TONECID) Mode six-
teen (respectively eight) tones can be simultane-
ously detected by the ST75C530/540.Each of the
tones to be detected is defined by the coefficients
of a 4th order programmableIIR. Detection thresh-
olds are programmablefrom -51dBm up to -6dBm.
These primary detectors can detect tone up to
3.3kHz (sampling rate 7.2kHz in all modes). They
also have a programmable internal wiring feature
(see Chapter IX).
V.3.9 - Ring Detector
In all modes, except Handset (HANDSET) and Full
Duplex V.32bis/V.32/V.22bis/V.22 (Modem)
modes, 4 additional tone detectors (each of them
being a 4th order programmable IIR) are concur-
rently running. In Handset mode only 2 additional
tone detectors are available. Detection thresholds
are programmable from-51dBm up to -6dBm.This
secondary programmable detector can detect
tones up to 1.8kHz by default set-up with a sam-
This detector detects RING signal from 15Hz to
68Hz, it can be programmed to expand the mini-
mum and maximum detection frequency up to
12Hz (for min) and 144Hz (for max). The detection
time is equal to one period of the ring signal, and
the loose time to the minimum between oneperiod
of the ring signal and the inverse of the minimum
frequency.
The associated STA_RING status is as Figure 1.
13/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
Figure 1
RING
T1
T2
T3
STA_RING
1/Fmax prog. < T1 < 1/Fmin prog.
T2 < 1/Fmax prog.
≈ 1/Fmin prog.
T3
V.3.10 - VOCODER Description
function allows a quick message listening if speed
up is used, or at the opposite if slow down is used,
an enhancementof the voice intelligibility.
The Vocoder mode allows the implementation of
an answering machine function. In the CODER
mode the received samples from one of the two
analog inputs, Line or Audio, are compressed by
the ST75C530/540 and written into the dual port
RAM Vocoder Buffer (VOCxxx). At the same time
the ST75C530/540 is looking for an incoming
DTMF tone and 4 different programmable tones.
V.3.11 - VoiceActivity Detector (VAD)
In CODER Mode, for both of the Voice Coding
algorithms, a Voice Activity Detector is imple-
mented while coding by the ST75C530/540. The
STA_109 bit and STA_109F bit reflect the state of
the VAD. After the CONF command the VADis on
(assume voice). The default time-out to detect si-
lence is 2 secondsand theset-uptimeto detectthe
voice is 15ms. This VAD information is also copied
into the Receive Buffer Status Word MSB (VOC-
STA bit7). This detector is fully programmable in
level sensitivity (down to -60dBm), hysteresis, and
various criteria.
In the DECODER mode the compressed samples
are read from the dual port RAM, decompressed
and transmitted to one of the two analog output,
Line or Micx. The ST75C530/540 synthesises an
estimation of its echo and subtracts it from the
received signal. At t he same time the
ST75C530/540 is looking for an incoming DTMF
tone and 4 different tones.
Two algorithms of voice coding are implemented :
- Low bit rate speech coder (4800bps or 5300bps
with forward error correction).
- ADPCM (ST proprietary algorithm) at 32, 24 and
16Kbps.
An optional silence suppressor is implemented in
the Coder section to suppress long silence in the
incoming message. When enabled (CONF_SUP-
SIL equal 1) if a long silence is detected (STA_109
equal 0) the ST75C530/540stopsgenerating Buff-
er Interrupts. After that if a voice is again detected
the ST75C530/540will resume the Buffer Interrupt
mechanism.
If the low bit rate coder algorithm is selected the
ST75C530/540has the capability to slow down or
speed up the DECODER flow up to ±50%. This
Figure 2
Rx Signal
2s
STA_109
(or VOCSTA bit 7)
Interrupt (IT1)
14/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
V.3.12 - Telephony Functions
tions.The softwareimplementedin ST75C530/540
allows functions such as softclipping, AGC in both
modes,and fullduplex modein handsfree(seeFig-
ure 3).
ST75C530/540 telephony software provides both
handset and handsfree modes. ST75C530/540 is
connected to the phone line through a D.A.A.,
handset and loudspeaker are connected to
ST75C530/540through amplifiers.
V.3.12.1 - Handset Mode
Though the D.A.A. has to comply with modem/fax
regulations in most of the applications, the micro-
phone and the earphone amplifier gains will be
adjusted in compliance with the telephony regula-
In handset mode, all the attenuations(_SPKGAIN,
_TXGAIN, _MIKGAIN) are from 0dB to -inf
(32768 steps). AGC and softclipping functions can
beenabledand disabledbysoftware(seeFigure4).
Figure 3 : Handset/HandsfreeMode Operation
TxA1
15
ATT_TX
2 TONE
GENERATOR
DAC
MUTE
HYBRID
14
Line
TxA2
RxA
11
ADC
MUTE
[0..-30]dB
Step 3dB
1
2
CODER
SPK1
SPK3
76
77
78
79
AGC
AGC
DAC
MUTE
MUTE
DUAL
RAM
INTERFACE
HANDSFREE/
HANDSET
ALGORITHMS
SPK2
MIC2
MIC1
9
8
ATT_MIC
2 TONE
DETECTORS
DG
ADC
10 MIC3
Figure 4 : Handset Mode
AGC = F(ILINE
)
_MIKGAIN
_TXGAIN
TxA1
TxA2
MIC2
Softclipping
DP_RING
RxA
_SPKGAIN
SPK2_1
SPK2_2
AGC = F(ILINE
)
15/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
Tx Characteristics
Symbol
Parameter
Transmit Gain
Test Conditions
Min. Typ. Max. Unit
Gtx
_MIKGAIN=7FFF,_TXGAIN=7FFF, AGC disabled
VMIC2 = -21dBV
18
8
dB
dB
VMIC2 = -9dBV
Ntx
Transmit noise
2k between MIC2 and GND
-73
60
dBmp
dB
Ω
Mmic
Microphone mute
VMIC2 = -21dBV
VLpeak Transmit softclipping
level on TxA1-TxA2
_MIKGAIN=7FFF,_TXGAIN=7FFF, AGC disabled
see Figure 3, VMIC2 = -9dBV
2.5
Vpp
Dtx
Transmit distortion
_MIKGAIN=7FFF,_TXGAIN=7FFF, AGC disabled
see Figure 3, VMIC2 = -9dBV
2
%
Rx Characteristics
Symbol
Grx
Parameter
Test Conditions
Min. Typ. Max. Unit
Receive Gain
Receive noise
Mute
_SPKGAIN=7FFF, AGC disabled, VRXA = -16 dBV
6
dB
dBmp
dB
Nrx
-79
60
Mrx
VRXA = dBV
Dtx
Receive distortion
(SPK2 output)
_SPKGAIN=7FFF, AGC Disabled, VRXA = -16dBV
2
%
AGC
Figure 5 : SoftclippingStatic Gain
Tx Softclipping and Distortion
The line current information is coming from the
D.A.A.on DP_RINGpin (frequencycoded informa-
tion using by example a TS555 general purpose
timer). The AGC has a 6dBdepth . Theattenuation
table can be loaded to comply with each country
regulation. The default table has the following val-
ues. The value of the AGC gain is applied to both
Tx and Rx path (see Table 1).
The address of the table is given in the register
@_TABLE.
The table length is 53. The AGC is enabled using
CONF or MODC command (see paragraph ”VII -
COMMAND SET DESCRIPTION”.
(mVRMS
)
D (%)
12
104
103
102
VTxA1-TxA2 (VRMS
)
Distortion
10
8
6
4
Oncethe AGCisrunning,it ispossibletofreezethe
AGC gain with the register AGC_FRZ.
2
Softclipping
The softclipping introducesa 12dB gain and has a
18dB depth.
The softclipping value is half digital range
(4000 Hex) (see Figure 5).
0
103
10
102
MICX (mVRMS
V
)
Table 1 : AGC Gain versus Period Information
Period (ms)
Table Index
Gain (dB)
<9
<13
0
10
13
10.8 11.6 14.5 13.3 14.1 15.5 16.6 17.5 18.3 19.1
20
24
>20
>24
6
14
15
16
3
17
18
4
19
20
21
22
23
0.7
1.5
2.2
3.4
4.5
4.8
5.1
5.4
5.6
5.8
16/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
V.3.12.2- Handsfree Mode
The handsfree uses a MIC1 and a SPK1 as microphone and loudspeaker interface (see Figure 6).
Figure 6 : Handsfree Mode : Full Duplex
_MIKGAIN
_TXGAIN
+
-
TxA1
TxA2
ACOUSTIC
FILTER
ADAPTIVE
ATTENUATOR
MIC1
AGC = F(IL)
ADAPTIVE
FIR
FILTER
NLMS
ADAPTIVE
FIR
FILTER
CONTROL
NLMS
_SPKGAIN
-
SPK1P
SPK1N
ADAPTIVE
ATTENUATOR
RxA
AGC = F(IL)
+
Softclipping
Tx Characteristics
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
Gtx
Transmit Gain
_MIKGAIN=7FFF,_TXGAIN=7FFF ,AGC disabled,
VMIC1 = -21dBV
24
dB
Ntx
Mmic
Dtx
Transmit noise
2k between MIC1 and GND
-70
60
dBmp
dB
Ω
Microphone mute
Transmit distortion
VMIC1 = - dBV
_MIKGAIN=7FFF,_TXGAIN=7FFF ,AGC disabled,
VMIC1 = -9dBV
2
%
Rx Characteristics
Symbol
Grx
Parameter
Test Conditions
Min. Typ. Max. Unit
Receive Gain
Mute
_SPKGAIN=7FFF, AGC disabled, VRXA = -33dBV
24
60
dB
dB
%
Mrx
Dtx
Receive distortion
(SPK1 output)
_SPKGAIN=7FFF, AGC disabled, VRXA = -33dBV
2
AGC
The AGC has the samebehavior as in Handsetmode. Furthermore,the maximum gainadded by AGCcan
be fixed by using the RX_GAINMAX and TX_GAINMAX registers.
Softclipping
See Figure 7.
SystemStability
Parameter
Test Conditions
Min. Typ. Max. Unit
Loop attenuation in Rx RxA to TxA1-TxA2
Speaker gain is 12dB, Mike gain is 14dB 20
dB
dB
Loop attenuation in Tx MICx to SPK1P-SPK1N Analogique sidetone not used
(see DAA schematics)
20
It is possible to add some gain switching in the Tx and Rx path (to reduce the gain of the loop) by using
the GAIN_RCV and GAIN_XMT registers.
17/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
Figure 7 : SPK1 Distortion versus RxA
Rx Softclipping and Distortion
V.3.13 - Low Power Mode
Sleepstatecan beattainedby a SLEEPcommand.
Whenin sleep mode, the dual port RAM is unavail-
able and the clocks are disabled.
When entering the low power mode, the
ST75C530/540stops its oscillator, all theperipher-
als of the DSP core are stopped in order to reduce
the power consumption. The dual port RAM is
made inaccessible.
(mVRMS
103
)
D (%)
12
10
8
The ST75C530/540 can be awakened by a hard-
ware reset, a RINGsignal or a dummywrite at any
location in the dual port RAM.
102
6
There is a maximum time of 20ms to restart the
oscillator after waking up and an additional 5ms
after the interrupt to be able to accept any com-
mand coming from the host.
4
VSPK1 (VRMS
)
Distortion
2
V.3.14 - Reset
After a hardware reset, or an INIT command, the
ST75C530/540 clears all its internal memories,
clears the whole dual port RAM and starts to initial-
ize the delta sigma analog converters. As soon as
these initializations are completed, the
ST75C530/540 generates an interrupt IT6 (com-
mandacknoledge)and is programmed to sendand
receive tones, the sample clock are programmedto
9600Hz.The total duration of the reset sequenceis
about 5ms. After that time the ST75C530/540 is
readyto executecommandssentby thehost micro-
controller.The durationof theresetsignalshouldbe
greater than 700ns.
0
10
102
VMIC2 (mVRMS
103
)
Figure 8 : Speakerand Line Tx Power Spectrums
POWER SPEC1
POWER SPEC2
64Avg
64Avg
0%Ovlp
0%Ovlp
Ftop
Ftop
0.0
0.0
dBm
Speaker Output
RMS
V2
dB
V.4 - Modem Interface
V.4.1 - Analog Interface
RMS
Vv2
Refer to Block Diagram on page 7.
Line Tx
-80.0
-80.0
V.4.2 - General I/O and Relay Interface
16 pins are dedicated to the general I/O port. Two
are dedicatedto Relaydriver. Theequivalentsche-
matic is as follows : see Figure 9.
Fxd Y O
Hz
5k
Note : Acoustic echo from speaker to microphone input with no
local speech. Receiving speech on line input.
Figure 9
GIO0[x]
RELAY[y]
IODIR0[x]
IODATA0[x]
D Q
IORELAY[y]
D Q
N
(write)
(write)
IODATA0[x]
(read)
IORELAY[y]
(read)
RGND
18/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
V.4.3 - Crystal
The crystal frequency must be 44.2368MHz for
ST75C530 and 49.152MHzfor ST75C540 with an
accuracy betterthat 100 ppm. When using a third
harmonic crystal the schematicmust be as follow :
see Figure 10.
The crystal features are :
- third harmonic,
- parallel, load capacitance = 10pF,
- æ 100ppm from 0oC to 70oC,
- RS < 50Ω,
to allow transmission of Modem signal up to -
10dBm and reception up to -10dBm. The OPAmps
are +12/0V powered. With this application sche-
matictheout of band transmitspectrum(from4kHz
to 50kHz) is below -72dBm.
Figures13 and14 are examplesofapplicationsche-
maticswhich respectsgainvalue(respectivelyforfax
and voice application and for Modem application)
andtheminimumdifferentialloadonTxA1andTxA2.
±
V.4.5 - Host Interface
The host interface is seen by the micro as a 128x8
RAM, with additional registers accessible through
an 8-bit address space. A selection Pin (INT/MOT)
allowsto configurethe hostbus for either INTELor
MOTOROLA type control signals.
- ATcut (example : SM55-10 MATEL).
Figure 10
ST75C540
Figure 11
73
72
EXTALL
XTALL
XTAL H3 **
600
1:1
Ω
TxA1
TxA2
+8dB
Line
L*
C2
27pF
COG
-1/2
0.82 H (ST75C530)
0.68µH (ST75C540)
µ
RxA
-10dB
C1
10pF
COG
Cb
10nF
2.2nF
VCM
*
Wire wound inductor recommanded (Example : SIGMA-SC30)
Figure 12
** Thrird harmonic (Example : MATEL-SM55-10)
600Ω
1:1
TxA1
TxA2
XTAL H3 : 44.2368MHz (ST75C530)
49.152MHz (ST75C540)
0dB
Line
-1/2
V.4.4 - Typical Application Schematic
The Figure 11 is a block diagram designedto allow
transmission of fax signals up to +0dBm and sine
wave up to +6dBm on the telephone line. It allows
receptionof faxsignalsup to0dBmand sinewaves
upto +6dBm.Figure12 isa blockdiagramdesigned
RxA
2.2nF
VCM
0dB
19/84
ST75C530 - ST75C540
V - FUNCTIONAL DESCRIPTION (continued)
Figure 13 : Fax Mode
56.2kΩ 1%
270pF
470nF 18.2kΩ 1%
+12V
TxA1
560Ω
TxA2
1:1 *
18.2k 1%
470nF
Ω
470nF
GND
470pF
47.5kΩ
30kΩ 1%
22nF
6.21kΩ 1%
+6V +6V
+12V
470nF
+6V +6V
+6V
+6V
1.2kΩ
2.2nF
RxA
24.3kΩ 1% 470nF
VCM
GND
10kΩ 1%
* Insertion loss = 2.5dB between 0 and 3.4kHz
Figure 14 : Data Mode
24kΩ 1%
270pF
470nF 18.2kΩ 1%
+12V
TxA1
TxA2
560Ω
1:1 *
18.2kΩ 1%
470nF
470nF
GND
470pF
22nF
47.5kΩ
30kΩ 1%
6.21kΩ 1%
+6V +6V
470nF
+12V
+6V +6V
+6V
1.2kΩ
2.2nF
+6V
RxA
470nF
24.3kΩ 1%
GND
VCM
33kΩ 1%
* Insertion loss = 2.5dB between 0 and 3.4kHz
20/84
ST75C530 - ST75C540
VI - USER INTERFACE
VI.1 - Dual Port Ram Description
VI.1.1.4 - Optional Status Area
The dual port RAM is the standard interface be-
tween the host controller and the ST75C530/540,
for either commands or data. This memory is ad-
dressedthrough a 7-bit address bus. The locations
from $00 to $3F are RAM location, while locations
from $40 to $60 are control registers dedicated to
the interrupt handling and the general IO port and
Relay output.
The user can program (through the DOSR com-
mand) the four locations STAOPT[0..3] of the Op-
tional Status Area ($0C to $0F) for the real time
monitoring of four arbitrary memory locations.
VI.1.1.5 - Data Buffer Area
The data area is made of four 8-byte buffers
(see ParagraphVI.1.3 “Host InterfaceSummary”).
Two are dedicated to transmission and the two
others to reception. Each of the four buffers is
attachedto a statusbyte. the meaningof thestatus
byte depends on the selected format of transmis-
sion. Within each buffer, D0 representsthe first bit
in time.
Severalfunctionalareasare definedin thedualport
RAM mapping :
- the command area,
- the report area,
- the status area,
- the optional status area,
- the data buffer area,
- the interrupt control area,
- the general I/O and Relay Output area.
VI.1.1.6 - VOCODER Buffer Area
(VOCODERMode)
This area is made of a 18+2 byte buffer.Thisbuffer
contains the VOCODER frame. The first 18 bytes
VOCDATA contain the coded frame and the other
2 bytes VOCCORR the Error corrections bit (only
valid in low bit rate mode).
In theReceive Mode (CODER)the ST75C530/540
codes the received samples and writes the corres-
ponding bytes in the buffer.If the low bit rate mode
is selected,the ST75C530/540computesthe Error
corrections 2 bytes and writes them in the buffer.
In the Transmit Mode (DECODER) the
ST75C530/540reads the 18 coded bytes decodes
them and sends the signal to the analog output. In
the low bit rate mode if the Error Correction is
enabled, prior the decoding, the ST75C530/540
reads the 2 Error Correction Bytes and, if any,
corrects the first 18 bytes.
VI.1.1 - Mapping
VI.1.1.1- CommandArea
The command area is located from $00 to $04.
Address $00 holds the command byte COMSYS,
and the next four locations hold the parameters
COMPAR[0..3].The commandparametersmust be
enteredbefore the command word is issued. Once
thecommandhasbeenentered,thecommandbyte
isresetandan acknowledgereportis issued. Anew
command should not be issuedbeforetheacknow-
ledge counter COMACK is incremented.
VI.1.1.2- Report Area
The report area is located from address $05 to
address $07. Location $05 holds the acknowledge
counter COMACK. Each time a command is ac-
knowledged, the report bytes COMREP[0..1] (if
any) are written by the ST75C530/540 into loca-
tions $06 and $07, and the content of COMACK is
increme nted. This count er allows the
ST75C530/540 to accurately monitor the com-
mand processing.
A mechanism of flags to share the buffer access
betweenthe ST75C530/540and thehostcontroller
is controlled by the VOCSTA byte :
- In CODER mode, when the ST75C530/540 has
finis-hed writing the VOCDATA and VOCCORR
bytes, it writes $14 in VOCSTA and generate an
Interrupt IT1. The host must read the Data buffer
then clear the VOCSTAbyte.
VI.1.1.3- Status Area
The statusarea is locatedfromaddress$08 to $0B.
TheerrorstatuswordSYSERRislocatedat address
$08.This errorstatusword isupdatedeachtime an
error condition occurs. An optional interruption IT0
may additionallybe triggeredin the case of an error
condition. Locations$09 and $0A hold the general
statusbytesSTATUS[0..1].The meaning of the bits
dependsonthemodeof operation,andis described
inChapter VIII.The third byte at address$0B holds
the Quality Monitor byte STAQUA.
- In DECODER mode, the host must feed the
VOCDATAand, optionaly,the VOCCORR bytes,
then write $14 (if low bit rate) or $12 (if ADPCM)
in VOCSTA. The ST75C530/540 will read the
VOCDATA and VOCCORR bytes, clear the
VOCSTA and generate an Interrupt IT1. A si-
lence frame can be generated, in either low bit
rate or ADPCM mode, by writing 00 in all the
VOCDATA buffer, including the Error Correction
Bytes VOCCORR.
21/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
VI.1.1.7- Interrupt Control Area
writing a zero at one of the memory location $40 to
$46 (Reset Interrupt Register ITRES[0..6]) will re-
set the corresponding interrupt (and thus acknow-
ledgeit). The source of the interrupt can be masked
globally or individually using the Interrupt Mast
register ITMASK located at $4F.
The interrupt area, that start after the address $40
controls the behaviour of the Interrupts mecha-
nism. Register ITSRCR defines the source of the
interrupt, the register ITMASK allows independent
enabling or disabling of any of the interrupt’s
source, registers ITREST0 to ITREST6 reset the
corresponding interrupt source.
The interrupt sources are :
- IT0 : Error
Theseregistersarenotaffectedby a INITcommand,
they are only reseted by a Hardware RESETsignal.
This signifies that an error has occurred and the
error code is available in the error status byte
SYSERR. This byte canbe selectivelycleared by
the CSE command.
VI.1.1.8 - General IO and Relay Output Area
A set of 5 registers is directly accessible by the
controller to program the General IO pins and
Relay Outputs (see Paragraph VI.1.3 “Host Inter-
face Summary”). Two registers IODIR0 and IO-
DIR1 define the type of the IO pin, either Input or
Output (0 = input, 1 = output), and two registers
IODATA0 and IODATA1 define the IO pin signals.
The fifth register defines the Relay output signals.
Theseregistersarenotaffectedby a INITcommand,
they are only reseted by a Hardware RESETsignal.
The general IO are setup as input after the power
up or an hardware RESET. The relay output are
open after power up or an hardware RESET.
- IT1 : VOCODER Buffer
Each time the ST75C530/540 have coded a
frame (CODER Mode) or decoded a frame (DE-
CODER Mode) this interrupt is generated.
- IT2 : Tx Buffer
Each timethe ST75530/C540frees a databuffer,
this interrupt is generated.
- IT3 : Rx Buffer
Each time the ST75C530/540 has filled a data
buffer, this interrupt is generated.
- IT4 : Status Byte
This signifies that the status byte has changed
and must be checked by the controller.
- IT5 : Low Power Mode
VI.1.2 - Interruptions
TheST75C530/540hasbeenawakenedfromthe
low power mode by a low level on the RING pin
or a dummy write issued by the host.
The ST75C530/540 can generate 7 interrupts for
the controller. The interrupt handling is made with
a set of registers located from $40 to $5F.
- IT6 : CommandAcknowledge
The interruptions generated by the ST75C530/540
come from several sources. Once the
ST75C530/540raises an interrupt,a signal(SINTR)
is sent to the controller. The controller has then to
processtheinterruptandclearit.Theinterruptsource
can be examined in the interrupt source register
ITSRCR located a $50. According to the ITSRCR
bits, the interrupt source can be determined. Then
This signifies that the ST75C530/540 has read
the last command entered by the host, incre-
mented the command counter COMACK, and is
ready for a new command.
Note : Interrupt registers are cleared after a Hard-
ware RESET. These registers are not affected by
a INIT Command.
22/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
Figure 15 : Functional Schematic
ITREST 0
(write only)
R
S
Q
Q
Q
Q
Q
Q
Q
IT0 : Error
ITREST 1
(write only)
R
S
IT1 : VOCODER
Buffer
ITREST 2
(write only)
R
S
IT2 : Tx Buffer
IT3 : Rx Buffer
IT4 : Status
ITREST 3
(write only)
R
S
ITREST 4
(write only)
R
S
ITREST 5
(write only)
R
S
IT5 : Low Power
ITREST 6
(write only)
R
S
IT6 : Command
0
ITSRCR
(read only)
6
5
4
3
2
1
SINTR
(open drain)
ITMASK
(read write)
7
6
5
4
3
2
1
0
23/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
VI.1.3 - Host Interface Summary
Address (hex)
Description
Size (Byte)
Mnemonic
COMMAND AREA
$00
Command
1
4
COMSYS
$01-$04
Command Parameters
COMPAR[0..3]
REPORT AREA
$05
Acknowledge Counter
Report
1
2
COMACK
$06-$07
COMREP[0..1]
STATUS AREA
$08
Error Status
1
2
1
3
SYSERR
$09-$0A
$0B
General Status
Quality Monitor
Optional Report
STATUS[0..1]
STAQUA
$0C-$0F
STAOPT[0..3]
DATA BUFFER AREA (FAX Modes and Data Modes)
$1C
Data Rx Buffer 0 Status
Data Rx Buffer 0
1
8
1
8
1
8
1
8
DTRBS0
$1D-$24
$25
DTRBF0[0..7]
DTRBS1
Data Rx Buffer 1 Status
Data Rx Buffer 1
$26-$2D
$2E
DTRBF1[0..7]
DTTBS0
Data Tx Buffer 0 Status
Data Tx Buffer 0
$2F-$36
$37
DTTBF0[0..7]
DTTBS1
Data Tx Buffer 1 Status
Data Tx Buffer 1
$38-$3F
DTTBF1[0..7]
VOCODER BUFFER AREA (Vocoder Mode)
$1C
Vocoder Buffer Status
Vocoder Buffer Data
1
18
2
VOCSTA
$1D-$2E
$2F-$30
VOCDATA
VOCCORR
Vocoder Buffer Corrector
INTERRUPT AREA
$40-$46
$4F
Reset Interrupt Register
Interrupt Mask Register
Interrupt Source Register
7
1
1
ITREST[0..6]
ITMASK
$50
ITSRCR
GENERAL IO AND RELAY
$60
$61
$62
$63
$64
I/O Direction 0
1
1
1
1
1
IODIR0
I/O Direction 1
I/O Data 0
IODIR1
IODATA0
IODATA1
IORELAY
I/O Data 1
I/O Relay Register
Note : Registers which address is higher or equal to $40 are not affectedby a INIT Command or a Low Power wake-up. They are reseted
only by a Hardware RESET.
24/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
VI.2 - Command Set
The Command Set has the following attractive
features :
- user friendly with easyto remembermnemonics,
- possibility of straightforwardexpansion with new
commands to suit specific customer require-
ments,
- easy upgrade of existing softwareusing previous
modem based SGS-THOMSON products.
SYNC
CSE
FAXSynchronize.Start/Stopof FAXHalf-
duplex receiver. Parametric command.
ClearStatusError.SelectivelyclearstheError
statusbyteSYSERR.Parametriccommand.
SETGN Set Gain. This command sets the global
gainfactor,which is usedfor thetransmit
samples. Parametric command.
VI.2.1.2 - Data Communication Commands
The commandsethasbeendesignedto providethe
necessaryfunctionalcontrolon theST75C530/540.
Each command is classified accordingto its syntax
and the presence/absence of parameters. In the
case of a parametric command, parameters must
first be written into the dual port RAM before the
command is issued. Acknowledge and error report
is issued for each command entered.
XMIT
Transmit Data. Start/stop the
transmission of data. After a XMIT
command,the ST75C530/540sendsthe
data contained in its dual port RAM.
FORM Selects the Transmission Format. This
command configures the data interface
for both receiver and transmitter
according to the selected data format.
Parametric command (HDLC, UART or
synchronous).
VI.2.1 - Command Set Summary
VI.2.1.1 - Operational Control Commands
INIT
Initialize. Initialize the modem engine.
Set all parametersto their default values
and wait for commands of the control
processor. Non parametric command.
VI.2.1.3 - Memory Handling Commands
MWI
MWLO
MW
Memory Write Indirect
Memory Write Low Word
MemoryWrite. This command is used to
write an arbitrary 16-bit value into the
writable memory location currently
specified by a parameter. Parametric
command.
IDT
Identify.Returnthe productidentification
code. Non parametric command.
SLEEP Turn to low power mode, the
ST75C530/540 enters the low power
mode and stops its crystal oscillator to
reducepower consumption.Inthismode
all the clocks are stopped and the dual
RAM is unreachable.
MRI
MRLO
MR
Memory Read Indirect
Memory Read Low Word
HSHK
Handshake. Begins the handshake
sequence.The modemengine generates
all the sequences defined in the ITU-T
recommendations. A status report
indicatesto thecontrolprocessorthestate
of the handshake. This command only
applies to modes where a handshake
sequence is defined. A CONF command
must havebeen issued prior to the use of
HSHK. Non parametric command.
FAX Stop. Stop FAX Half-duplex
transmitter. Non parametric command.
Retrain. Begin a retrain sequence in
V.32bis/V.32 or V.22bis modes as
MemoryRead.Thiscommandallowsthe
controller to read any of the ERAM or
CROM (ST75C530/5 40 memo ry
spaces) location without interrupting the
processor. Parametric command.
Complex Read. This command allows
the controller to read at the same time
the real and imaginary part of a complex
value stored in a double ERAM or
CROM location. This feature is very
interesting for eye pattern software
control and for equalization monitoring.
This command insures that the real and
imaginary parts are sampled in the
memory at the same time (integrity).
Parametric command.
CR
STOP
RTRA
described
in
the
ITU-T
recommendations(ST75C540 only).
25/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
VI.2.1.4 - Configuration Control Commands
TDWW Write Tone Detector Wiring. Write one
Tone Detector Wiring connection.
Parametric command.
ASEL Select the Analog path option, like
Microphone input, Speaker attenuation.
Parametric command.
CONF Configure. This command configuresthe
modem engine for data transmission and
handshake procedures (if any) in any of
the supported modes. The transmission
parametersare set to their default values
and can be modified with the MODC
command. Parametric command.
MODC Modify Configuration. This command
allows modification of some of the
parameters which have been set up by
the CONF command. It can also be used
to alter the mode of operations (short
train). Parametric command.
DOSR Define Optional Status Report. This
command allows the modification of the
optionalstatusreport locatedin thestatus
area of the dual port RAM. One can thus
select a particular parameter to be
monitored during all modes of operation.
Parametric command.
TDZ
Clear Tone Detector Cell. Clear internal
variables of a Tone Detector Cell.
Parametric command.
VI.2.1.7 - Miscellaneous Commands
CALL Call a Subroutine. Call a subroutine with
one Parameter. Parametric command.
JSR
Call a Low Level Subroutine. Call an
internal subroutine with one parameter.
Parametric command.
VI.3 - Command Set Short Form
CCI Command
Mnemonic Value
Description
XMIT
SETGN
SLEEP
HSHK
RTRA*
INIT
0x01
0x02
0x03
0x04
0x05
0x06
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x10
0x11
0x12
0x13
0x14
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x20
0x21
0x25
0x26
0x28
0x29
0x2A
0x2B
Transmit Data
Set Transmit Gain
Power Down the ST75C530/540
FAX Start Transmitter
Retrain (V.32bis/V.32 and V.22bis)
Initialize (Software Reset)
Clear Error Status Word
Define Data Format
CSE
DSIT
Define Status Interrupt. This command
allows the programming of the status
word bit that will generate an Interrupt to
the controller. Parametric command.
FORM
DOSR
ASEL
TONE
TGEN
DEFT
MR
Define Optional Status Report
Select the Analog Path Options
Generate Predefined Tones
Enable Tone Generator
Define Arbitrary Tone
VI.2.1.5 - Tone Generation Commands
TONE SelectTone.Programsthetonegenerator(s)
for the desired default tone(s). Additional
mnemonics provide quick programming of
DTMF tones or other currently used tones.
Parametric command.
DEFT Define Tone. Programs the tone
generator(s) for arbitrary tone synthesis.
Parametric command.
Memory Read
CR
Complex Read
MW
Memory Write
DSIT
Define Status Interrupt
ReturnProductIdentification Code
Call a Low Level Routine
Call a Routine
IDT
JSR
CALL
TDRC
TDRW
TDWC
TDWW
TDZ
Tone Detector Read Coefficient
Tone Detector Read Wiring
Tone Detector Write Coefficient
Tone Detector Write Wiring
Tone Detector Clear Cell
Configure
TGEN Tone Generator Control. Enables or
disables the tone generator(s).
Parametric command.
VI.2.1.6 - Tone Detection Commands
CONF
MODC
STOP
SYNC
MRI
TDRC Read Tone Detector Coefficient. Read
one Tone Detect or Coefficient.
Parametric command.
TDWC Write Tone Detector Coefficient. Write
one Tone Detect or Coefficient.
Parametric command.
TDRW Read Tone Detector Wiring. Read one
Tone Detector Wiring connection.
Parametric command.
Modify Default Configuration
FAX Stop Transmitter
FAX Synchronize Receiver
Memory Read Indirect
Memory Read Low Word
Memory Write Indirect
Memory Write Low Word
MRLO
MWI
MWLO
* ST75C540 only.
26/84
ST75C530 - ST75C540
VI - USER INTERFACE (continued)
VI.4 - Status - Reports
VI.4.1 - Status
The ST75C530/540 has a dedicated statusreport-
ing area located in its dual port RAM. This allow a
continuousmonitoring of the statusvariables with-
out interrupting the ST75C530/540.
The first status byte gives the error status. Issuing
of an error status can also be flagged by a mask-
able interrupt for the controller. The signification of
the error codes are given in Chapter VIII.
VI.5.1.1 - Transmit
The controller must first fill at least the first buffer
of data (Tx Buffer 0) with the bits to be transmitted.
In order to perform this operation, the controller
must first check the Tx Buffer 0 status word
DTTBS0. If this buffer is empty, the controller fills
the data buffer locations (up to 64 bits), and then
writesin DTTBS0 the numberof bytescontained in
the buffer. The controller can then either proceed
with the second buffer or initiate the transmission
with a XMIT command.
The second and third status bytes give the general
status of the modem. These status include for
example the ITU-T circuit status and other items
described in Chapter VIII “STATUS DESCRIP-
TION”. These two status can generate, when a
change occurs, an interrupt to the controller ; each
bit of the two byte word can be masked inde-
pendently.
TheST75C530/540copiesthe contentsof thedata
buffer and then clears the buffer status word in
order to make it again available, then generatesan
IT2 interrupt. The number of bytes specifiedby the
status word is then queued for transmission. The
processgoes on with the two buffers until an XMIT
command stops the transmission. After the finish-
ing XMIT command has been issued, the last buff-
ers are emptied by the ST75C530/540.
The forth byte gives in real time a measure of the
receptionquality.Thisinformationmaybe usedbythe
controllerto monitorthe qualityof the receivedbits.
Four other locations are dedicated for custom
status reporting. The controller can program the
ST75C530/540for a real time monitoring of any of
its internal RAM location. High byte or low byte of
any word can thus be monitored.
Errors occur whenboth buffersare emptywhile the
transmit bit queue is also empty. Error is signalled
with an IT0 interruption to the controller.
VI.5.1.2 - Receive
The controller should take care of releasingthe Rx
buffers before the Data Carrier Detect goes true.
This is made by writing zero in the Rx BufferStatus
0 and 1. The ST75C530/540 then fills the first
buffer,and once filled sets the statusword with the
number of bytes received and then generates an
IT3 interrupt. It then takes control of the second
buffer and operates the same way. The controller
must check the status of the buffers and empty
them. Once the data read, the controller must
release the used bufferand wait for the nextbuffer
to be filled.
VI.4.2 - Reports
The ST75C530/540 features an acknowledgeand
report facility. The acknowledge of a command is
monitored by a counter COMACK located in the
dual port RAM. Each time a command is read from
the command area, the ST75C530/540 will incre-
mentthiscounter. For instance, when a MR (Mem-
ory Read) command is issued, the data is first
written in the report area, and the counter is incre-
mentedafterwards.Thisway of processinginsures
data integrity and gives additional synchronization
between the controller and the data pump.
Error occurs when both buffers are declared full,
and incoming bits continue to arrive from the line.
Error is signaled by an IT0 interrupt.
VI.5 - Data Exchanges
The ST75C530/540 accepts many kinds of data
exchange: thedefaultmode usesthe synchronous
parallel exchange. Other modes include HDLC
framing support and UART. Detailed description of
the Data Buffer Exchanges modes is available in
the paragraph X.
VI.5.2 - HDLC Parallel Mode
This mode implements part of the High Level Data
Link Control formats and procedures. It is well
suited for error correcting protocols like ECM or
FAXT4/T30recommendations.It supportsthe flag-
ginggeneration,16-bitFrameCheck Sequence,as
well as the Zero insertion/deletion mechanism.
VI.5.1 - SynchronousParallel Mode
The data exchanges are made through the dual
port RAM and are byte synchronousoriented. The
double buffer facilities of the ST75C530/540allow
an efficient buffering of the data.
VI.5.3 - UART Parallel Mode
This mode implement a 7 or 8 bit data format, it is
well suited for Caller ID or Minitel applications.
27/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION
Commands are presented according to the following form :
COMMAND
Command Name Meaning
COMMAND
Opcode
Hexadecimal digit
X
X
X
X
X
X
X
X
Synopsis Short description of the functions performed by the command.
Parameters
Field
Name
Byte
X
Pos.
b..a
Value
Definition
Explanation of the parameter
Default value
xx *
Field
Byte
Pos.
Name of the addressed bit field.
Index (or addressin the dual port RAM) of the parameter byte (from 1 to 4).
Bit field position inside the parameter byte. Can either be a single position (from 0 to 7, 0
being LSB) or a range.
Value
Possiblevaluesforthebit(resp.bitfield).Rangemeansallvaluesareallowed.Astarmeansa default
value.Valuesareexpressedeitherundertheformof a bit string, or underhexadecimal format.
ASEL
ASEL
Opcode:
0B
0
0
0
0
1
0
1
1
Synopsis Select the analog path options. This command select the Attenuation/Mute of the outputs
TxA1/TxA2 and SPK1/SPK2/SPK3.This command select also the source of the Mic signal
MIC1/MIC2/MIC2 and the source of the Line Signal RxA/MIC3.
Parameters
Field
ASEL_ASPK1
Byte
1
Pos.
7..4
Value
Definition
0000* Infinity attenuation
0001 30dB attenuation
0010 27dB attenuation
...
...
1010 3dB attenuation
1011 0dB attenuation
Other Reserved
ASEL_MICSEL
2
1..0
00*
01
10
11
Select Rx input as MIC1
Select Rx input as MIC1
Select Rx input as MIC2
Select Rx input as MIC3
ASEL_LINESEL
ASEL_ESPK1
ASEL_ESPK2
ASEL_ESPK3
ASEL_MTXA
2
2
2
2
2
2
3
4
5
7
0*
1
0*
1
0*
1
0*
1
Select RxA as line input
Select Mic3 as line input
SPK1 output muted
SPK1 output normal
SPK2 output muted
SPK2 output normal
SPK3 output muted
SPK3 output normal
0*
1
TxA output normal
TxA output muted
CALL
Call a Subroutine
CALL
Opcode:
19
0
0
0
1
1
0
0
1
Synopsis CALL allows to execute a part of the ST75C530/540 firmware with a specific argument.
Field
C_ADDR_L
C_ADDR_H
C_DATA_L
C_DATA_H
Byte
Pos.
7..0
7..0
7..0
7..0
Value
Definition
Low byte of the call address
High byte of the call address
Low byte of the argument
High byte of the argument
Parameters
1
2
3
4
This instruction can be used with SGS-THOMSON Microelectronics Application Laboratory Support for
special applications development or debuggingneeds. Contact your local representative.
28/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
Configure for Operations
CONF
CONF
Opcode :
20
0
0
1
0
0
0
0
0
Synopsis CONF allows the complete definition of the ST75C530/540operation, including the mode of
operation (Tone, FAX Transmit, Voice Transmit, Voice Receive, DTMF Receiver, ...) and the
Modem or Vocoder Parameters (Standard, speed, ...). According with the 4 first bits of the
CONF Parameter the ST75C530/540 is put into the following mode of operation.
Detectors
CONF_
OPER
Mode
Tone (2) Tone (3) DTMF Ring VAD V.21 Flag CPT (5) Answ (6)
0000*
0001
0010
0100
1000
1001
1100
1111
Other
TONE
TONECID(1)
DECODER
TRANSPARENT
CODER
16
6
4
4
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes No
Yes No
Yes No
No No
Yes Yes
No No
No No
Yes
Yes
No
Yes
Yes
No
Yes
No
No
Yes
No
No
No
No
0
4
6
4
No
Yes
No
0
4
No
ROOM-MONITOR
HANDSET/HANDSFREE
MODEM
0
4
No
No
0
2
No
No
0
4 (7)
Yes (4) No No
Yes
Yes (4)
Reserved
Notes :
1. This mode includes V.23/Bell202 FSK Demodulator and UART.
2. This primary Tone Detectors allows Detection of signal up to 3.3kHz. (Sampling Rate 7.2kHz).
3. Thissecondary ToneDetectorsallowsDetectionofsignalupto1.8kHz(withSamplingRate4.8kHz) or upto3.3kHz (withSamplingRate9.6kHz).
4. The DTMF detector and Call Progress Tone detector (CPT) are available only for V.21 Channel 2.
5. STA_CPT0, STA_CPT1 and STA_CPT10 in STATUS0.
6. STA_CCITT and STA_AT in STATUS1.
7. Not available in V.32bis/V.32.
29/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
Parameters When the CONF_OPERis setto F, selecting the Modem Mode of operation,the parameters
have the following meaning :
Field
CONF_OPER
CONF_ANAL
Byte
Pos.
3..0
4
Value
Definition
1
1
1111 Select Modem Mode
0
1
Normal mode
Analog loop back (test mode only)
CONF_PSTN
CONF_AO
1
1
1
2
5
6
0
1
PSTN (carrier detect set to -43/-48dBm)
Leased line (carrier detect -33/-38dBm)
0
1
Answer mode
Originate mode
CONF_DTINIT
(only in tone mode)
7
0
1
Global init of secondary tone detector
Partial init of secondary tone detector (8)
CONF_MODE
5..0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
Automode (V.32bis/V.32/V.22bis/V.22) (9)
Bell 103 (full duplex)
Bell 212A (full duplex) (9)
V.21 (full duplex)
V.23 (full duplex)
V.22 (full duplex) (9)
V.22bis (full duplex) (9)
V.27ter
V.29
V.17
V.32 (full duplex) (9)
V.32bis (full duplex) (9)
V.33 (half duplex)
V.21 channel 2
Other Reserved
CONF_TXEQ
2
7..6
0
1
2
3
No transmit equalizer
Transmit equalizer #1
Transmit equalizer #2
Transmit equalizer #3 (V.17/V.33/V.29/V.27ter)
CONF_CAR
CONF_TCM
CONF_SP0
3
3
3
0
1
0
1
1800Hz carrier (V.17/V.33 only)
1700Hz carrier (V.17/V.33 only)
0
1
Treillis coding not allowed (V.32 only)
Treillis coding allowed (V.32bis, V.32)
7..4
xxx1 1200bps allowed (V.22, V.22bis) (10)
xx1x 2400bps allowed (V.22bis, V.27) (10)
x1xx 4800bps allowed (V.32bis, V.32, V.27, V.29) (10)
1xxx 7200bps allowed (V.32bis, V.29, V.17) (10)
CONF_SP1
4
2..0
xx1
x1x
1xx
9600bps allowed (V.32bis, V.32, V.29, V.17) (10)
12000bps allowed (V.32bis, V.17, V.33) (10)
14400bps allowed (V.32bis, V.17, V.33) (10)
Notes :
8.
9.
With conf 80 00 00 00 the coefficients of secondary tone detectors are not initialized.
ST75C540 only.
10. V.22bis, V.22, V.32bis and V.32 modes ST75C540 only.
30/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
Parameters CODER andDECODER Modes
In the VOCODER Modes, either CODER or DECODER, (CONF_OPER equals 2 or 8) the
parametershave the following meaning :
Field
Byte
Pos.
3..0
0
Value
Definition
CONF_OPER
CONF_CODE
1
3
-
Define mode : see table above
0
1
Low bit rate coded
ADPCM coded
CONF_VPF
3
3
1
0
1
Decoder post filter off
Decoder post filter on (not in ADPCM)
CONF_VASP
3..2
00
01
10
11
ADPCM 32000 bps
ADPCM 24000 bps
ADPCM 16000 bps
Reserved
CONF_EC
3
3
3
3
4
5
6
7
0
1
Line echo canceller disabled
Line echo canceller enabled
CONF_SRC
0
1
Coder source is line input
Coder source is audio input
CONF_SUPSIL
CONF_ERCOR
0
1
Coder silence supressor disabled
Coder silence supressor enabled
0
1
Low bit rate decoder disable error correction
Low bit rate decoder enable error correction
Parameters ROOM-MONITOR Mode
In the ROOM MONITOR Mode (CONF_OPER equals 9) the parameters have the following
meaning :
Field
CONF_OPER
CONF_EC
Byte
Pos.
3..0
4
Value
Definition
1
3
1001 Define ROOM-MONITOR mode
0
1
Line echo canceller disabled
Line echo canceller enabled
Parameters HANDSET/HANDSFREE Mode
In the HANDSET/HANDSFREE mode (CONF_OPER equals C), the parameters have the
following meaning:
Field
Byte
Pos.
3..0
6
Value
Definition
CONF_OPER
CONF_INHINI
1
3
1100 Define HANDSET/HANDSFREE mode
0
1
Init all telephony parameters
Disable init of telephony parameters
CONF_HFREE
CONF_LEC
3
4
4
4
4
4
4
7
0
1
2
3
4
5
0
1
Handset mode
Handsfree mode
0
1
Line echo canceller enabled
Line echo canceller disabled
CONF_AEC
0
1
Audio echo canceller enabled
Audio echo canceller disabled
CONF_FULLD
CONF_SOFTRx
CONF_AGC
0
1
Full duplex mode enabled
Half duplex mode enabled
0
1
Softclipping enabled on Rx
Softclipping disabled on Tx
0
1
AGC active
AGC frozen
CONF_SOFTTx
0
1
Softclipping enabled on Tx
Softclipping disabled on Rx
31/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
CR
Opcode:
Complex Read
CR
11
0
0
0
1
0
0
0
1
Synopsis
CRallowsthereadingofa complexparameter.Theparameterspecifiestheparameteraddress(for
the real part : the imaginary part is next location). CR returns the high byte valueof bothreal and
imaginary partof theaddressedcomplex parameter(see ChapterVIII“STATUS DESCRIPTION”).
Parameters
Field
CR_ADDR_L
CR_ADDR_H
Byte
1
2
Pos.
7..0
7..0
Value
Definition
Low byte of the 16-bit address
High byte of the 16-bit address
CSE
Opcode:
Clear Error Status
CSE
08
0
0
0
0
1
0
0
0
Synopsis
CSE is used to clear the ST75C530/540 error status SYSERR byte. It is also used as an
acknowledge to the error condition handler.
Parameters
Field
ERR_MASK
Byte
1
Pos.
7..0
Value
Definition
Error mask. See report appendix for detailed meaning
DEFT
Opcode:
Define Arbitrary Tone
DEFT
0E
0
0
0
0
1
1
1
0
Synopsis
DEFT programs one of the four tone generatorfor arbitrary tone generation.The parameter
is the frequencyof the generatedtone expressed in Hertz between 0 and 3600Hz.
Parameters
Field
TONE_GEN_SL
Byte
1
Pos.
1..0
Value
Definition
Index of the tone generator (3..0)
TONE_FREQ_L
TONE_FREQ_H
TONE_SCALE
2
3
4
7..0
7..0
7..0
Low byte of the frequency
High byte of the frequency (internally masked with 0F)
Amplitude scaling factor (high byte)
3F gives the nominal amplitude
DOSR
Opcode:
Define Optional Status Report
DOSR
0A
0
0
0
0
1
0
1
0
Synopsis
DOSR specifies the address of the RAM variables to be monitored in the 4 locations
STAOPT[0..3] of the dual port RAM. It also specifies the assignment within the 4 locations.
Parameters
Field
STA_OPT_ASS
STA_OPT_ADL
Byte
1
2
Pos.
1..0
7..0
Value
0..3
Definition
Index of the STAOPT destination
Low byte of source address
STA_OPT_ADH
STA_OPT_HL
3
3
3..0
7
High byte of source address
0
1
Select low byte of source
Select high byte of source
32/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
DSIT
Opcode:
Define Status Interrupt
DSIT
13
0
0
0
1
0
0
1
1
Synopsis
DSIT specifies the bit mask used with the STATUS[0] and STATUS[1] byte to generate an
interrupt IT4 to controller. Each time a bit change happens in the status words, assuming
the correspondingbit mask will be set, an interrupt will be generated.
Parameters
Field
STA_IT_MSK0
STA_IT_MSK1
Byte
1
2
Pos.
7..0
7..0
Value
Definition
Status[0] bit mask pattern
Status[1] bit mask pattern
Note :
The default IT Status is 0x3F for STATUS[0]and 0xFF for STATUS[1].
FORM
Select Transmission Format
FORM
Opcode:
09
0
0
0
0
1
0
0
1
Synopsis
FORM defines the type of transmission used on the line.
Parameters
Field
X_SYNC
Byte
1
Pos.
2..0
Value
Definition
000* Synchronous format
(1)
001
010
011
100
Transmit continous “1”
HDLC framing
Transmit continous ”0” (1)
UART
X_ANBIT
X_APAR
2
2
1..0
3..2
00
01
00
01
10
7 Bit per character
8 Bit per character
No parity
Even parity
Odd parity
X_ASTOP
2
5
0
1
1 stop bit(1)
2 stop bit(1)
Note :
1. Valid only when transmitting.
HSHK
Handshake
HSHK
Opcode:
04
0
0
0
0
0
1
0
0
Synopsis
HSHK is used to command the ST75C530/540to begin the transmit handshakesequence
processing. The progress of the handshakeis reported to the control processor.
Parameter Non parametric command.
33/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
IDT
Identify
IDT
Opcode:
14
0
0
0
1
0
1
0
0
Synopsis
IDTReturntheST75C530/540HardwareandSoftwarereleasenumber.SeeparagraphVIII.1.4.
Parameter Non parametric command.
INIT
Initialization
INIT
Opcode:
06
0
0
0
0
0
1
1
0
Synopsis
INIT forces the ST75C530/540to reset all parameters to their default conditions and restart
operations.
Parameter Non parametric command.
Note :
This command makes a software reset of the ST75C530/540 and so cannot have the regular handshake protocol. It
does not increment the COMACK, neither generate an Interrupt.
JSR
Call a Low Level Subroutine
JSR
Opcode:
18
0
0
0
1
1
0
0
0
Synopsis
JSR allows to execute a part of the ST75C530/540 firmware with a specific argument.
Parameters
Field
Byte
Pos.
Value
Definition
Low byte of the call address
C_ADDR_L
1
7..0
C_ADDR_H
C_DATA_L
C_DATA_H
2
3
4
7..0
7..0
7..0
High byte of the call address
Low byte of the argument
High byte of the argument
This instruction can be used with SGS-THOMSON Microelectronics Application Laboratory Support for
special applications development or debuggingneeds. Contact your local representative.
34/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
MODC
Modify Configuration
MODC
Opcode:
21
0
0
1
0
0
0
0
1
Synopsis
MODC allows the modification of the parameters defined by the CONF command.
Parameters
Field
MODC_SDM
Byte
1
Pos. Value
Definition
0
0
1
Normal data mode
Short data mode (e.g. TVR) (5)
MODC_DV21F
MODC_DDTMF
MODC_DTDT4
MODC_DTDT16
MODC_SH
1
1
1
1
1
1
2
1
0
1
Normal V.21ch2 (1)
Disable V.21ch2 flag detector
2
0
1
Normal DTMF detector (1)
Disable DTMF detector
3
0
1
Normal secondary tone detector (1)
Disable secondary tone detector
4
0
1
Normal primary tone detector (1)
Disable primary tone detector
6
0*
1
Normal training sequence
Short training sequence (2)
MODC_FS
7
0*
1
Secondary tone detector sampling frequency is 4.8kHz
Secondary tone detector sampling frequency is 9.6kHz
MODC_V22G (6)
1..0
00*
01
10
No guard tone
1800Hz guard tone (V.22bis/V.22)
550Hz guard tone (V.22bis/V.22)
MODC_FPT
2
2
3..2
4
00*
01
No echo protection tone
Long echo protection tone (180ms) (4)
10
Short echo protection tone (30ms) (4)
Answer mode : generate answer tone for handshake
Originate mode : wait answer tone for handshake
Answer mode : do not generate answer
Originate mode : do not wait answer tone
Cut answer tone when receiving AA (V.32bis, V.32)
Continue answer tone when receiving AA.
Enable V.32bis/V.32 autoretrain on quality.
Disable V.32bis/V.32 autoretrain on quality.
MODC_NOTA (6)
0*
1
MODC_NOSA (6)
2
2
3
6
7
0*
1
0*
1
(6)
MODC_NOQA
MODC_ADCFD
0..3
0000* Low bit rate decoder voice frame duration 30ms (nominal)
0001 Low bit rate decoder voice frame duration 35ms (+16%)
0010 Low bit rate decoder voice frame duration 40ms (+33%)
0011 Low bit rate decoder voice frame duration 45ms (+50%)
1111 Low bit rate decoder voice frame duration 25ms (-16%)
1110 Low bit rate decoder voice frame duration 20ms (-33%)
1101 Low bit rate decoder voice frame duration 15ms (-50%)
0111 Low bit rate decoder pause
Other Reserved
MODC_COD
MODC_LEC
3
4
4
4
4
4
4
5
0
1
2
3
4
5
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Low bit rate coder disabled
Low bit rate coder enabled(3)
Line echo canceller enabled
Line echo canceller disabled
MODC_AEC
Audio echo canceller enabled
Audio echo canceller disabled(3)
MODC_FULLD
MODC_SOFTRx
MODC_AGC
Full duplex mode enabled
Half duplex mode enabled
Softclipping enabled on Rx
Softclipping disabled on Rx
AGC active
AGC frozen
Softclipping enabled on Tx
Softclipping disabled on Tx
MODC_SOFTTx
Notes :
1. In the modes where they are active.
2. Short train sequence must be preceded by at least one successful long train sequence at the same data rate. For
V.17 a successful long train at any data rate must preceded the short train.
3. Only coder or decoder can be enabled at the same time.
4. Only when sending V.17, V.33, V.29 or V.27ter.
5. French Minitel Application (TVR : TeletelVitesse Rapide).
6. ST75C540 only
35/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
MR
Memory Read
MR
Opcode:
10
0
0
0
1
0
0
0
0
Synopsis
MR allowsthereadingof a 16-bitparameter.The parameterspecifiestheparameteraddress.
Field
Byte
Pos.
7..0
7..0
Value
Definition
Low byte of the 16-bit address
High byte of the 16-bit address
Parameters
MR_ADDR_L
MR_ADDR_H
1
2
MRI
Memory Read Indirect
MRI
Opcode:
28
0
0
1
0
1
0
0
0
Synopsis
MRI allows the reading of a 16-bit parameter. The parameter specifies an indirect address.
Refer to the “RAM Mapping Application Note” (delivered on request according to revision
number). The advantageto use MRI instead of MR is that the Indirect Address is constant
over the differentrelease of the product.
Parameters
Field
Byte
Pos.
Value
Definition
MRI_IADDR
1
7..0
Indirect Address
MRLO
Memory Read Low Word
MRLO
Opcode:
29
0
0
1
0
1
0
0
1
Synopsis
MRLOallows the readingof thememorylocation whichaddress coresponds to theprevious
MR or MRI Absolute Adress minus 1. This command must be preceded by a MR or MRI
command. This command does not have any parameter. The double word reading is
executed by the MR or MRI previous command.
MW
Memory Write
MW
Opcode:
12
0
0
0
1
0
0
1
0
Synopsis
MW allows the writing of a 16-bit parameter. The parameter specifies the address as well
as the value to be transferred.
Parameters
Field
Byte
Pos.
7..0
7..0
7..0
Value
Definition
Low byte of the 16-bit address
MW_ADDR_L
MW_ADDR_H
MW_VALUE_L
1
2
3
High byte of the 16-bit address
Low byte of the 16-bit value
High byte of the 16-bit value
MW_VALUE_H
4
7..0
36/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
MWI
Memory Write Indirect
MWI
Opcode:
2A
0
0
1
0
1
0
1
0
Synopsis
MWI allowsthewriting of a 16-bitparameter.Theparametersspecifiesanindirectaddressaswell
asthe valuetobe transferred.Refertothe“RAMMappingApplicationNote” (deliveredon request
accordingtorevisionnumber).TheadvantagetouseMWIinsteadofMWisthattheIndirectAddress
is constantover the differentrelease of the product.
Parameters
Field
Byte
Pos.
7..0
7..0
7..0
Value
Definition
MWI_IADDR
MWI_IVALUE_L
MWI_IVALUE_H
1
2
3
Indirect address
Low byte of the 16-bit value
High byte of the 16-bit value
MWLO
Opcode:
Memory Write Low Word
MWLO
2B
0
0
1
0
1
0
1
1
Synopsis
MWLO allows the writing of a 16-bit parameter at the address defined by the following MW
or MW Absolute Address minus 1. This command must be followed by a MW or MWI
command.The double word writing is executedby the MW or MWI following command.
Parameters
Field
Byte
Pos.
7..0
7..0
Value
Definition
Low byte of the 16-bit value
High byte of the 16-bit value
MWLO_VALUE_L
MWLO_VALUE_H
1
2
RTRA (ST75C540 only)
Retrain
RTRA
Opcode:
02A
0
0
0
0
0
1
0
1
Synopsis
RTRAis used to force the ST75C530/540to initiate a retrainsequence or a rate negotiation.
If MODC_NOQUAbit is set, the ST75C530/540will initiate a transmission at the maximum
speed defined by the RTRAparameter,otherwise it will found the bestreliable speed based
on the quality of the line (within the RTRA allowed speed).
Parameters
Field
Byte
Pos.
Value
Definition
RTRA_NEG0
1
0
0
1
Retrain (V.22bis, V.32, V.32bis)
Ratr negotiation (V.32bis, V.22bis)
RTRA_SP0
RTRA_SP1
1
2
7..4
2..0
xxx1 1200bps allowed (V.22bis)
xx1x 2400bps allowed (V.22bis)
x1xx 4800bps allowed (V.32bis, V.32)
1xxx 7200bps allowed (V.32bis)
xx1
x1x
1xx
9600bps allowed (V.32bis, V.32)
12000bps allowed (V.32bis)
14400bps allowed (V.32bis)
37/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
SETGN
Set Output Gain
SETGN
Opcode:
02
0
0
0
0
0
0
1
0
Synopsis
SETGN is a command which sets the scaling factor of the transmit samples. It is used for
settingthe outputlevel or for setting the level of the tone generators.The gain value is given
in the form of a 2’s complement 16-bit value.
Parameter
Field
GAIN_L
Byte
1
Pos.
7..0
Value
Definition
range FF* Low byte of the 16-bit gain value
GAIN_H
2
7..0
range 7F* High byte of the 16-bit gain value
Example
Gain (dB)
Gain (Hex)
7FFF
Gain (dB)
Gain (Hex)
47FA
Gain (dB)
-10
Gain (Hex)
287A
0
-5
-6
-7
-8
-9
-1
-2
-3
-4
7214
4026
-11
2413
65AC
392C
-12
2026
5A9D
32F5
-13
1CA7
50C3
2D6A
-14
198A
The multiplication factor is : 10(-1/20) = 0.89125 for 1dB step.
SLEEP
Turn to Sleep Mode
SLEEP
Opcode:
03
0
0
0
0
0
0
1
1
Synopsis
SLEEP is used to force the ST75C530/540 to turn to low power mode.
Parameter Non parametric command.
Note :
When receiving this command the ST75C530/540will stop processing and so cannot have the regular handshake protocol.
It does not increment the COMACK, neither generate an Interrupt.
STOP
FAX Stop Transmitter
STOP
Opcode:
25
0
0
1
0
0
1
0
1
Synopsis
STOP is used, in FAX Modes, to force the ST75C530/540 to turn off the transmitter in
accordancewith the correspondingITU-T V.33/V.17/V.29/V.27recommendation.
Parameter Non parametric command.
Note :
When receiving this command the ST75C530/540 will stop sending regular Data. This command must be preceded by a
XMIT Stop command. The ST75C530/540 will wait until all the transmit buffers are sent before starting the Stop sequence.
SYNC
FAX Synchronize the Receiver
SYNC
Opcode:
26
0
0
1
0
0
1
1
0
Synopsis
SYNC is used, in FAX Modes, to force the ST75C530/540 to Start/Stop the receiver in
accordancewith the correspondingITU-T V.33/V.17/V.29/V.27recommendation.Assoon as
the ST75C530/540receives the SYNC Startcommand it sets its receiver to detect the FAX
synchronizationsignal.This command is the equivalent HSHK commandfor the receiver.
Parameters
Field
Byte
Pos.
Value
Definition
RX_SYNC
1
0
0*
1
Stop receiver
Start receiver synchronization
38/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
TDRC
Opcode:
Tone Detector Read Coefficient
TDRC
1A
0
0
0
1
1
0
1
0
Synopsis
TDRC Read one Coefficient of the selected Tone DetectorCell.
Parameters
Field
Byte
Pos.
4..0
7..0
Value
Definition
TD_CELL
1
2
0..13 Tone detector cell number
TD_C_ADDR
0..B
10
20
Biquad coefficient
Energy coefficient
Static level
30 (1) Energy coefficient for relative comparison
40 (1) Gain for relative comparison
The command answer is : Low Byte of Coefficient followed by High Byte of Coefficient.
Value 30 and 40 of byte 2 are available only for secondary tone detector.
Note 1 :
TDRW
Tone Detector Read Wiring
TDRW
Opcode:
1B
0
0
0
1
1
0
1
1
Synopsis
TDRW Read Wiring of the selected Tone Detector Cell.
Parameters
Field
TD_CELL
Byte
1
Pos.
4..0
Value
Definition
0..13 Tone detector cell number
For primary tone detector
TD_W_ADDR
2
0
0
1
Biquad and energy input
Comparator inputs
Other Reserved
The command answer is :
a) If TD_W_ADDR = 0 :
- First Byte is the Node Number of the Signal connected to Biquadratic Filter input.
- Second Byte is the Node Number of the Signal connectedto the Energy estimator input.
b) if TD_W_ADDR = 1 :
- First Byte is the Node Number of the Signal connected to Comparator Negative input.
- SecondByte is the Node Number of the Signal connectedto the ComparatorPositive input.
For secondary tone detector TD_W_ADDR is not defined.
- First byte is 00 if relative comparison is not mandatory,
First byte is 01 if relative comparison is mandatory.
- Second byte is for the configurationof the secondary tone detector :
C0 configuration1+1 of secondary tone detectors,
E0 configuration1+1+2,
F0 configuration 1+1+1.
39/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
TDWC
Tone Detector Write Coefficient
TDWC
Opcode:
1C
0
0
0
1
1
1
0
0
Synopsis
TDWC Write one Coefficient of the selected Tone Detector Cell.
Parameters
Field
TD_CELL
Byte
1
Pos.
4..0
Value
Definition
0..13 Tone detector cell number
TD_C_ADDR
2
7..0
0..B
10
Biquad coefficient
Energy coefficient
Static level
20
30 (1) Energy coefficient for relative comparison
40 (1) Gain for relative comparison
TD_COEFL
TD_COEFH
3
4
7..0
7..0
Low byte of coefficient
High byte of coefficient
Note 1 :
Value 30 and 40 of byte 2 are available only for secondary tone detector.
TDWW
Tone Detector Write Wiring
TDWW
Opcode:
1D
0
0
0
1
1
1
0
1
Synopsis
TDWW Write Wiring of the selected Tone Detector Cell.
Parameters
Field
TD_CELL
Byte
1
Pos.
4..0
Value
Definition
0..13 Tone detector cell number
For Primary Tone Detector
Field
Byte
Pos.
Value
Definition
TD_W_ADDR
2
0
0
1
Biquad and energy input
Comparator inputs
Other Reserved
If TD_W_ADDR = 0 (Select Biquad and Energy Inputs)
Field
Byte
Pos.
Value
Definition
TD_W_ERN
TD_W_BIQ
3
4
0..3F Energy estimator signal input
0..3F Biquad filter signal input
If TD_W_ADDR = 1 (Select Comparator Inputs)
Field
Byte
Pos.
Value
Definition
TD_W_CN
TD_W_CP
3
4
0..3F Negative comparator signal input
0..3F Positive comparator signal input
For Secondary Tone Detector
Field
Byte
Pos.
Value
Definition
TD_4DIFF
2
7..0
00
01
Relative comparison not enable
Relative comparison enable
other Reserved
TD_4_CONF
TD_4_CONF2
3
4
7..0
7..0
0
Mandatory
C0
E0
F0
1+1 configuration
1+1+2 configuration
1+1+1+1 configuration
other Reserved
40/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
TDZ
Tone DetectorClear Cell
TDZ
Opcode:
1E
0
0
0
1
1
1
1
0
Synopsis
TDZ Clears all internalvariables of one Tonedetector cell including Filter local variablesand
energy estimator. This command must be sent after changing coefficients of a cell to avoid
instability.
Parameters
Field
TD_CELL
Byte
1
Pos.
4..0
Value
Definition
0..13 Tone detector cell number
TGEN
Enable/DisableTone Generators
TGEN
Opcode:
0D
0
0
0
0
1
1
0
1
Synopsis
Enable or disable one of the four tone generator, define the output of the tone generator
either Line or Audio.
Parameters
Field
TONE_0_ENA
Byte
1
Pos.
0
Value
0*
1
Definition
Generator #0 disabled
Generator #0 enabled
TONE_1_ENA
TONE_2_ENA
TONE_3_ENA
TONE_0_OUT
TONE_1_OUT
TONE_2_OUT
TONE_3_OUT
1
1
1
1
1
1
1
1
2
3
4
5
6
7
0*
1
0*
1
0*
1
0*
1
0*
1
0*
1
Generator #1 disabled
Generator #1 enabled
Generator #2 disabled
Generator #2 enabled
Generator #3 disabled
Generator #3 enabled
Generator #0 output to line
Generator #0 output to audio
Generator #1 output to line
Generator #1 output to audio
Generator #2 output to line
Generator #2 output to audio
0*
1
Generator #3 output to line
Generator #3 output to audio
41/84
ST75C530 - ST75C540
VII - COMMAND SET DESCRIPTION (continued)
TONE
Opcode:
Predefined Tones
TONE
0C
0
0
0
0
1
1
0
0
Synopsis
TONE programs the tone generator for the predifined tones. The tone generator #0 and
eventualy#1 are reprogrammed with this command. The tone generator #0 and eventualy
the #1 are enabled. Using a value not in the following table will disable tone generator #0
and #1.
Parameters
Field
Byte
Pos.
Value
Definition
TONE_SELECT
1
5..0
0
1
DTMF digit 0
DTMF digit 1
DTMF digit 2
DTMF digit 3
DTMF digit 4
DTMF digit 5
DTMF digit 6
DTMF digit 7
DTMF digit 8
DTMF digit 9
DTMF digit A
DTMF digit B
DTMF digit C
DTMF digit D
DTMF digit *
DTMF digit #
Answer tone 2100Hz
Tone 1650Hz
Tone 2225Hz
Tone 1300Hz
Tone 1100Hz
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14
TONE_OUT
1
7
0
1
Output on line
Output on audio
XMIT
Opcode:
Start/stop Transmission
XMIT
01
0
0
0
0
0
0
0
1
Synopsis
XMIT start or stop the transmission of the Transmit Data.
Parameters
Field
Byte
Pos.
Value
Definition
TX_START
1
0
0*
1
Stop transmission
Start transmission
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ST75C530 - ST75C540
VIII - STATUS DESCRIPTION
This appendix is dedicated to the ST75C530/540
reporting features. In the following sections the
command acknowledge process and the report
and status definitions are explained.
In the case of a memory reading command (CR,
TDRC, TDRW, IDT or MR) once the command
enteredis executed,the reportarea is filled and the
acknowledge counter is incremented afterwards.
This insures that the controller will read the value
correspondingto its request.
Furthermore, the ST75C530/540 resets the value
of the COMSYS register and the interruption IT6
is raised.
VIII.1 - Command Acknowledge and Report
VIII.1.1 - Command Acknowledge Process
The ST75C530/540 features an acknowledge
processbased on a counterCOMACK. On power-
on reset (or INITcommand), this counter’s value is
set to 0. Each time a command is successfully
executedby the ST75C530/540, the acknowledge
counter COMACK is incremented. This allows a
precise monitoring of the command entered and
avoids command collision.
VIII.1.2 - Reports Specification
The report section of the Dual Port RAM is dedi-
catedtomemoryreading.In responsetoa CR, MR,
MRI, MRLO, TDRC, TDRW, IDT commands, the
value read is transferred to the report registers
COMREP[0..1].
Figure 16 : Command Acknowledge Process
BEGIN
Yes
No
COMSYS = 0
Yes
No
COMMAND EXIST
CLEAR
ANSWER
EXECUTE
COMMAND
COPY ANSWER
INTO
SET SYSERR
ERR_IPRM
SET SYSERR
ERR_IOCD
COMREP
ASSERT
INTERRUPT
IT0
ASSERT
INTERRUPT
IT0
INCREMENT
COMACK
CLEAR
COMSYS
ASSERT
INTERRUPT
IT6
END
43/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
VIII.1.3 - CR Command
Issuing a CR command causes the ST75C530/540 to dump a specificmemory location in complex mode.
This instruction is particularly useful for equalizer state analysis or for software eye-pattern display. The
report area has this meaning :
RP7
IP7
RP6
IP6
RP5
IP5
RP4
IP4
RP3
IP3
RP2
IP2
RP1
IP1
RP0
IP0
COMREP[0]
COMREP[1]
RP0..RP7 is the MSB part of the 16-bit value of the real part and IP0..IP7is the MSB part of the imaginary
part. The CR command insures that the real and imaginary part of the desired complex value are sampled
internally at the same time. The address given in the parameter field of CR is the address of the real part.
VIII.1.4 - MR/TDRC/TDRW/IDT/MRI/MRLO Commands
The report issued by the MR/TDRC/TDRW/IDT/MRI/MRLO commands follow the same rules as for CR.
The report meaning is :
D7
D6
D5
D4
D3
D2
D1
D9
D0
D8
COMREP[0]
COMREP[1]
D15
D14
D13
D12
D11
D10
D0..D15 is the 16-bit value requested by the command.
Inthecaseof IDT,D15..D12containstheproductidentification(3for ST75C530,7 for ST75C5540), D11..D8
contains the hardware revision identification and D7..D0 contains the software revision identification.
VIII.2 - Modem Status
VIII.2.1 - Modem Status Description
The Status of ST75C530/540 is divided into 4 fields :
- The error status byte SYSERR that provides information about error. This status can trigger an IT0
interrupt,
- The general status byte STATUS[0] and STATUS[1] that contains all the modem signals. These status
bytes can trigger an IT4 interrupt,
- The quality status STAQUA, that contains the quality of the received transmission,
- The optional status bytes STAOP[0], STAOP[1], STAOP[2] and STAOP[3], that contains additional
information regarding the ST75C530/540 operating mode. This default information can be changed to
monitor any internal variables using the DOSR command.
All these informations are updated on a Baud basis :
Mode
Baud Rate (2) (Hz)
2400
V.32bis/V.32 (ST75C540 only)
V.22bis/V.22/Bell 212A (ST75C540 only)
Tone
2400
2400
Bell 103 (full duplex)
V.21 (full duplex)
V.23 (full duplex)
V.27ter 2400bps
V.27ter 4800bps
V.29
2400
2400
2400
1200
1600 (1)
2400
V.17/V.33
2400
V.21 channel 2
2400
HANDSET, CODER or DECODER Modes
1200
Notes : 1. In this mode the tone detectors outputs are update 800 times by second.
2. This baud rate defines also, the maximum command rate. Each baud time the ST75C530/540 looks at the COMSYS location
(Address $00) to see if a command have been sent by the host processor. If the content of this location is different from zero the
ST75C530/540 execute the command.
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ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
Starting at the adddress $08 the status area have the following format :
Bit
Add.
Name
7
6
5
4
3
2
1
0
$08 SYSERR ERR_RTK
-
-
ERR_IPRM ERR_IOCD ERR_VOCO ERR_RX ERR_TX
$09 STATUS0 STA_109F STA_CPT10 STA_CPT1 STA_CPT0 STA_RING STA_106 STA_107 STA_109
STA_VAD
$0A STATUS1 STA_DTMF STA_FLAG STA_RNEG STA_HR
STA_CLR* STA_RTRN*
STA_AT
STA_CCITT STA-TIM STA_H
$0B STAQUA
$0C STAOP0
$0D STAOP1
$0E STAOP2
$0F STAOP3
* ST75C540 only
-
Quality
Depend on operating mode (see below)
VIII.2.2 - Error Status
The error status changes each time an error occurs. When the ST75C530/540 signals an error by setting
one of the SYSERR bit, it generates an interrupt IT0. These bits can only be cleared by the host controler
using the CSE command.
The meaning of the different bits of the SYSERR byte is discribed below :
SYSERR
Field
Pos.
Meaning when set
ERR_TX
0
Transmit buffer underflow. Lossof synchronisation between the host and ST75C530/540 transmit
data buffer managment.
ERR_RX
1
2
Receive buffer overflow. Loss of synchronisation between the host and ST75C530/540 receive
data buffer managment.
ERR_VOCO
Vocoder buffer underflow (Decoder) or overflow (Coder). Lost of synchronisation between the
Host and ST75C530/540 VOCODER Buffer management.
ERR_IOCD
ERR_IPRM
ERR_RTK
3
4
7
Incorrect command
Incorrect parameter for the command
Real time kernel error. ST75C530/540 not able to perform all its tasks within the baud period
(transmit or receive samples lost).
45/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
VIII.2.3 - Modem General Status
The modem generalstatus word is composedof twobytes STATUS[0]and STATUS[1]. Any bit changecan
generate an IT4 interrupt. Using the DSIT command allows the selection of the corresponding bit that will
generate an interrupt each time they will change. The default pattern is $3F for STATUS[0] and $FF for
STATUS[1].
The different bits have the following meaning :
STATUS[0]
Field
Pos.
Meaning when set
STA_109
STA_VAD
0
In FAX MODEM and TONECID modes STA_109 : CCITT Circuit109 (Carrier Detect). Indicates
that valid data are received.
In CODER and DECODER modes : VAD: Voice Activity Detected
STA_107
STA_106
1
2
CCITT Circuit 107 (Data Set Ready). Valid only in FAX & DATA MODEM modes.
CCITT Circuit 106 (Clear To Send). Indicates that the training sequence has been completed
and that any data in the Transmit Buffer will be transmitted. Valid only in FAX & DATA MODEM
modes.
STA_RING
STA_CPT0
STA_CPT1
3
4
5
Ring Detected. A valid ring signal is present at the Ring pin. Valid only in Tones modes. The
precise frequency can be read in the optional status byte STAOP2.
In TONE and TONECID modes STA_CPT0: Call progress tone detector #0. Low pass filter
650Hz.
In TONE and TONECID modes STA_CPT1: Call progress tone detector #1. High pass filter
600Hz.
STA_CPT10
STA_109F
6
7
In TONE and TONECID modes STA_CPT10: Signal in Filter #0 is higher than #1.
In FAX MODEM mode, V.22bis mode* and TONECID mode STA_109F: Fast Carrier Detect.
* ST75C540 only
STATUS[1]
Field
STA_H
Pos.
Meaning
0
1
2
Transmit synchronisation in progress. Valid only in FAX & DATA MODEM modes.
Handshake timeout. Valid only in Data Modem mode.
STA_TIM*
STA_CCITT
CCITT 2100Hz versus 2225Hz answer tone detect. Valid if STA_AT is set. Valid only in Tone
mode.
STA_AT
3
4
Answer tone (either 2100Hz or 2225Hz) detected. Valid only in Tone mode.
STA_HR
STA_RTRN*
STA_HR : Receive synchronisation in progress. Valid only in Fax Modem mode.
STA_RTRN : Remote retrain detec, valid only in V.32bis/V.32/V.22bis Data Modem modes.
STA_RENEG*
5
6
Remote rate negotiation detected, valid only in V.32bis/V.32/V.22bis Data Modem modes.
STA_FLAG
STA_CLR*
STA_FLAG : V.21 channel 2 flag detect. Valid only in FAX Modem mode and Tone mode.
STA_CLR : Remote clear down detected V.32bis/V.32 Data Modem modes.
STA_DTMF
7
DTMF digit detect. The digit itself is available in the optional status byte STAOP3.
* ST75C540 only
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ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
VIII.2.4 - Quality Status
The quality bytesSTAQUAand STAQUAS monitoran evaluationof the line quality.They are updated once
per baud and their value ranges from 127 (perfect quality)to 0 (terrible quality). This value is automaticaly
adjusted according to the current receiving mode. Refer to the following chart to convert the value of
STAQUA into its Bit Error Rate equivalence. The time constant for STAQUA is 100ms. The slow quality
byte(available on STAOP1in Fax and Data mode except FSK)STAQUAS gives the equivalentqualitywith
a 1 seconde time constant.
BER
1e-2
1e-3
1e-4
1e-5
1e-6
1e-7
1e-8
STAQUA
1e-9
0
31
63
95
127
VIII.2.5 - Optional Status
According to the operating mode of the ST75C530/540the optional status is displaying different informa-
tions.
The optional status are automatically reprogrammed after each CONF command with the address of the
variablesto monitoraccordingwiththeoperatingmode selected(CONF_OPER).AftertheCONFcommand
the user must overwrite this default programming by using the DOSR command. In order to change the
default set-up please refer to the “RAM Mapping application note” (delivered on request according to
revision number) to obtain the addresses of the DSP Internal variables.
VIII.2.5.1 - Default Optional Status in All modes Except MODEM
While in Tone mode the format of the STAOP word is as follows :
Optional Status Words
Bit
Add.
Name
7
6
5
4
3
2
1
0
$0C
$0D
$0E
$0F
STAOP0
STAOP1
STAOP2
STAOP3
TDT7
TDT15
TDT6
TDT14
TDT5
TDT13
TDT4
TDT3
TDT2
TDT10
TDT1
TDT9
TDT0
TDT8
TDT12
TDT11
RING_PERIOD (1)
TDT16
TDT19
TDT18
TDT17
DTMF_DIGIT(4)
Notes : 1. RING_PERIOD is valid when the Bit 3 of the STATUS0(STA_RING goes high. This value is updated at each falling edge of the
RING Signal. The RING_PERIOD value must be multiplied by 2400 to obtain the Period in second.
2. TDTx (x in [0..15]) is the Output of the 16 Tone detectors x (sampling rate 7200Hz).
3. TDTy (y in [16..19] is the Output of the secondary Tonedetectors (sampling rate 4800Hz or 9600Hz) with absolute comparison
or relative comparison.
4. DTMF_DIGIT is valid when the Bit 7 of STATUS1(STA_DTMF) goes high. This value remains unchanged until a new DTMF
Digit is detected.
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ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
VIII.2.5.2- Default Optional Status in Fax Mode
While in Fax Modem mode the format of the STAOP word is as follows :
Optional Status Words in MODEM Mode
Bit
Add.
Name
7
6
5
4
3
2
1
0
$0C
$0D
$0E
$0F
STAOP0
STAOP1
STAOP2
STAOP3
x
x
x
SPEED (2)(5)
SPVAL (1)(5)
STAQUAS
PNSUCs PRDETs PNDETs
TDT19 TDT18 TDT17
SCR1s
TDT16
PRs
PNs
P2s
P1s
DTMF_DIGIT(4)
Notes : 1. SPVAL is active in V.33receiver only at the same time as the rising transition of the SCR1s signal. When SPVAL is set, it indicates
that the SPEED bits contain the Data speed information.
2. SPEED is valid in V.33 receiver only it can have 2 values, after the SCR1s signal goes high : 1000 for 14400bps and 0111 for
12000bps.
3. The STAOP2 Bit reflects the progression of the Synchronisation.
4. Only valid in V.21 Channel 2 Receive mode.
The STAOP2 Bits have the following meanings :
STAOP2 in Fax Modem Mode
Name
P1s
Position
Description
Unmodulated carrier sequence. Optional, used for echo protection.
Continuous 180° phase reversal sequence
Equalizer trainning sequence
0
1
2
3
4
5
6
7
P2s
PNs
PRs
V.33 and V.17 rate sequence
SCR1s
PNDETs
PRDETs
PNSUCs
Continuous scrambled 1 sequence
Turned on after PN sequence detection
Turned on after PR sequence detection (V.33 and V.17 only)
Turned on after succesfull training of the receive equalizer. When on at the end of the
synchronization, the transmition BER is statisticaly bellow 10ppm.
48/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
With the following timing :
P1
P2
T3
PN
T4
R
SCR1
T6
Data
T1
T2
T5
Transmit
STA_H
P1s
P2s
PNs
PRs
SCR1s
(6)
T7
T7
T8
T8
T8
T8
Receive
STA_HR
(7)
STA_109F
P2s
PNDETs
PNs
(1)
PRDETs
PNSUCs
SCR1s
(2) (8)
STA_109
RxData
Mode
T1 (4)
192
192
192
192
192
192
192
192
T1p (5)
30
T2
22
22
22
22
22
22
22
22
T3
107
107
53
41
31
9
T4
T5
T6
T7
5
T8
7
Unit
ms
ms
ms
ms
ms
ms
ms
ms
V.17
V.17 short
V.29
1240
16
27
0
20
20
20
8
30
5
7
30
160
26
0
5
7
V.29 short
V.27 4800
V.27 4800 short
V.27 2400
V.27 2400 short
30
0
5
7
30
670
36
0
5
5
7
30
0
5
5
7
30
42
12
895
48
0
7
6
7
30
0
7
6
7
49/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
Data
SCR1
T10
T11 min
Transmit
STA_H
P1s
P2s
PNs
PRs
(6)
SCR1s
T12
Receive
STA_HR
STA_109F
(3)
T13
(3)
PNDETs
PNs
(3)
PRDETs
(3)
PNSUCs
STA_109
RxData
Mode
V.17
T10
13
13
13
13
20
20
27
27
T11
20
20
20
20
30
30
40
40
T12
8
T13
Unit
ms
ms
ms
ms
ms
ms
ms
ms
25
25
25
25
25
25
25
25
V.17 short
V.29
8
8
V.29 short
V.27 4800
V.27 4800 short
V.27 2400
V.27 2400 short
8
8
8
8
8
Notes : 1.
In the case of V.29 or V.27, PRs and PRDETs bits are not active.
PNSUCs indicates the quality of the Rx signal that will give a ber of approximation of 1e-5
2.
3.
4.
5.
6.
7.
8.
.
After sending the command SYNC0, all bits are reset.
When using long echo protection tone, otherwise 0.
When using short echo protection tone, otherwise 0.
STA-106 is set at the end of T6 and reset at the beginning of T10.
After sending the command SYNC1, this bit is set.
PNSUC is evaluated twice, first at SCR1 detection and further 256 baud (V.29,V.17, V.33 : 106ms ; V.27 4800bps : 160ms ;
V.27 2400bps : 212ms) after STA_109.
9.
For V.21 channel 2, timing for loss of STA_109 is 25ms and timing for detection of STA_109 is 7ms.
10. For V.21 channel 2 after a STOP command, STA_H is set to “1” during 13ms when the last HDLC flag is transmitted.
50/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
VIII.2.5.3- Default Optional Status in DATA MODEM Mode (ST75C540 only)
While in Data Modem mode the format of the STAOP word is as follows :
Optional Status Words in MODEM Mode
Bit
Add.
Name
7
6
5
4
3
2
1
0
$0C
$0D
$0E
$0F
STAOP0
STAOP1
STAOP2
STAOP3
x
x
x
SPEED (2)(5)
STAQUAS
HSHK_PHA
TDT16 Not Used
SPVAL (1)(5)
TDT19
TDT18
TDT17
Notes : 1. SPVALis active in V.33 receiver only at the same time as the rising transition of the SCR1s signal. When SPVALis set, it
indicates that the SPEED bits contain the Data speed information.
2. SPEED is valid in V.32bis, V.32, V.22bis, V.22, Bell 212A and V.33 receiver only with the following meaning :
Bit 4
Bit 3
Bit 2
Bit 1
Data Speed
1200bps
0
0
0
0
0
0
1
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
2400bps
4800bps
7200bps
9600bps
12000bps
14400bps
Reserved
Other
3. The STAOP2 Bit reflects the progression of the Synchronisation.
4. Only valid in V.21Channel 2 Receive mode.
5. SPVALis active in V.32bis/V.32/V.22bis/V.22 at the end of the training sequence and at least 8 baud before entering Data mode.
SPVALand SPEED are also updated with each retrain and rate negotiation.
6. The SPAOP1 bits reflect the progression of the synchronization in Data modes.
51/84
ST75C530 - ST75C540
VIII - STATUS DESCRIPTION (continued)
The STAOP2 Bits have the following meanings in Data Modem mode :
HSHK_PHA(R) Handshake progression counter contains information about the progress of the
hadshake in V.32and V.22bismodes. This 8-bit value is availablein STAOP2in modem
mode. It can be readto examine the progressio of thehandshakeand it containsnormal
values and error values as below :
AUTOBAUD ORIG MODE
Event
HSHK_PHA Value
Wait Answer Tone
Wait End Answer Tone
Not Autobaud and Waiting
USC1
$01
$02
$03
$04
Autobaud Waiting AC or USC1
AUTOBAUD ANSW MODE
Event
HSHK_PHA Value
Waiting HSK Command
Generating Answer Tone
Generating Silence
$10
$11
$12
V.32 ORIG MODE
EVENT
HSHK_PHA Normal Value
HSHK_PHA Error Value
AC_DET
AC/CA DET
CA/AC DET
NO AC DET
S_DET
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
$2A
$30
$1
$2
$B for RTN, $C for RTN
$4
SB_DET
$5
R1_DET
$6
S_DET
$7
SB_DET
$8
R3_DET
$9, $D no R5 det after RRN
$A
E_DET
DATA_MODE
V.32 ANSW MODE
EVENT
HSHK_PHA Normal Value
HSHK_PHA Error Value
AA_DET
AA/CC DET
NO CC DET
S_DET
$40
$41
$42
$43
$44
$45
$46
$47
$50
$8 for RTN, $9 for RRN
$1
$2
$3
SB_DET2
SB_DET
$4
$5
R2_DET
$6, $A if no R det after RRN
$7
E_DET
DATA_MODE
V.22bis ORIG MODE
EVENT
HSHK_PHA Normal Value
HSHK
$60
$61
$62
$63
$70
USC1_DET
SCR1_DET
S1_DET
DATA_MODE
V.22bis ANSW MODE
EVENT
HSHK_PHA Normal Value
HSHK
SCR1_DET
S1_DET
$80
$82
$83
$90
DATA_MODE
52/84
ST75C530 - ST75C540
IX - TONE DETECTORS
IX.1 - Overview
monitored on a baud basis using the DOSR com-
mand.
The general purpose ST75C530/540 tone detec-
tors block is a powerful module that covers a lot of
applications :
- call progress tone detection, fully programmable
for all countries,
- FAX, voice, data automatic detection,
- call waiting detection, while in vocoder or data
mode.
The16primarytonedetectorsareinitializedeachtime
entering thetone mode.However the previous coeffi-
cient values could be kept usinga MW command.
The secondary tone detector have been added to
the ST75C530/540.The filter structure is the same
as the primary tone detector.
The sampling rate is 4800Hz allowing detection of
signallessthan 1800Hz by defaultprogrammingor
with a MODC command, the sampling rate is
9600Hz allowing detection of signal less than
3300Hz. The level of detection is programmable
from -6dBm down to -51dBm. In order to increase
the reliability of the detection,using a TDWW com-
mand,2 comparisonsare provided,onewitha fixed
level (absolute)or with the receivesignal (relative).
The 4 secondary tone detectors are initialiazed
each time entering the tone mode. However the
previous coefficient values could be kept using a
CONF command.
IX.2 - Description
The primary tone detector block is a set of 16
identical Cells. Each cell is composed of a Double
Biquadratic Filter, a Power estimator section, a
Static level and a Level comparator.
EachBiquadraticFilter, PowerEstimatorandStatic
Level can be programmed using a complete set of
commands(TDRC, TDRW, TDWC, TDWW, TDZ).
The wiring between the different Cells can be de-
fined by the user, using the associated command
allowing a wide range of applications.
ThecommandTDRC, TDWC, TDWW, TDRW, TDZ
with the TD_CELL parameter of 0x10, 0x11, 0x12
or 0x13 can be used to program these filters.
The sampling frequencyis 7200Hz,allowing detec-
tion of signalslessthan 3300Hz.The level of detec-
tion is programmable from -6dBmdown to -51dBm.
IX.2.1 - Biquadratic Filters
The 16 ComparatorOutputsgive, on a baud basis,
the information into two 8 bits words TONEDET0
(for cells number 0 to 7) and TONEDET1 (for cells
number 8 to F). These TONEDET variables can be
accessed using a MRI command or, more easily,
Each Biquadratic Filter is a double regular section
that can performany Transferfunctionwith 4 Poles
and 4 Zeros.
This routine is run on a sample basis.
Figure 17 : BiquadraticIIR Filter
-1
IN
C0
C5
C6
CB
OUT
Z
2
2
-1
-1
Z
Z
Z
Z
C1
C2
C3
C7
C8
C9
-1
-1
C4
CA
The corresponding transfer function is :
1
2
1
2
Out
Input
C5
1
2
C3 z−
C1 z−
2
C4 z−
C2 z−
CB
1
2
C9 z−
C7 z−
2
CA z−
+
+
+
+
= C0
C6
z−1
2
2
2
2
C8 z−
1
2
1
2
−
−
−
−
Note : All coefficients are coded on 16 bits 2’s complement in the range +1, -1 (Q15). To avoid the possibility of overflow the user must check
that the internal node must not be higher that 0.5 (in Q15 representation).
53/84
ST75C530 - ST75C540
IX - TONE DETECTORS (continued)
corresponding bit into the TONEDET[0..1] word; if
not it clear this bit.
IX.2.2 - Power Estimation
The Power estimation Cell is needed to measure
the amplitude of the different tones. It is run on a
sample basis.
IX.2.5 - Wiring
The user must specify the connection (wiring) be-
tweenthe input/outputof theFilter,the input/output
of the Power estimator, the output of the static
levels and the two inputs of the Comparators.
Figure 18 : Power Estimator
OUT
IN
+
-1
ABS(.)
P1
Z
The output signals have an absolute address:
Node Address
Signal
-1
Z
Address
Description
Name
Ground
RxSig
00
01
Signal always equal to 0000
The corresponding transfer function is :
Receive signal from the
Analog front end
P1
z−
1
RxSig2
RxSig4
02
03
Receive signal multiplied by 2
Receive signal multiplied by 4
Out
=
|Input|
1 − (1 − P1) z−1
04..0F Reserved
IX.2.3 - Static Level
Filter[0..F]
10..1F Biquadratic Filter Outputs
A single Threshold level is associated with each
Cell. It canbe useto comparetheoutputof a Power
Estimation with an Absolute Value.
Power[0..F] 20..2F Power Estimator Outputs
Level[0..F] 30..3F Static Levels
The user will specifythe inputs of the filters, Power
andComparator.At leastoneinputmust comefrom
the RxSig (node 01, 02 or 03). It is mandatory to
connect all unused cell inputs to the Ground signal
(node 00).
IX.2.4 - Comparator
The Comparator computes, on a baud basis, the
differenceof the signal on itsPositive andNegative
Inputs. If the result is Higher that zero it sets the
54/84
ST75C530 - ST75C540
IX - TONEDETECTORS (continued)
Figure 19 : Tone Detector Wiring Address (first half)
@10
@11
@12
@13
@14
@15
@16
@17
BIQUADRATIC
FILTER
#0
@20
@30
POWER
#0
COMP.
#0
LEVEL #0
BIQUADRATIC
FILTER
@21
@31
POWER
#1
#1
COMP.
#1
LEVEL #1
BIQUADRATIC
FILTER
@22
@32
POWER
#2
#2
COMP.
#2
LEVEL #2
@00
D0
BIQUADRATIC
FILTER
#3
@23
@33
GROUND
POWER
#3
D1
COMP.
#3
D2
D3
LEVEL #3
@01
@02
@03
Rx SIGNAL
BIQUADRATIC
FILTER
D4
D5
D6
@24
@34
POWER
#4
#4
COMP.
#4
2
2
LEVEL #4
D7
BIQUADRATIC
FILTER
@25
@35
POWER
#5
TONEDET0
#5
COMP.
#5
LEVEL #5
BIQUADRATIC
FILTER
@26
@36
POWER
#6
#6
COMP.
#6
LEVEL #6
BIQUADRATIC
FILTER
@27
@37
POWER
#7
#7
COMP.
#7
LEVEL #7
55/84
ST75C530 - ST75C540
IX - TONEDETECTORS (continued)
Figure 20 : Tone Detector Wiring Address (second half)
@18
BIQUADRATIC
FILTER
@28
@38
POWER
#8
#8
COMP.
#8
LEVEL #8
@19
BIQUADRATIC
FILTER
@29
@39
POWER
#9
#9
COMP.
#9
LEVEL #9
BIQUADRATIC @1A
@2A
@3A
POWER
#A
FILTER
#A
COMP.
#A
LEVEL #A
D0
D1
D2
D3
D4
BIQUADRATIC @1B
@2B
@3B
POWER
#B
FILTER
#B
COMP.
#B
LEVEL #B
BIQUADRATIC @1C
@2C
@3C
POWER
#C
FILTER
#C
D5
D6
D7
COMP.
#C
LEVEL #C
BIQUADRATIC @1D
@2D
@3D
POWER
#D
TONEDET1
FILTER
#D
COMP.
#D
LEVEL #D
BIQUADRATIC
FILTER
@1E
@1F
@2E
@3E
POWER
#E
#E
COMP.
#E
LEVEL #E
BIQUADRATIC
FILTER
@2F
@3F
POWER
#F
#F
COMP.
#F
LEVEL #F
56/84
ST75C530 - ST75C540
IX - TONEDETECTORS (continued)
Figure 21a : SecondaryTone Detector Configuration (2 tone detectors1 + 1)
FOURTH ORDER
IIR FILTER #16
POW ()
#16
INPUT SIGNAL
absolu
COMPARATOR
#16
TDT16
AND
Relative
LEVEL #16
COMPARATOR
#16
OR
POW ()
#20
GAIN
#16
-TD4DIFF or
TDWW 1001 00C0
FOURTH ORDER
IIR FILTER #17
POW ()
#17
absolu
COMPARATOR
#17
TDT17
AND
Relative
LEVEL #17
COMPARATOR
#17
OR
POW ()
#20
GAIN
#17
-TD4DIFF or
TDWW 1100 00C0
Figure 21b : SecondaryTone Detector Configuration (3 tone detectors 1 + 1 + 2)
FOURTH ORDER
IIR FILTER #16
POW ()
#16
INPUT SIGNAL
absolu
COMPARATOR
#16
TDT16
Relative
AND
AND
AND
LEVEL #16
COMPARATOR
#16
OR
POW ()
#20
GAIN
#16
-TD4DIFF or
TDWW 1001 00E0
FOURTH ORDER
IIR FILTER #17
POW ()
#17
absolu
COMPARATOR
#17
TDT17
Relative
LEVEL #17
COMPARATOR
#17
OR
POW ()
#20
GAIN
#17
-TD4DIFF or
TDWW 1100 00E0
FOURTH ORDER
IIR FILTER #18
FOURTH ORDER
IIR FILTER #19
POW ()
#18
absolu
COMPARATOR
#18
TDT18
Relative
LEVEL #18
COMPARATOR
#18
OR
POW ()
#20
GAIN
#18
-TD4DIFF or
TDWW 1200 00E0
57/84
ST75C530 - ST75C540
IX - TONEDETECTORS (continued)
Figure 21c : SecondaryTone Detector Configuration (4 tone detectors1 + 1 + 1 + 1)
FOURTH ORDER
IIR FILTER #16
POW ()
#16
INPUT SIGNAL
absolu
COMPARATOR
#16
TDT16
Relative
AND
AND
AND
AND
LEVEL #16
COMPARATOR
#16
OR
POW ()
#20
GAIN
#16
-TD4DIFF or
TDWW 1001 00F0
FOURTH ORDER
IIR FILTER #17
POW ()
#17
absolu
COMPARATOR
#17
TDT17
Relative
LEVEL #17
COMPARATOR
#17
OR
POW ()
#20
GAIN
#17
-TD4DIFF or
TDWW 1100 00F0
FOURTH ORDER
IIR FILTER #18
POW ()
#18
absolu
COMPARATOR
#18
TDT18
Relative
LEVEL #18
COMPARATOR
#18
OR
POW ()
#20
GAIN
#18
-TD4DIFF or
TDWW 1201 00F0
FOURTH ORDER
IIR FILTER #19
POW ()
#19
absolu
COMPARATOR
#19
TDT19
Relative
LEVEL #19
COMPARATOR
#19
OR
POW ()
#20
GAIN
#19
-TD4DIFF or
TDWW 1300 00F0
58/84
ST75C530 - ST75C540
IX - TONE DETECTORS (continued)
IX.3 - Example
Hereunder is an example of programming a single
Tone detection (using Cell #3) and a complex dif-
ferentialtone detection (using Cell #4 and #5).
Bit 3 of the TONEDET variable will be triggered
eachtime the energyof thatfiltered signalis higher
than Static Level number 3.
Bit 4 of the TONEDETvariablewill be on eachtime
a receive signal has an energy higher than the
Static Level number 4. Bit 5 will be on only when
the Filtered (Filter section 4 and 5) received signal
higher than the energy of the wide-band signal
number 4 ; this prevents triggering on noise.
Figure 22 : Wiring Example
@00
@13
@14
@15
BIQUADRATIC
FILTER
@23
POWER
#3
GROUND
#3
COMP.
#3
@33
LEVEL #3
@01
Rx SIGNAL
@24
@34
BIQUADRATIC
FILTER
POWER
#4
D3
D4
@02
@03
#4
COMP.
#4
2
2
LEVEL #4
D5
@25
@35
TONEDET0
BIQUADRATIC
FILTER
POWER
#5
#5
COMP.
#5
LEVEL #5
Program Cell #3 :
TDWW
03
00
13
01
Connect Received signal to Filter and Filter to Energy.
TDWW 03 01
Connect Level to Comparator Neg Input and Energy to Pos Input.
33
23
Program Cell #4 and #5 :
TDWW
Connect Received Signal to Filter and Energy.
TDWW 04 01
04
00
01
34
01
24
14
25
Connect Level to Comparator Neg Input and Energy to Pos Input.
TDWW
Connect Filter#4 Output to Filter and Filter to Energy.
TDWW 05 01
Connect Wide-band Energy to Neg Input and Energy to Pos Input.
05
00
15
24
59/84
ST75C530 - ST75C540
X - PARALLEL DATA EXCHANGE
X.1 - Overview
Name
Address
$2E
$2F
$30
Description
Buffer 0 Status Byte
Buffer 0 Data Byte 0
Buffer 0 Data Byte 1
Buffer 0 Data Byte 2
Buffer 0 Data Byte 3
Buffer 0 Data Byte 4
Buffer 0 Data Byte 5
Buffer 0 Data Byte 6
Buffer 0 Data Byte 7
Buffer 1 Status Byte
Buffer 1 Data Byte 0
Buffer 1 Data Byte 1
Buffer 1 Data Byte 2
Buffer 1 Data Byte 3
Buffer 1 Data Byte 4
Buffer 1 Data Byte 5
Buffer 1 Data Byte 6
Buffer 1 Data Byte 7
DTTBS0
While transmiting (respectively receiving) data to
(from) the telephone line data are exchanged be-
tween the host and the ST75C530/540.
DTTBS0 [0]
DTTBS0 [1]
DTTBS0 [2]
DTTBS0 [3]
DTTBS0 [4]
DTTBS0 [5]
DTTBS0 [6]
DTTBS0 [7]
DTTBS1
$31
Two totaly independent channels are provived for
transmit and receive data. Even while using half
duplex modes of operation, the transmitted data
comes from the transmit buffers and the receive
data arrives in the receive buffers.
$32
$33
$34
$35
$36
IT2
Two independent interrupts,
IT3 (forreceive) are availablefor synchronizingthe
IT0
(for transmit) and
$37
ST75C530/540 and the host. An additional
DTTBS1 [0]
DTTBS1 [1]
DTTBS1 [2]
DTTBS1 [3]
DTTBS1 [4]
DTTBS1 [5]
DTTBS1 [6]
DTTBS1 [7]
$38
interruptwill signalthe errorsinthesynchronization
mechanism.
The equivalent data flow is as follows (see Fig-
ure 20).
The ST75C530/540 has a buit-in HDLC capability.
This feature automatically performs HDLC fram-
ing/deframing, CRC generation/detectionand “0”
insertion/deletion. The ST75C530/540 have also
UART capability, the format of data is selected by
$39
$3A
$3B
$3C
$3D
$3E
$3F
Bit 0 (LSB) of the Buffer 0 Data Byte 0 is thefirst in
time to be transmited.
FORM
the
commanddescribed bellow.
According to the Data Format, the Status byte of a
buffer has different meanings. However a value of
0 signals to the host that a buffer is empty. This
value is set by the ST75C530/540 each time it has
emptied the buffer. After having used one buffer,
the host must select the other buffer for the next
operation. The host must start with the Buffer 0 as
soon as the ST_106 signal goes on and BEFORE
X.2 - Transmit Buffers
Twoidentical buffersare provided to exchangethe
data between the host interface and the
ST75C530/540. When the host is writing data into
a buffer, the ST75C530/540 is transmitting the
other one. After that, both the host and the
ST75C530/540switch to use the other buffer. This
mechanism, called “Double-Buffering”, ensures
that the host has the maximum time to fill one
buffer.
XMIT 1
the
command is sent.
A mechanism of interruption (IT2 for Transmit) is
associated with the data buffer managment. Each
time a buffer is emptied by the ST75C530/540 it
generates an interrupt.
The DUAL Ram area associated with the transmit
buffers is as following table.
Figure 23
IT2
Tx
HDLC
UART
Tx
MODUL.
BUFFERS
Telephone
Line
H
HDLC
UART
Rx
BUFFERS
DEMOD.
Rx
Control
Data
IT3
60/84
ST75C530 - ST75C540
X - PARALLEL DATA EXCHANGE (continued)
X.3 - ReceiveBuffers
X.4 - Interruption
Two Interrupt signals are provided in order to syn-
chronize the Data Buffer Exchanges. IT2 is asso-
Symetrically two identical buffers are provided to
exchange receive data b etween the
ST75C530/540 and the host processor. While the
ST75C530/540is filling one of the buffers with the
receivebits, the host processoris reading the other
buffer. As soon as the host has emptied a buffer it
frees it by writing 0 in the buffer status byte.
IT3
ciatedwiththe Transmit Buffermechanismand
with the Receive Buffer mechanism.
In order to enable these interrupts, the Host proc-
essor must set the bit 2 (for IT2) and the bit 3 (for
IT3
) of the
ITMASK
Register to 1. It must also set
the Bit 7 of the ITMASK register to 1 in order to
globallyenable allthe selectedsourcesof interrup-
tion.
The DUAL Ram area associated with the receive
buffers is as following table.
SINTR
When an Interrupt occurs (low level on
the user must read the ITSRCR Register to deter-
IT2
pin)
Name
Address
$1C
$1D
$1E
$1F
$20
Description
Buffer 0 Status Byte
Buffer 0 Data Byte 0
Buffer 0 Data Byte 1
Buffer 0 Data Byte 2
Buffer 0 Data Byte 3
Buffer 0 Data Byte 4
Buffer 0 Data Byte 5
Buffer 0 Data Byte 6
Buffer 0 Data Byte 7
Buffer 1 Status Byte
Buffer 1 Data Byte 0
Buffer 1 Data Byte 1
Buffer 1 Data Byte 2
Buffer 1 Data Byte 3
Buffer 1 Data Byte 4
Buffer 1 Data Byte 5
Buffer 1 Data Byte 6
Buffer 1 Data Byte 7
DTRBS0
mine the sourceof the interrupt, either
forTx (if
DTRBS0 [0]
DTRBS0 [1]
DTRBS0 [2]
DTRBS0 [3]
DTRBS0 [4]
DTRBS0 [5]
DTRBS0 [6]
DTRBS0 [7]
DTRBS1
the bit 2 is 1) or IT3 for Rx (if the bit 3 is 1).
Once the Interrupt has been serviced, the host
must acknowledgeit by writinga $00 valueinto the
ITRES2
IT2 IT3
register
for
, or ITRES3 for .
$21
These registers have the following address :
$22
Name
ITRES2
ITRES3
ITMASK
ITSRCR
Address
$42
Type
Description
$23
Write only Clear IT2
$24
$43
Write only Clear IT3
$25
$4F
Read/Write Interrupt Mask
Read Only Interrupt Source
DTRBS1 [0]
DTRBS1 [1]
DTRBS1 [2]
DTRBS1 [3]
DTRBS1 [4]
DTRBS1 [5]
DTRBS1 [6]
DTRBS1 [7]
$26
$50
$27
Notes : 1. The ST75C530/540 does not check thatthe interrupt has
been acknowledged.
$28
2. Even if the Host does not use the interruption, the
IT2
ST75C530/540 will set the bit 2 (for
IT3) of the ITSRCR.
) and/or bit 3 (for
$29
$2A
$2B
$2C
$2D
3. The ST75C530/540 uses only the Data Buffer Status
Bytes to detectOverrun or Underrun Error.These errors
SYSERR
are reported into the
an interrupt IT0.
byte, and could generate
The equivalent schematic is : see Figure 21.
The interrupt mechanism assumes that the Host
processor uses a Level sensitive interrupt (active
low). The Flow chart of the Host interrupt service
routine looks generaly like Figure 22.
The Bit 0 (LSB) of the Buffer 0 Data Byte 0 is the
first received bit in time (the oldest).
According to the Data Format, the Status byte of a
buffer has different meaning. Howevera value of 0
signalsto theST75C530/540thata buffer isempty.
This value is set by the Host each time it has
emptied the buffer. After having used one buffer,
the host must select the other buffer for the next
operation. The Host must start with the Buffer 0 as
X.5 - Data Format
Different Formats of Data can be Transmitted/Re-
ceived to/from the Telephone Line.
These Formats can be selected when entering the
Data Mode by using the FORM command.
The Format of the Data can be changed,on the fly
in the Data Mode duringthe same communication,
STA_109
soon as the
signal goes.
IT3
FORM
commandat anytime.
A mechanism of interruption (
for Receive) is
by sendinga different
associatedwith the Data Buffermanagment.Each
time a bufferis filled by the ST75C530/540 it gen-
erates an interrupt.
Note that for Full Duplex operation the Data For-
mat is the same for the transmitter and the re-
ceiver.
61/84
ST75C530 - ST75C540
X - PARALLEL DATA EXCHANGE (continued)
Figure 24
ITRES 2
(write only)
R
S
Q
Q
(Tx buffer emptied)
ITRES 3
(write only)
From
ST75C540
DSP
R
S
(Rx buffer filled)
ITSRCR
(read only)
6
5
4
3
2
1
0
SINTR
ITMASK
(read write)
7
6
5
4
3
2
1
0
Figure 25
IT
Check only the Interrupt sources
that we want to manage under Interrupt
READ ITSRCR
MASK UNWANTED BITS
Yes
= 0
RETURN
If all sources served return from interrupt
No
Yes
Execute Tx Buffer
BIT 2 = 1
No
EXECUTE IT_TRANSMIT
WRITE 00 INTO ITRES2
Management
Reset IT2
Yes
Execute Rx Buffer
Management
BIT 3 = 1
No
EXECUTE IT_RECEIVE
WRITE 00 INTO ITRES3
Reset IT3
(Other Interrupts)
62/84
ST75C530 - ST75C540
X - PARALLEL DATA EXCHANGE (continued)
X.6 - FORM Command
- Flag generation (7E) at the end of a frame.
- Abort frame.
- Programmable number of Starting flags.
- Programmable number of Inter frame flags.
- Programmable number of Ending flags.
The Buffer Status Byte DTTBSx defines the frame
type, and the number of Data Bytes to transmit.
FORM
The
command allows the selection of the
Data Format. The Parameter syntax is as follows :
Field
Byte Pos. Value
Definition
X_SYNC
1
2..0 000* Synchronous format
001 Transmit continuous
“1”(1)
010 HDLC framming
011 Transmit continuous
”0”(1)
X.6.2.2 - HDLC Receive
The HDLC Receiver performs the following tasks :
- Flag recognition.
- Opening flag recognition.
- Zero deletion.
100 UART
X_ANBIT
X_APAR
2
2
1..0
3..2
00
01
7 Bit per character
8 Bit per character
00
01
10
No parity
Even parity
Odd parity
- CRC16 computation.
- CRC16 check ; error CRC16 detection.
- Closing flag recognition.
- Abort frame detection.
X_ASTOP
2
5
0
1
1 stop bit(1)
2 stop bit(1)
Note : 1. Transmit only
- Received CRC.
DTRBSx
TheBufferStatusByte
containsthe frame
X.6.1 - Synchronous Mode
The synchronous mode is the default mode, if no
FORM
type, the number of Data Bytesand theerror report
if any. The errors detected are :
command is used.
The transmitter reads the bits in the DUAL Ram
DTTBFx
- CRC16 Error : Wrong CRC received.
- Non byte-alligned frame : The number of Data bits
betweenthebeginingoftheframeandtheendofthe
frame (after “zero” deletion)is nota byte-multiple.
- Aborted frame : More that 6 consecutive “1” re-
ceived.
Buffer
(starting with the Bit 0 of Byte 0 of
Buffer 0) and send them over the Telephone line.
The Buffer Status Byte DTTBSxcontains the num-
ber of Data Bytes to transmit.
The Receiver write the received bits coming from the
Telephone line and write them into the DUAL Ram
Buffer DTRBFx (startingwith theBit 0 ofthe Byte0 of
X.6.3 - UART Mode
In the UART mode the buffers contains only one
Characterto transmit or received. The worse case
of interruptrate isobtained withthe lowercharacter
bit length (7bit of data, no parity and 1 stopbit) and
is provided in the following table.
DTRBSx contains
theBuffer0).TheBufferStatusByte
thenumberof Data Bytes received (generaly 8).
IT2 IT3
The timebetweeneach
interrupts(or ) is equal
to 64-bit if the number of Data Bytes is set to 8. The
Host hasthe full 64bitstime to serve the interrupt :
Bit Rate (bps)
Interrupt Time (ms)
14400
12000
9600
7200
4800
2400
1200
300
0.41
0.41
0.82
1.25
1.64
3.75
7.5
Bit Rate (bps)
Interrupt Time (ms)
14400
12000
9600
7200
4800
2400
1200
300
4.4
5.3
6.6
8.8
13.3
26.6
53.3
213.3
853.3
30
75
120
75
X.6.3.1 - UART Transmit
TheUARTTransmitterperformsthefollowing tasks:
- Start bit generation.
- Parity Computation.
X.6.2 - HDLC Mode
The HDLC Format can be used for T.30 or ECM
implementations
- Stop Bit generation.
- Break generation.
X.6.2.1 - HDLC Transmit
X.6.3.2 - UART Receive
The UART Receiver performs the following tasks :
- Start bit recognition.
- Parity Checking.
- Stop bit Checking.
TheHDLC Transmitterperformsthefollowingtasks:
- Flag generation(7E) while in inter-frame.
- Flag generation(7E) at the begining of a frame.
- Zero insertion (after 5 consecutive“1”).
- CRC16 computation.
- CRC16 transmission at the end of a frame.
- Break detection.
63/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE
XI.1 - Description
XI.1.1 - XMIT Command
transmission, to stop sending the carrier on the
telephone line.
STOP
Prior to the
command the user must have
XMIT
The
the Parallel Data process.
XMIT
Command works like a CTS signal for
stop the parallel transmition with a XMIT off com-
mand.
When the currentdata bufferwillbe totalytransmit-
ted, and that no more buffers will be available,that
is to said both DTTBF0 and DTTBF1 will be $00
(equivalent to an Underrun condition).
When
continuous“1”. When on theST75C530/540trans-
FORM
is off, the ST75C530/540 transmits
mitsData in accordancewith the
and starts to manage the Data Buffer.
command
This command can be sent at any time, while in
Data Mode (see Table below).
XI.1.4 - Timing
Here are regular sequences to stop properly the
transmition (see Figure 27).
XI.1.2 - FORM Command
FORM
The
redefine the current format. The effect will take
XMIT
Command can be sent at any time to
Field
Byte Pos. Value
Definition
(Off) Send
continuous “1” (**)
place only when
is on.
TX_START
1
0
0 *
1
.
Here is a formal example showing the relationship
(On) Send Data
according with the
Format defined in the
FORM command.
XMIT
, and
FORM
Commands (see Fig-
between
ure 26).
XI.1.3 - STOP Command
The STOP command is used, at the end of the
** The XMITOff command takes effectonly when thetwo Transmit
DTTBF0 and DTTBF1 equal to $00.
buffers are empty :
Figure 26
STA_106
DATA
1
1
0
1
0
$7E
TRANSMITTED
COMMANDS :
FORM3
XMIT 1
XMIT 0
XMIT 1
FORM 2
XMIT 0
Figure 27
Case # 1 Synchronous Format
STA_106
FeedLast Buffer
XMIT0
STOP
(ignored until here)
Last Buffer
DATA
1
TRANSMITTED
Case # 2 HDLC Format
STA_106
FeedLast Buffer
XMIT0
STOP
(ignored until here)
DATA
TRANSMITTED
Last Buffer CRC16 $7E
1
Case # 3 UART Format
STA_106
XMIT0
STOP
(ignored until here)
DATA
TRANSMITTED
Last Buffer
1
64/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE (continued)
XI.1.5 - FSK Full Duplex Mode
Establisha V.29transmition and send the very first
Buffer (see Figure 29).
In FSK Full duplex Mode the parallel mode as-
sumes that the Bit time duration is the nominal Bit
rate.
Figure 28
Each bit element from the Transmit buffer is main-
tained during the full bit time.
BEGIN
The Nominal bit clock is defined as follows :
READ BIT IN
INTERNAL BUFFER
FSK Standard Nominal Transmit Bit Rate (Hz) (1)
V.21
300
300
75
No
Bell 103
INTERNAL BUFFER
EMPTY
V.23 Originate
V.23 Answer
Yes
1200
RETURN
SELECT NEXT DUAL
RAM BUFFER X
Note 1 : The accuracy of the Bit clock is given by the
ST75C530/540 oscillator, and must better than 100ppm.
XI.2 - Modem Flow Chart
Yes
DTTBSx= 0
When Data Mode, each time the ST75C530/540
need a bit to transmit it executes the following
routine (see Figure 28). Where x starts with the
value 0 and toggle thereafter between 1 and 0.
No
SIGNAL ERROR
INTO ERR_TX
MOVE DTTBFx DATA
TO INTERNAL BUFFER
XI.3 - Host Flow Chart
Here after are Flowcharts to :
- Establisha V.29 transmission
- Send Synchronous continuous “$AA, $55, $AA,
$55, ...”sequence.The managmentof the Buffers
are done under Interrupt.
RAISE IT0 INTERRUPT
CLEAR DTTBSx
RAISE IT2 INTERRUPT
RETURN
SELECT DUAL
RAM BUFFER x = 0
RETURN
- Stop properly the transmition.
Figure 29
Subroutine :
CONF 0F 08 00 01
HSHK
Select V.29 9600bps
FILL FIRST BUFFER
Start V.29 sequence
WRITE AA, 55 ...
INTO DTTBF [0..7]
FORM 00 (opt)
FILL FIRST BUFFER
Format synchronous
Fill the first buffer # 0
WRITE 08 INTO DTTBFS0
SELECT NEXT BUFFER
IBUF = 1
No
Wait until end
of training
STA_106 = 1
Tx_COMPLETED = FALSE
Yes
Start to transmit
the first buffer
XMIT 1
ENABLE IT2
ITMASK = 0 x 84
RET
65/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE (continued)
DTTBSx buffer. An abort frame is transmitted in
place of the regular Buffer.
- This condition cannot append in UART mode.
When an underflow condition occur the host must
restart thewhole parallelinitialization, as explained
above.
These flowcharts show two CPU variables labeled
IBUF and Tx_Completed, they are necessary for
the understanding of the mechanism, but there is
different manners to implement it. These two vari-
ables have the following meanning :
- IBUF: Thisis thenumberof theDUALRAMBuffer
currently in use by the Host processor. It starts
with 0 and then alternate 1, 0, 1, 0, ...
Figure 31
- Tx_Completed : This is a Flag to dialog with the
interrupt process in order to stop properly the
transmition.
Stop sending parallel
data (delayed)
XMIT 00
The other Buffers are sent under interrupt control
(refer to the interrupt flow chart, Figure 30).
STOP
Stop signal
To stop properly the transmition, without loss of
Data (see Figure 31).
Tx_COMPLETED = TRUE Semaphore with interrupt
Figure 30
EXECUTE_IT_TRANSMIT
Wait until last buffer is
No
STA_106 = 1
transmitted and CCITT
stop sequence completed
Yes
Yes
Tx_COMPLETED ?
No
XI.5 - Synchronous Mode
XI.5.1 - Description
No
IBUF = 1
In synchronousmode theST75C530/540transmits
the bits containedin the DUALRAM Buffer without
any modification. It starts with the Bit 0 of the
(1)
(1)
Yes
WRITE AA, 55, ...
INTO DTTBF1
WRITE AA, 55, ...
INTO DTTBF0
DTTBF0[0]
byte.
WRITE 08 INTO DTTBS1
IBUF = 0
WRITE 08 INTO DTTBS0
IBUF = 1
XI.5.2 - Status Word Format
DTTBS0
havethesamefollowingmeaning(seetablebelow).
DTTBS1
or
The Transmit Status Bytes
DTTBSx in Synchronous Mode
Field
Pos. Value
Definition
RETURN
BUFF_LENG 3 .. 0
0
1
Buffer empty.
1 Byte to transmit
DTTBFx[0]
(
).
2 Bytes to transmit
DTTBFx[0]
2
XI.4 - Error Detection
Error occurs when the ST75C530/540 need some
DTTBSx
(
and
DTTBFx[1]).
..
8
..
bitsfromthetransmitbuffer
is empty. This condition is called “Underflow”.
ERR_TX
andthisbuffer
8 Bytes to transmit
(DTTBFx[0 .. 7]).
This error is signaled in the bit
SYSERR byte, and generates an interrupt IT0. To
CSE01
of the
Other Not allowed.
Other
7 .. 4
0
Reserved, must be 0.
cleartheerror a
commandmust be issued.
This status byte must be written by the Host, after
DTTBFx[0..7]
with the right number of data bytes to transmit.
An Underflow contition occurs when :
- In synchronous mode: the host processor “for-
filing the corresponding data buffer
DTTBSx
gets” to feed the current
buffer.
- In HDLC mode: when, while inside a frame, the
host processor “forgets” to feed the current
This status byte is cleared by the ST75C530/540,
IT2
just before generating the
interrupt.
66/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE (continued)
XI.6 - HDLC Mode
XI.6.1 - Description
will be transmitted, the ST75C530/540 will send
8 consecutive“1” and wait for the next buffer.
In HDLC mode the ST75C530/540 transmits the
data bytes contained into the DUAL Ram buffer
packed inside an HDLC frame. The mechanism is
as follows :
- While the Host has no frame to transmit, that is:
a s long as DTTBSx equals $00, the
ST75C530/540transmits the HDLC Flag $7E.
- When the Host wants to sendsome data,it feeds
the buffer with some data bytes to transmit (be-
XI.6.2 - Status Word Format
DTTBSx in HDLC Mode
Field
Pos. Value
Definition
Buffer empty.
1 Byte to transmit
BUFF_LENG 3 .. 0
0
1
DTTBFx[0]
(
).
2
2 Bytes to transmit
(DTTBFx[0] and
DTTBFx[1]).
..
8
..
BUFF_SFRM
tween 1 and 8) and set the
bit in
8 Bytes to transmit
(DTTBFx[0 .. 7]).
the DTTBSx status buffer. At that time the
ST75C530/540 start sending data contained in
the Buffer, computin the CRC and performing
“zero intertion” if needed.
- When the host wants to send additional data
(within the same frame) it feeds the buffers just
like in synchronousmode. If an Underflowcondi-
tion occurs, the ST75C530/540 will abort the
frameby sending 8 consecutive“1”, and the Host
must restart the whole parallel initialization.
- When the host wants to close a frame, it set the
other Not allowed.
BUFF_SFRM
BUFF_EFRM
4
5
0
1
Data stream.
Start of frame : the buffer
is a beginning of frame.
0
1
Data stream.
End of frame : the buffer
will be followed by the
transmission of the CRC
and closing flag.
BUFF_FRAB
Other
6
7
0
1
Data stream.
Abort frame :
8 consecutive “1” will be
transmitted (whatever
BUFF_LENG is).
BUFF_EFRM
DTTBSx
statusbuffer. At
bit in the
that time the ST75C530/540 will send the con-
tents of the buffer, then send the CRC and an
HDLC closing flag $7E.
- If the Host, wantsto abort a frame(while sending
a frame)it settheBUFF_FRABbit intheDTTBSx
status buffer.Atthattime,as soonasthelastbuffer
0
Reserved, must be 0.
Notes : 1. A buffer can have BUFF_SFRM and BUFF_EFRM set
DTTBSx byte, this means that the frame
in the same
transmitted is short (between 1 and 8 Bytes long).
2. An ending frame (with BUFF_EFRM set) must have at
least ONE byte of data to transmit.
XI.6.3 - Single Short Frame (see Figure 32)
Figure 32
TRANSMITTED
DATA
$7E
D0 CRC $7ED1 CRC
$7E
D2
CRC $7E D3 CRC $7E
BUFF_FRAB
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
(BUFF_DATA)
0
6
2
0
8
0
5
0
D0 D1
D2
D3
67/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE (continued)
XI.6.4 - Long Frame
Figure 33
TRANSMITTED
DATA
D0
$7E
D1
D2
D3 CRC
$7E
BUFF_FRAB
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
(BUFF_DATA)
5
4
0
8
8
0
D0
D1
D2
D3
XI.6.5 - Abort Frame
Figure 34
TRANSMITTED
DATA
D0
$7E
D4
$7E
D1
D2
ABORT
D3
D5
BUFF_FRAB
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
5
x
x
8
0
8
8
0
6
8
(BUFF_DATA)
D0
D1
D2
D3
D4
D5
XI.6.6 - Abort Due to Underflow
Figure 35
TRANSMITTED
DATA
ABORT
$7E
D4
$7E D0
D1
D2
D3
D5
BUFF_FRAB
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
0
5
8
8
0
6
8
8
D4
(BUFF_DATA)
D0
D1
D2
D3
D5
(1)
(3)
(2)
ERR_TX
Where : 1. The Underflow condition appears when the ST75C530/540 needs, inside a frame, some bytes to transmit and that the
corresponding buffer is empty.
2. The ERR_TX bit is cleared with a CSE 01 Command.
3. After an Underflow condition restart the initialization of the parallel mode and use the buffer number 0.
68/84
ST75C530 - ST75C540
XI - TRANSMITTING DATA IN PARALLEL MODE (continued)
XI.6.7 - HDLC Special Timming
Figure 36
XMIT 0
FORM 2
XMIT 1
STOP
_NHFBF
7E..7E 7E
_NHFCF
_NHFST
7E 7E..7E
CRC
DATA
Time
CRC 7E..7E 7E
DATA
DATA TRANSMITTED
Time to fill the Buffer 0
Time
Time to fill the
Time
(Otherwise Extra
Flags Added)
to fill the
Buffer 1
to fill the Buffer 1(Otherwise to fill the
Buffer 0 Extra Flags Added) Buffer 0
IT
Tx
IT
Tx
IT
Tx
IT
Tx
IT
Tx
Aset of global variables allows the programmation
of the number of flags (7E) generated by the
ST75C530/540:
- _NHFBF : Number of flagsbefore the first frame.
- _NHFCF : Number of flags between frames.
- _NHFST : Number of flags after the last frame.
command).
- If the user wants to send a break signal, he has
BUFF_UBRK
toset the
ing Status Word (
defined as a totaly null character with all stop bits
duration maintained to “0” (e.g: if format is 7 bit,
even parity and 2 stop bit, break is a ”0” durring
10 bit). Multiple continuous breaks (“0” continu-
ous signal) can be send by using consecutive
bitwithinthe correspond-
DTTBSx
). A break signal is
The default value for all these variables is 0, the
programming range is from 0 to 7FFF (32767).
These varaibales must be modified with a MW or
MWI command (see Figure 36).
BUFF_UBRK
buffers with
set to 1.
XI.7.1 - Status Word Format
XI.7 - UART Mode Description
DTTBSx in UART Mode
Pos. Value Definition
In UART mode the ST75C530/540 transmits the
data Character contained into the DUAL Ram
buffe. The mechanism is as follows :
Field
BUFF_LENG 3 .. 0
0
1
Buffer empty.
1 character to transmit
(DTTBFx[0]).
- While the Host has no character to transmit, that
DTTBSx
is: as long as
equals $00, the
ST75C530/540transmits continuous “1”.
other Not allowed.
- Whenthe Hostwantsto send a chacarter,it feeds
the buffer with the character to transmit.
- The ST75C530/540 start to send a stop bit (“0”)
then thecharactercontainedintheBuffer,comput-
ing the parity. It send the parity bit, if needed, and
BUFF_UBRK
Other
6
7
0
1
Normal character.
Break signal : a complete
“0” character with all stop
bits equal to ”0”.
0
Reserved, must be 0.
FORM
the stop bits (1 or 2 according with the
69/84
ST75C530 - ST75C540
XII - RECEIVING IN PARALLEL MODE
Figure 37
DEMODULATED
SIGNAL
SAMPLE TIME
0
0
1
0
0
1
0
0
1
1
RECEIVE BIT
XII.1 - Description
XII.3 - Host Flow Chart
When the STA_109 (CD) signal goes on, the
ST75C530/540 will write received data into the
DUAL RAM buffer DTRBS0 at first.
Hereafter are flowcharts to :
- Establish a V.29 reception.
- Receive synchronous data. This task is per-
formed under interrupt.
- Handle properly some temporary loss of carrier.
XII.1.1 - Initialization
The host processor must enable the IT3 receive
interrupt first.
Figure 38
BEGIN
Thenit must empty the two DTRBS0 and DTRBS1
registers by writting $00 at these locations.
As soon as the first IT3 interrupt appears, the host
must proceed with the DTRBS0 buffer.
WRITE BIT IN
INTERNAL BUFFER
XII.1.2 - Loss of Carrier
No
INTERNAL BUFFER
FULL
Each time a loss of carrier appears the
ST75C530/540 stops updating the Data buffer. If
the carrier reappers the host must proceed again
with the initialisation sequence.
Yes
RETURN
SELECT NEXT DUAL
RAM BUFFER X
XII.1.3 - FSK Synchronization
No
The FSK Full Duplex demodulator uses an algo-
rithm based on the transitions of the received sig-
nal. The synchronization mechanism is adjusted
with each signal transiton in order to sample the
demodulated signal at the middle of the bit
(see Figure 37).
DTRBSx = 0
Yes
SIGNAL ERROR
INTO ERR_Rx
MOVE DATA FROM INTERNAL
BUFFER TO DTRBFx
RAISE IT0 INTERRUPT
WRITE DTRBSx
RAISE IT3 INTERRUPT
RETURN
XII.2 - Modem Flow Chart
When in parallel data mode, each time the
ST75C530/540 has receive some bit of data it
executesthe following routine (see Figure 38).
SELECT DUAL
RAM BUFFER x = 0
Where x start with the value 0 and toggle between
1 and 0.
RETURN
70/84
ST75C530 - ST75C540
XII - RECEIVING IN PARALLEL MODE (continued)
Establish the reception (see Figure 39).
Figure 39
Subroutine :
CONF 0F 08 00 01
Select V.29 9600bps
CLEAR FIRST BUFFER
SYNC1
Arm V.29 receiver
WRITE 00 INTO DTRBFS0
WRITE 00 INTO DTRBFS1
Clear the first
buffers #0 and #1
CLEAR FIRST BUFFER
FORM 00 (opt)
SELECT NEXT BUFFER
IBUF = 0
Format synchronous
ENABLE IT3
ITMASK = 0 x 88
Wait until V.29
carrier detected
No
STA_109 = 1
Yes
RET
No
In case of lost of carrier
while in data mode
STA_109 = 0
Yes
These flowcharts show one CPU variable labeled
IBUF which is necessary for the understanding of
the mechanism, but there are different manners to
implement it.
Figure 40
EXECUTE_IT_RECEIVE
- IBUF: thisis thenumber of theDUAL RAMbuffer
currently inuse by theHostprocessor.It startswit
0 an then alternates 1, 0, 1, 0, ...
No
IBUF = 1
(1) Yes
(1)
The received bits are read by an interrupt routine
(See Figure 40).
READ DTRBS1
EXTRACT BUFF_LENG
READ DTRBS0
EXTRACT BUFF_LENG
XII.4 - Error Detection
BUFF_LENGTIMES (2)
READ DTRBF1 DATA
BUFF_LENGTIMES (2)
READ DTRBF0 DATA
Error occurs when the ST75C530/540 has re-
ceivedsome bits andthat the bufferDTRBSx isnot
empty, this condition is called “Overflow”.
WRITE 00 INTO DTRBS1
IBUF = 0
WRITE 00 INTO DTRBS0
IBUF = 1
ERR_RX of the
This error is signaled in the bit
SYSERR
IT0
byte, and generates an interrupt
. To
clear theerror a CSE02 commandmust be issued.
An Overflow condition occurs when :
- In synchronous mode: the host processor “for-
RETURN
DTRBSx
gets” to empty the current
buffer.
- In HDLC mode: when, while inside a frame, the
host processors “forgets” to empty the current
DTRBSx buffer.
Notes : 1. At that step the host can check that the corresponding
DTRBSx buffer is full (different from $00), otherwise it is
an error.
BUFF_LENG bytes, insidethe Receive
2. This means read
- In UART mode, this cannot happen.
buffer DTRBFx starting from location DTRBFx[0] to
DTRBFx[BUFF_LENG - 1]. In synchronous mode, the
When an Overflow condition occurs the host must
restart the whole parallel initialisation.
BUFF_LENG
STA_109
isalways 8bytes, exceptwhena
lost appears in the middle of the buffer.
71/84
ST75C530 - ST75C540
XII - RECEIVING IN PARALLEL MODE (continued)
XII.5 - Synchronous Mode
XII.5.1 - Description
inside the frame, are erroneous.
•
Non Byte-Aligned frame (middle priority): the
received data bit count (after deletion of the
“zero inserted”), between the opening and the
closing flag, is not a multiple of 8.
In synchronous mode the ST75C530/540 writes
the received bit into the DUALRAM Buffer without
any modification. It starts with the Bit 0 of the
• Aborted frame (highest priority): the frame was
aborted with at least 7 consecutive“1”
DTRBF0[0]
byte.
- An abortframe can be also detected,while in the
inter framemode, if insteadof receiving $7E flag,
theST75C530/540receivemorethan 7 consecu-
tive “1”. In this case only one Aborted frame is
signaled, event if the ”1” condition is maintained.
XII.5.2 - Status Word Format
DTRBS0 DTRBS1
have
the same following meaning (See Table below).
ThereceiveStatusByte
or
The BUFF_LENG is always 8 except when a lost
STA_109
of carrier (
going to 0) happens.
DTRBSx in Synchronous Mode
This status byte is set by the ST75C530/540, just
Field
Pos. Value
Definition
IT3
before generating the
interrupt.
BUFF_LENG 3 .. 0
0
1
Buffer empty.
1 Byte received
(DTRBFx[0]).
XII.6 - HDLC Mode
XII.6.1 - Description
In HDLC mode the ST75C530/540 extracts from
the received HDLC frame the Data information
only. It reports, trough the DUAL Ram buffer, only
data information and frame validity. The mecha-
nism is as follows :
2
2 Bytes received
DTRBFx[0]
(
and
DTRBFx[1]
).
..
8
..
8 Bytes received
(DTRBFx[0 .. 7]).
Other Not used.
Other
7 .. 4
0
Not used.
- As long as the ST75C530/540 receives continu-
ous HDLC Flag $7E, nothing happens. Note that
the ST75C530/540allows zero sharing between
adjacent flags.
- When the ST75C530/540 receives some data, it
removes inserted “zero” if needed, and starts to
compute the CRC. As soon as its internal buffer
is full,theST75C530/540writesthereceiveddata
XII.6.2 - Status Word Format
DTRBSx in HDLC Mode
Pos. Value Definition
Field
BUFF_LENG 3 .. 0
0
1
Buffer empty.
1 Byte received
(DTRBFx[0]).
2 Bytes received
(DTRBFx[0] and
DTRBFx[1]).
..
DTRBFx
into the
buffer and sets the
2
BUFF_SFRM
DTRBSx
inside the
status byte.
- Wh en receiving additional data, the
ST75C530/540 feeds the buffer just like in syn-
chronous mode.
- When the ST75C530/540receives a closing flag
(which can be shared with the following opening
flag) it compares the received CRC with its inter-
nal computation. It writes the contents of the
..
8
8 Bytes received
DTRBFx[0 .. 7]
(
).
other Not allowed.
BUFF_ERRS 5 .. 4 0 0
No error.
0 1
1 0
1 1
CRC error.
Non Byte-Aligned frame.
Aborted frame.
DTRBFx
received last data into the
buffer, sets
bit and reports any frame error
BUFF_SFRM
BUFF_EFRM
6
7
0
1
Data stream.
BUFF_EFRM
the
Start of frame : the buffer
is a beginning of frame.
in theDTRBSx registervia the BUFF_ERRS bits.
Reported errors are :
• CRC error (lowest priority): the received CRC
is not equal to the computed CRC. Some bits,
0
1
Data stream.
End of frame : the buffer
is a closing frame.
72/84
ST75C530 - ST75C540
XII - RECEIVING IN PARALLEL MODE (continued)
XII.6.3 - Single Short frame
Figure 41
RECEIVED
DATA
$7E
D0 CRC $7ED1 CRC
$7E
D2
CRC $7E D3 CRC $7E
BUFF_ERRS
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
(BUFF_DATA)
0
6
0
2
0
8
D0
D1
D2
XII.6.4 - Long Frame
Figure 42
RECEIVED
DATA
$7E D0
D1
D2
D3 CRC $7E
(1)
BUFF_ERRS
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
(BUFF_DATA)
5
0
8
8
0
8
D0
D1
D2
D3
Note : 1. If error occurs during the reception, it is signaled in this last buffer.
XII.6.5 - Aborted Frame
Figure 43
RECEIVED
DATA
ABORT
D0
$7E
D4
$7E
D1
D2
D3
D5
BUFF_ERRS
11
BUFF_SFRM
BUFF_EFRM
BUFF_LENG
8
x
x
8
0
8
(BUFF_DATA)
D0
D1
D3
73/84
ST75C530 - ST75C540
XII - RECEIVING IN PARALLEL MODE (continued) the Hostprocessor. Thisareaisusedeitherforrecord-
ing (CODER) or playing back (DECODER) the voice
signal.
The DUAL Ram area associated with the VO-
CODER is as follows :
XII.7 - UART Mode
XII.7.1 - Description
In UART mode the ST75C530/540extracts from the
received Characters the Data information only. It re-
ports,troughtheDUAL Rambuffer,onlydatainforma-
tion charactervalidity. The mechanism is as follows :
- As long as the ST75C530/540 receives continu-
ous “1” nothing happens.
Name
VOCSTA
Address
Description
$1C
Vocoder Buffer Status
VOCDATA
VOCCORR
$1D..$2E Vocoder Buffer Data
$2F..$30 Vocoder Buffer Corrector
- When the ST75C530/540 receives the start bit
(“0”) itstarts to compute theparity.As soonas the
number of data bit (defined by the FORM com-
mand) is received, the ST75C530/540writes the
received character into the DTRBFx buffer and
update the receive Status word DTRBSx.
- The Reported errors are :
The IT1interrupt signalis dedicatedto the Vocoder
Buffer Management.
XIII.3 - Transmit(DECODER)
This mode is entered with the CONF DECODER
command.
• Parity error (lowest priority): the receivedparity
is not equal to the computed parity. Some bits,
inside the character, are erroneous.
If the ADPCM or Low bit rate without error correc-
tion mode (CONF_ERCOR = 0) are selected, the
user needsto feed the vocoderbufferwith18 bytes
of voice data, then set the VOCSTA byte with a
value different from zero.
•
Stop bit error (middle priority): the bit after the
parity was not a stop bit (“1”). Note that if the
two stop bit format was selected, only the first
stop bit will be checked.
In the low bit rate with error mode (CONF_ERCOR
= 1), theuser needsto feed the vocoderbufferwith
20 bytes of voice data, then set the VOCSTA byte
with a valuedifferent from zero.
• BreakDetection (highestpriority): the characteris
a breaksignalasdefinedinthetransmit section.If
theduration of the break is longerthan onechar-
acter, onlyonebreakbufferwill be reported.
Once the ST75C530/540 have read the buffer, it
clearstheVOCSTAbyte andraisethe IT1 interrupt.
The IT1 interrupt rate is as follows :
XI.7.2 - Status Word Format
Number of
DTRBSx in UART Mode
Interrupt
Time (ms)
Voice Samples
in the Buffer
Mode
Field
Pos. Value
Definition
(8kHz sampling)
BUFF_LENG 3 .. 0
0
1
Buffer empty.
ADPCM 32Kpbs
ADPCM 24Kpbs
ADPCM 16Kpbs
4.5
6
36
48
1 character received
(DTRBFx[0]).
Other Not allowed.
9
72
BUFF_ERRS
5..4
00
01
10
11
No error.
Low BitRate Nominal
(with and without
error correction)
30
240
Parity error
Stop bit error
Break signal detected
Low Bit Rate
Depends on
Depends on
Fast/Slow Playback speed 15 to 45 speed 120 to 360
XIII - VOCODER DATA EXCHANGE
XIII.1 - Overview
Low Bit Rate Pause
0
-
Asilencecan be generatedby writing zeroto allthe
VOCDATA bytes (and VOCCORR bytes if
CONF_ERCOR = 1). The duration of the silence
will be the same as the other frames of signal.
The ST75C530/540 can receive (or transmit)
coded voice from (to) the telephone line or the
audiointerface. The receiving modeis theCODER
mode while the transmit is the DECODER mode.
Two formats of Voice compression are provided: Low
bit rate and ADPCM. In all the formatsand speedthe
managementof the CodedVoice is exactlythe same.
In any format a frame of all data equal to zero will
be synthesised(DECODER) as a frame of silence.
As the buffer contains always a complete number
of samples representing the same duration, it is
easy to randomly advance forward/backward in a
message.
If the user does not feed the Buffer within the
Interrupt time, the ST75C530/540 will signal this
errorbyrisingtheERR_VOCOin theSYSERRbyte
and rising the IT0 Interrupt. In this case the pre-
vious frame will be re-transmited.
XIII.2 - Vocoder Buffer
A buffer area is reserved in the DUAL ram to
exchange Voice between the ST75C530/540 and
74/84
ST75C530 - ST75C540
XIII - VOCODER DATA EXCHANGE (continued)
XIII.4 - Receive(CODER)
Note that the VOCCORR are always computed,
whatever the value of CONF_ERCOR.
This function can be entered either by :
The format of the VOCSTA byte is as follows :
- TheCONFCODERCommand.This corresponds
to the “Normal Answering Machine” function.
- The MODC Command with MODC_COD = 1, in
the HANDSET Mode. This corresponds, in the
HANDSET mode to the “Conversation Record-
ing” function. This reduced sub-mode does not
allow ADPCM format and does not perform VAD
(Voice Activity Detector).
VOCSTAT
Format Field Pos. Value
Definition
Low Bit
Rate
VOC
_VAD
7
0
1
VAD Unvoiced Signal.
VAD Voice Signal.
VOC
_NUM
4..0 10100 (20 decimal) Number
of VOCDATA Bytes
ADPCM VOC
_VAD
7
0
1
VAD Unvoiced Signal.
VAD Voice Signal.
Once this function is selected, the ST75C530/540
starts to codethe voice signal, writes one frame of
compressed voice into the VOCDATA bytes (if the
low bit ratemode is selected, computesalways the
Corrector bytes and writes them in the VOCCORR
bytes)thenwrites theVOCSTAbyteandgenerates
the IT1 interrupt.
VOC
_NUM
4..0 10010 (18 decimal) Number
of VOCDATA Bytes
Note that in “Conversationrecording” the VOCSTA
byte is always $14.
The user must read the VOCDATA (and optionally
the VOCCORR) bytes and clear the VOCSTA byte
(writing $00).
The IT1 interrupt rate is as follows :
Number of Voice
Interrupt
If the user does not clear the VOCSTA byte within
the interrupt time, the ST75C530/540 will signal
this error by rising the ERR_VOCOin the SYSERR
byte and rising the IT0 Interrupt. In this case the
current frame is lost.
Samples
Mode
Time
(ms)
in the Buffer
(8kHz sampling)
ADPCM 32Kpbs
ADPCM 24Kpbs
ADPCM 16Kpbs
4.5
6
36
48
9
72
If the CONF_SUPSIL bit is 1 in the CONF CODER
command, the interrupts IT1 appears only when
the VAD has detected a voiced signal.
Low Bit Rate (with and
without error correction)
30
240
75/84
ST75C530 - ST75C540
XIV - TRANSPARENT MODE DATA EXCHANGE
The mode uses the DPR locations to exchange
samples between the hostand the AFE’s. To allow
maximum interrupt latency, the DSP uses internal
buffers to store samples and updates the DPR
buffers when internal buffers are ready. The DPR
buffersare bidirectional,thusdoublingthe effective
DPR capacity.
the full 0x10 .. 0x3F DPR locations are available.
The Modem sample buffer (MODEMDPR) uses
locations 0x10 to 0x27 (24 bytes) to exchange
12 MAFE samples. The audio sample buffer
(AUDIODPR) uses locations 0x28 to 0x3F to ex-
change 12 VAFE samples. Samples are repre-
sented in 16-bit linear data format, byte order is
little-Endian(Intel-like, LSByteat lowaddress),and
consecutive locations correspond to consecutive
samples in time. Example : locations (0x10, 0x11)
correspond to the first sample (LSB, MSB) re-
ceived from the line AFE.
The transfer mechanism is depicted below :
1. At baud rate (every 4 samples at 9.6kHz), the
DSP transfers 4 samples from the Modem AFE
to theinternal receive buffer,after sending them
througha high-passfilter witha transferfunction
H(z) = (z-1)/ (z-0.875) used to remove all DC
components from the signal, and transfers
4 samplesfromtheInternaltransmit bufferto the
Modem AFE. This comes from the currently
implemented internal scheduling. The same
operation is performed for the voice AFE.
2. After 3 bauds, the internal receive buffer is full
(the internal transmit buffer is also empty), the
DPR buffer is copied to the internal transmit
buffer, then the internal receive buffer is copied
into the DPR.
XIV.2 - Interrupts
The DSP signal events to the host using the inter-
rupt mailbox (ITREST[0..6], ITMASK, ITSRCR).
IT2 is set by the DSP whenever the DPR buffers
are ready. This interrupt source can be masked
through ITMASK, and acknowledged using
ITSRCR[0..6]. The host interrupt service routine
shouldread received samples from the DPR, write
transmitted samples to the DPR, then acknow-
ledgeby clearingthe IT2 flag. The interruptlatency
is approximately equal to the interrupt period, i.e.
T = 1/800 = 1.25ms. Overrun and underrun condi-
tions may occur if the host interrupt latency ex-
ceeds the previous value. Since this situation is
unrecoverable, no specific action is taken. Never-
theless, for debug purposes the user can detect
this conditionby probingthe interrupt line (SINTR),
and trigger on a pulsewidth greater than the maxi-
mum allowed latency.
3. A host interrupt is generated : during servicing,
the host reads the DPR sample buffer then
writes it with new transmitted samples.
XIV.1 - Samplebuffers
The mode uses the DPR locations to exchange
samplesbetweenthe hostand theAFE’s; since no
data transfer (HDLC, UART) occurs in this mode,
76/84
ST75C530 - ST75C540
XV - DEFAULT CALL PROGRESS TONE DETECTORS
Figure 44 : Call Progress Tone Detector Band 1
Figure 45 : Call Progress Tone Detector Band 2
dB
dB
0
0
no detection
detection
no detection
detection
-10
-8
step = 10Hz
reference level = 0dB
-20
-30
-40
-50
-16
step = 100Hz
reference level = 0dB
-24
-32
f (Hz)
1000
f (Hz)
2880 3600
-40
0
200
400
600
800
0
720
1440
2160
XVI - DEFAULT ANSWER TONE DETECTORS
Figure 46 : 2100HzAnswer Tone Detector
Figure 47 : 440Hz Tone Detector
dB
0
dB
0
step = 10Hz
reference level = 0dB
-10
-10
-20
no detection
detection
-20
-30
step = 10Hz
reference level = 0dB
-30
-40
-50
-40
no detection
f (Hz)
2200
f (Hz)
detection
-50
2000
2040
2080
2120
2160
200
320
440
560
680
800
77/84
ST75C530 - ST75C540
XVII - ELECTRICAL SCHEMATICS
Figure 48
G I O 1 1
G I O 1 2
S A 6
S A 5
S A 4
S A 3
S A 2
S A 1
S A 0
S D S
S R / W
G I O 1 3
G I O 1 4
G I O 1 5
G I O 1 6
G I O 1 7
C L K O U T
X P L L
D G N D 5
5 D D D V
X T A L L
E X T A L L
T E S T 0
R E S E T
S P K 3 N
S P K 3 P
S P K 2 N
S P K 2 P
D D 2 D V
D G N D 2
S D 7
S D 6
S D 5
S D 4
S D 3
S D 2
S D 1
S D 0
D V
D D A
D D 1
A V
78/84
ST75C530 - ST75C540
XVIII - PCB DESIGN GUIDELINES
Performances of the FAX modem depends on the
ST75C530/540 intrinsic performances and on the
proper PC board layout.
All aspects of the proper engineeringpractices, for
PC board design, are beyond the scope of this
paragraph.
of the band and connect to avoid small islands,
- both AGNDR and AGNDT must be connected
with very low impedance to a single point, (see
Chapter I.6, Power Supply),
- the four 2.2nF capacitors connected to the RxA
and MIC1, MIC2, MIC3 Pins must be as close as
possible to them,
We recommend the following points :
- thetwo100nFcapacitorsconnectedtotheVREFP and
VREFN pinsmust be as close as possible to them,
- analog and digital supplies must be connected
together,at a single point, as close as possibleto
the chip.
- in a 4-layer PC board : Separated digital ground
and analog ground, connected together at one
point, as close as possible to theST75C530/540,
- in a 2-layer PC board: Providea groundgrid in all
spacearoundandundercomponentsonbothsides
XIX - APPENDIX A : MODES OF OPERATION
Figure 49 : ToneMode (TONE)
TxA1
15
ATT_TX
4 TONES
GENERATOR
DAC
MUTE
HYBRID
14
Line
DTMF
DETECTOR
TxA2
RxA
11
16 TONE
DETECTORS
DG
ADC
DUAL
RAM
INTERFACE
4 TONE
DETECTORS
MUTE
[0..-30]dB
Step 3dB
1
2
ATT_LOC
DAC
V.21 FLAG
DETECTOR
SPK1
SPK3
ATT_SPK
76
77
78
79
MUTE
MUTE
RING
DETECTOR
SPK2
MIC2
MIC1
9
8
ADC
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
10 MIC3
Figure 50 : ToneMode with Caller ID (TONECID)
TxA1
ATT_TX
15
14
4 TONES
DAC
MUTE
GENERATOR
HYBRID
Line
DTMF
DETECTOR
TxA2
RxA
11
6 TONE
DETECTORS
DG
ADC
DUAL
RAM
INTERFACE
4 TONE
DETECTORS
MUTE
[0..-30]dB
Step 3dB
1
2
ATT_LOC
DAC
V.21 FLAG
DETECTOR
SPK1
SPK3
ATT_SPK
76
77
78
79
MUTE
MUTE
V.23
DEMODULATOR
UART
RING
DETECTOR
SPK2
MIC2
MIC1
9
8
ADC
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
10 MIC3
79/84
ST75C530 - ST75C540
XIX - APPENDIX A : MODES OF OPERATION (continued)
Figure 51 : Fax Modem Mode (MODEM)
TxA1
ATT_TX
15
14
HDLC
Tx
FAX
TRANSMITTER
DAC
MUTE
HYBRID
Line
TxA2
RxA
DUAL
RAM
INTERFACE
HANDSHAKE
AND STATUS
REPORT
SD[0..7]
11
DG
ADC
HDLC
Rx
FAX
RECEIVER
MUTE
[0..-30]dB
Step 3dB
1
2
SPK1
SPK3
4 TONE
DETECTORS
42
SINTR
76
77
78
79
DAC
MUTE
MUTE
V.21 FLAG
DETECTOR
ATT_LOC
DTMF
DETECTOR
(V.21ch2 only)
SPK2
MIC2
MIC1
9
8
ADC
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
10 MIC3
Figure 52 : Data Modem Mode (Full Duplex Modem) (ST75C540 only)
TxA1
ATT_TX
UART
HDLC
Tx
15
MODEM
TRANSMITTER
DAC
MUTE
HYBRID
14
Line
TxA2
RxA
DUAL
RAM
INTERFACE
HANDSHAKE
AND STATUS
REPORT
11
ECHO
CANCELLER
SD[0..7]
ADC
MUTE
[0..-30]dB
Step 3dB
UART
HDLC
Rx
1
2
MODEM
RECEIVER
SPK1
SPK3
42
SINTR
76
77
78
79
DAC
MUTE
MUTE
ATT_LOC
SPK2
MIC2
9
8
ADC
Programmable
Attenuation
Automatic
Gain
MIC1
MIC3
Addition
of Signals
DG
10
80/84
ST75C530 - ST75C540
XIX - APPENDIX A : MODES OF OPERATION (continued)
Figure 53 : DecoderMode (DECODER)
TxA1
15
ATT_TX
DAC
MUTE
DECODER
HYBRID
14
Line
TxA2
RxA
4 TONE
GENERATORS
LINE ECHO
CANCELLER
11
ADC
4 TONE
DETECTORS
DG
DUAL
RAM
INTERFACE
MUTE
[0..-30]dB
Step 3dB
ATT_LOC
DAC
1
2
DTMF
DETECTOR
SPK1
SPK3
RING
DETECTOR
76
77
78
79
MUTE
MUTE
SPK2
MIC2
MIC1
9
8
ADC
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
10 MIC3
Figure 54 : Coder Mode (CODER)
TxA1
15
4 TONE
GENERATORS
DAC
ADC
MUTE
HYBRID
14
Line
CODER
AGC
TxA2
RxA
ATT_SEL
11
VOICE
ACTIVITY
DETECTOR
DTMF
DETECTOR
DUAL
RAM
INTERFACE
MUTE
[0..-30]dB
Step 3dB
DG
1
2
SPK1
SPK3
4 TONE
DETECTORS
76
77
78
79
DAC
MUTE
MUTE
RING
DETECTOR
ATT_LOC
SPK2
MIC2
9
8
ADC
MIC1
MIC3
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
ATT_MIC
10
81/84
ST75C530 - ST75C540
XIX - APPENDIX A : MODES OF OPERATION (continued)
Figure 55 : Room Monitoring Mode (ROOM)
TxA1
15
14
DAC
MUTE
HYBRID
Line
ATT_TX
TxA2
RxA
LINE ECHO
CANCELLER
11
ADC
DTMF
DETECTOR
DUAL
RAM
DG
INTERFACE
MUTE
[0..-30]dB
Step 3dB
1
2
4 TONE
DETECTORS
SPK1
SPK3
76
77
78
79
DAC
MUTE
MUTE
Programmable
Attenuation
Addition
of Signals
Automatic
Gain
DG
SPK2
MIC2
MIC1
9
8
AGC
ADC
ATT_MIC
10 MIC3
Figure 56 : TelephoneMode (HANDSET)
4 TONE *
GENERATOR
TxA1
15
ATT_TX
DAC
MUTE
HYBRID
14
Line
TxA2
11
ADC
RxA
CODER
DUAL
RAM
MUTE
1
[0..-30]dB
Step 3dB
INTERFACE
2
AGC
AGC
SPK1
76
SPK3
77
DAC
MUTE
MUTE
78
4 TONE *
DG
79
SPK2
DETECTORS
9
MIC2
RING
DETECTOR
ADC
8
* default is 2.
MIC1
ATT_MIC
10 MIC3
82/84
ST75C530 - ST75C540
XIX - APPENDIX A : MODES OF OPERATION (continued)
Figure 57 : TransparentMode
ATT_MODTX
ATT_TX
4 TONE
GENERATORS
TxA1
15
DAC
MUTE
ATT_MODRX
HYBRID
Line
14
TxA2
RxA
11
(*)
DTMF
DETECTOR
DC-
BLOCK
DG
ADC
6 PRIMARY
TONE
DETECTORS
MUTE
[0..-30]dB
Step 3dB
1
2
ATT_SEL
SPK1
SPK3
4 SECONDARY
TONE
DETECTORS
76
77
78
79
ATT_LOC
MUTE
MUTE
DAC
SPK2
MIC2
MIC1
ATT_AUDTX
ATT_SPK
9
8
ATT_AUDRX
ATT_MIC
(*)
DC-
BLOCKA
ADC
10 MIC3
Programmable
Attenuation
Automatic
Gain
Addition
of Signals
DG
z - 1
H(z) =
(*)
z - 0.875
83/84
ST75C530 - ST75C540
XX - PACKAGE MECHANICAL DATA
80 PINS - FULL THIN PLASTIC QUAD FLAT PACK (TQFP)
A
A2
A1
e
80
61
0,10 mm
.004 inch
SEATING PLANE
60
1
20
41
21
40
D3
D1
D
0,25 mm
.010 inch
GAGE PLANE
K
Millimeters
Typ.
Inches
Typ.
Dimensions
Min.
Max.
1.60
0.15
1.45
0.38
0.20
Min.
Max.
0.063
0.006
0.057
0.014
0.008
A
A1
A2
B
0.05
1.35
0.22
0.09
0.002
0.053
0.010
0.004
1.40
0.32
0.055
0.012
C
D
16.00
14.00
12.35
0.65
0.630
0.551
0.486
0.026
0.630
0.551
0.486
0.024
0.039
D1
D3
e
E
16.00
14.00
12.35
0.60
E1
E3
L
0.45
0.75
0.020
0.030
L1
K
1.00
0o (Min.), 7o (Max.)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previouslysupplied. STMicroelectronics products are notauthorizedfor use as criticalcomp onentsin lifesupport devicesor systems
without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics - All Rights Reserved
Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
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84/84
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