STA7360 [STMICROELECTRONICS]
20W BRIDGE/STEREO AUDIO AMPLIFIER WITH CLIPPING DETECTOR; 20W BRIDGE /立体声音频剪报检测放大器
| 型号： | STA7360 |
| 厂家： | 
ST |
| 描述： | 20W BRIDGE/STEREO AUDIO AMPLIFIER WITH CLIPPING DETECTOR |
| 文件： | 总18页 (文件大小：483K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STA7360
20W BRIDGE/STEREO AUDIO AMPLIFIER
WITH CLIPPING DETECTOR
■ VERY FEW EXTERNAL COMPONENTS
■ NO BOUCHEROT CELLS
■ NO BOOSTRAP CAPACITORS
■ HIGH OUTPUT POWER
■ NO SWITCH ON/OFF NOISE
■ VERY LOW STAND-BY CURRENT
■ FIXED GAIN (20dB STEREO)
■ PROGRAMMABLE TURN-ON DELAY
■ CLIPPING DETECTOR
MULTIWATT11V
ORDERING NUMBER: STA7360
■ ST-BY FUNCTION
Power Amplifier in the Multiwatt® package.Thanks to
the fully complementary PNP/NPN output configura-
tion the high power performance of the STA7360 is
obtained without bootstrap capacitors.
Protections:
■ OUTPUT AC-DC SHORT CIRCUIT TO
GROUND AND TO SUPPLY VOLTAGE
A delayed turn-on mute circuit eliminates audible on/
off noise, and a novel short circuit protection system
prevents spurious intervention with highly inductive
loads.
■ VERY INDUCTIVE LOADS
■ LOUDSPEAKER PROTECTION
■ OVERRATING CHIP TEMPERATURE
■ ESD PROTECTION
The device provides a circuit for the detection of clip-
ping in the output stages. The output, an open collec-
tor is able to drive systems with automatic volume
control.
DESCRIPTION
The STA7360 is a new technology class AB Audio
APPLICATION CIRCUIT
20K
+VS
220µF
C5
100nF
C6
C4
1µF
STAND-BY
22µF C3
11
9
OUT2
8
7
SVR
0.22µF C2
RL
5
1
OUT1
10
IN2(+)
0.22µF C1
4
OUT BRIDGE
6
IN
2
3
IN1(+)
S-GND
P-GND
CLIP DET
D00AU1213
September 2003
1/18
STA7360
PIN CONNECTION (Top view)
11
10
9
STAND-BY
OUT1
+VS
8
OUT2
7
SVR
6
P-GND
IN2(+)
5
4
OUT BRIDGE
S-GND
CLIP DET
IN1(+)
3
2
1
TAB CONNECTED TO PIN 6
D98AU938A
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
S
Operating Supply Voltage
20
I
I
Output Peak Current (non rep. for t = 100µs)
5
A
o
Output Peak Current (rep. freq. > 10Hz)
4
36
A
o
P
Power Dissipation at T
= 85°C
W
°C
tot
case
T
,T
Storage and Junction Temperature
-40 to 150
stg
J
THERMAL DATA
Symbol
Parameter
Value
Unit
R
Thermal Resistance Junction-case Max
1.8
°C/W
th j-case
2/18
STA7360
ELECTRICAL CHARACTERISTCS (Refer to the test circuits, T
= 25°C, V = 14.4V, f = 1KHz unless oth-
S
amb
erwise specified)
Symbol
Parameter
Supply Voltage Range
Total Quiescent Drain Current
Stand-by attenuation
Test Condition
Min.
Typ.
Max.
18
Unit
V
V
S
8
I
stereo configuration
65
80
120
mA
dB
µA
d
A
60
SB
SB
I
Stand-by Current
100
I
Clip Detector Prog. Current
pin 2 pull up to 5V d = 1%
with 10KW d = 5%
70
130
µA
µA
CO
STEREO
P
Output Power (each channel)
THD = 10%
R = 2Ω
11
8
4.5
W
W
W
W
O
L
7
R = 3.2Ω
L
R = 4Ω,12V
L
6.5
R = 4Ω
L
d
Distortion
P = 0.1 to 2.5W; R = 4Ω
0.05
0.05
0.5
0.5
%
%
o
L
Po = 0.1 to 4W; R = 3.2Ω
L
SVR
CT
Supply Voltage Rejection
Crosstalk
R = 10KΩ C3 = 22µF
f = 100Hz C3 = 100µF
45
45
dB
dB
g
62
f = 1KHz
f = 10KHz
dB
dB
55
50
20
R
I
Input Resistance
Voltage Gain
KΩ
dB
dB
G
G
19
21
1
V
Voltage Gain Match
Input Noise Voltage
V
E
IN
22 Hz to 22KHz R = 50Ω
2.5
3
3.5
5
7
µV
µV
µV
g
R = 10KΩ
g
Rg =
BRIDGE
V
Output Offset Voltage
250
0.5
mV
os
P
Output Power THD = 10%
R = 4Ω,12V
R = 4Ω; 14.4V
L
15
20
W
W
o
L
16
45
d
Distortion
P = 0.1 to 7W; R = 4Ω
o
0.05
%
L
SVR
Supply Voltage Rejection
Rg = 10KΩ; C3 = 22µF
f = 100Hz; C3 = 100µF
dB
dB
62
50
26
R
Input Resistance
Voltage Gain
KΩ
I
G
dB
V
EIN
Input Noise Voltage
22Hz to 22KHz R = 50Ω
3.5
4
µV
µV
g
R = 10KΩ
g
3/18
STA7360
Figure 1. STEREO Test and Application Circuit
20K
+VS
220µF
C5
100nF
C6
C4
1µF
STAND-BY
100µF C3
1000µF C7
11
9
OUT2
OUT
7
8
4
SVR
RL
RL
0.22µF C2
BRIDGE
5
IN2(+)
1000µF C8
0.22µF C1
10
IN
1
OUT1
2
3
6
IN1(+)
S-GND
P-GND
CLIP DET
D00AU1214
Figure 2. P.C. Board and Component Layout (STEREO) of the circuit of fig. 1 (1:1 scale)
4/18
STA7360
Figure 3. BRIDGE Test and Appication Circuit
20K
+VS
220µF
C5
100nF
C6
C4
1µF
STAND-BY
22µF C3
11
9
OUT2
OUT1
7
8
SVR
0.22µF C2
RL
5
1
IN2(+)
0.22µF C1
10
4
IN
OUT BRIDGE
D00AU1213
2
3
6
IN1(+)
S-GND
P-GND
CLIP DET
Figure 4. Board and Layout (BRIDGE) of the circuit of fig. 3 (1:1 scale)
5/18
STA7360
Figure 5. Output Power vs. Supply Voltage
(Stereo)
Figure 8. Output Power vs. Supply Voltage
(Bridge)
Figure 6. Output Power vs. Supply Voltage
(Stereo)
Figure 9. Drain Current vs Supply Voltage
(Stereo)
Figure 7. Output Power vs. Supply Voltage
(Stereo)
Figure 10. Distortion vs Output Power (Stereo)
6/18
STA7360
Figure 11. Distortion vs Output Power (Stereo)
Figure 12. Distortion vs Output Power (Stereo)
Figure 13. Distortion vs Output Power (Bridge)
Figure 14. SVR vs. Frequency & C3 (Stereo)
Figure 15. SVR vs. Frequency & C3 (Bridge)
Figure 16. Crosstalk vs. Frequency (Stereo)
7/18
STA7360
Figure 17. Power Dissipation& Efficiency vs.
Output Power(Stereo)
BLOCK DESCRIPTION
PolarizationThe device is organized with the gain re-
sistors directly connected to the signal ground pin i.e.
without gain capacitors (fig. 20).
The non inverting inputs of the amplifiers are con-
nected to the SVR pin by means of resistor dividers,
equal to the feedback networks. This allows the out-
puts to track the SVR pin which is sufficiently slow to
avoid audible turn-on and turn-off transients.
SVR
The voltage ripple on the outputs is equal to the one
on SVR pin: with appropriate selection of CSVR,
more than 60dB of ripple rejection can be obtained.
Delayed Turn-on (muting)
The CSVR sets a signal turn-on delay too. A circuit is
included which mutes the device until the voltage on
SVR pin reaches ~2.5V typ. (fig. 22). The mute func-
tion is obtained by duplicating the input differential
pair (fig. 21): it can be switched to the signal source
or to an internal mute input. This feature is necessary
to prevent transients at the inputs reaching the loud-
speaker(s) immediately after power-on).
Figure 18. Power Dissipation& Efficiency vs.
Output Power (Stereo)
Fig. 22 represents the detailed turn-on transient with
reference to the stereo configuration.At the power-on
the output decoupling capacitors are charged
through an internal path but the device itself remains
switched off (phase 1 of the represented diagram).
When the outputs reach the voltage level of about 1V
(this means that there is no presence of short circuits)
the device switches on, the SVR capacitor starts
charging itself and the output tracks exactly the SVR
pin.During this phase the device is muted until the
SVR reaches the "Play" threshold (~2.5V typ.), after
that the music signal starts being played.
Stereo/Bridge Switching
Figure 19. Power Dissipation& Efficiency vs.
Output Power (Bridge)
There is also no need for external components for
changing from stereo to bridge configuration (figg. 20,
22). A simple short circuit between two pins allows
phase reversal at one output, yet maintaining the quies-
cent output voltage
.
Stand-by
The device is also equipped with a stand-by function,
so that a low current, and hence low cost switch, can
be used for turn on/off.
Stability
The device is provided with an internal compensation
wich allows to reach low values of closed loop gain.In
this way better performances on S/N ratio and SVR
can be obtained.
8/18
STA7360
RECOMMENDED VALUES OF THE EXTERNAL COMPONENTS (ref to the Stereo Test and Application Circuit)
Recommended
Value
Larger than the Recomm.
Value
Comp.
Smaller than the Recomm. Value
Purpose
C1
–
–
0.22
µ
F
Input
Decoupling
(CH1)
C2
C3
–
–
0.22
µ
F
Input
Decoupling
(CH2)
100µF
1µF
Longer Turn-On Delay Time
- Worse Supply Voltage Rejection.
- Shorter Turn-On Delay Time
- Danger of Noise (POP
Supply Voltage
Rejection
Filtering
Capacitor
C4
Stand-By
Delayed Turn-Off by Stand- Danger of Noise (POP)
ON/OFF Delay By Switch
C5
C6
C7
220
100
µ
F (min)
Supply By-Pass
Danger of Oscillations
Danger of Oscillations
n
F (min)
Supply By-Pass
2200
µ
µ
F
F
Output
Decoupling
CH2
- Decrease of Low
Frequency Cut Off
- Longer Turn On Delay
-
Increase of Low Frequency Cut Off
- Shorter Turn On Delay
C8
2200
Output
- Decrease of Low
- Increase of Low Frequency Cut Off
Decoupling
CH1
Frequency Cut Off
- Longer Turn On Delay
- Shorter Turn On Delay
Figure 20. Block Diagram; Stereo Configuration
INPUT 1
1µF
20K
ST-BY
VCC
+
-
OUT1
SVR
L
CLIPPING
DETECTOR
CLIP
DETECT
OUT BRIDGE
-
OUT2
R
+
GND
PWGND
D00AU1215
INPUT 2
9/18
STA7360
Figure 21. Mute Function Diagram
Figure 22. Turn-on Delay Circuit
10/18
STA7360
Figure 23. Block Diagram; Bridge Configuration
INPUT 1
1µF
20K
ST-BY
VCC
+
-
OUT1
SVR
CLIPPING
DETECTOR
CLIP
DETECT
OUT BRIDGE
OUT2
-
+
GND
PWGND
D00AU1216
INPUT 2
Figure 24. Dual Channel Distortion Detector
IN1
OUT1
CLIP DET
DISTORTION
DETECTOR
IN2
OUT2
D98AU959
11/18
STA7360
Figure 25. ICV - PNP Gain vs. I
OUTPUT STAGE
C
Poor current capability and low cutoff frequency are
well known limits of the standard lateral PNP. Com-
posite PNP-NPN power output stages have been
widely used, regardless their high saturation drop.
This drop can be overcome only at the expense of ex-
ternal components, namely, the bootstrap capacitors.
The availability of 4A isolated collector PNP (ICV
PNP) adds versatility to the design. The performance
of this component, in terms of gain, VCEsat and cut-
off frequency, is shown in fig. 25, 26, 27 respectively.
It is realized in a new bipolar technology, character-
ized by top-bottom isolation techniques, allowing the
implementation of low leakage diodes, too. It guaran-
tees BVCEO >20V and BVCBO >50V both for NPN
and PNP transistors. Basically, the connection
shown in fig. 13 has been chosen. First of all because
its voltage swing is rail-to-rail, limited only by the VC-
Esat of the output transistors, which are in the range
of 0.3W each. Then, the gain VOUT/VIN is greater
than unity, approximately 1+R2/R1. (VCC/2 is fixed
by an auxiliary amplifier common to both channel). It
is possible, controlling the amount of this local feed-
back, to force the loop gain (A * b) to less than unity
at frequencies for which the phase shift is 180°. This
means that the output buffer is intrinsically stable and
not prone to oscillation.
Figure 26. ICV - PNP VCE(sat) vs. I
C
Figure 28. The New Output Stage
Figure 27. ICV - PNP cut-off frequency vs. I
C
In contrast, with the circuit of fig. 29, the solution
adopted to reduce the gain at high frequencies is the
use of an external RC network.
AMPLIFIER BLOCK DIAGRAM
The block diagram of each voltage amplifier is shown
in fig. 30. Regardless of production spread, the cur-
rent in each final stage is kept low, with enough mar-
gin on the minimum, below which cross-over
distortion would appear.
12/18
STA7360
Figure 29. A Classical Output Stage
Figure 30. Amplifier Block Diagram
BUILT-IN PROTECTION SYSTEMS
given limit.
Short Circuit ProtectionThe maximum current the de-
vice can deliver can be calculated by considering the
voltage that may be present at the terminals of a car
radio amplifier and the minimum load impedance.
The signal sets a flip-flop which forces the amplifier
outputs into a high impedance state.
In case of DC short circuit when the short circuit is re-
moved the flip-flop is reset and restarts the circuit (fig.
36). In case of AC short circuit or load shorted in
Bridge configuration, the device is continuously
switched in ON/OFF conditions and the current is lim-
ited.
Apart from consideration concerning the area of the
power transistors it is not difficult to achieve peak cur-
rents of this magnitude (5A peak).However, it be-
comes more complicated if AC and DC short circuit
protection is also required.In particular, with a protec-
tion circuit which limits the output current following
the SOA curve of the output transistors it is possible
that in some conditions (highly reactive loads, for ex-
ample) the protection circuit may intervene during
normal operation. For this reason each amplifier has
been equipped with a protection circuit that inter-
venes when the output current exceeds 4A
Figure 31. Circuitry for Short Circuit Detection
Fig 16 shows the protection circuit for an NPN power
transistor (a symmetrical circuit applies to PNP). The
VBE of the power is monitored and gives out a sig-
nal,available through a cascode.
This cascode is used to avoid the intervention of the
short circuit protection when the saturation is below a
13/18
STA7360
Polarity Inversion
short circuit occurs both the outputs are switched
OFF so limiting dangerous DC current flowing
through the loudspeaker.
High current (up to 10A) can be handled by the de-
vice with no damage for a longer period than the
blow-out time of a quick 2A fuse (normally connected
in series with the supply). This features is added to
avoid destruction, if during fitting to the car, a mistake
on the connection of the supply is made.
Figure 33. Restart Circuit
DC Voltage
The maximum operating DC voltage for the STA7360
is 18V.
APPLICATION HINTS
This section explains briefly how to get the best from
the STA7360 and presents some application circuits
with suggestions for the value of the components.
These values can change depending on the charac-
teristics that the designer of the car radio wants to ob-
tain,or other parts of the car radio that are connected
to the audio block.
Thermal Shut-down
The presence of a thermal limiting circuit offers the
following advantages:
1) an overload on the output (even if it is perma-
nent), or an excessive ambient temperature can
be easily withstood.
To optimize the performance of the audio part it is
useful (or indispensable) to analyze also the parts
outside this block that can have an interconnection
with the amplifier.
2
)the heatsink can have a smaller factor of safety
compared with that of a conventional circuit.
There is no device damage in the case of exces-
sive junction temperature: all happens is that Po
(and therefore Ptot) and Id are reduced.
This method can provide components and system
cost saving.
The maximum allowable power dissipation depends
upon the size of the external heatsink (i.e. its thermal
resistance); Fig. 32 shows the dissipable power as a
function of ambient temperature for different thermal
resistance.
Reducing Turn On-Off Pop
The STA7360 has been designed in a way that the
turn on(off) transients are controlled through the
charge(discharge) of the Csvr capacitor.
Figure 32. Maximum Allowable Power
Dissipation vs. Ambient Temperature
As a result of it, the turn on(off) transient spectrum
contents is limited only to the subsonic range. The
following section gives some brief notes to get the
best from this design feature(it will refer mainly to the
stereo application which appears to be in most cases
the more critical from the pop viewpoint. The bridge
connection in fact,due to the common mode wave-
form at the outputs, does not give pop effect).
TURN-ON
Fig 34 shows the output waveform (before and after
the "A" weighting filter) compared to the value of Cs-
vr.
Better pop-on performance is obtained with higher
Csvr values (the recommended range is from 22uF to
220uF).
The turn-on delay (during which the amplifier is in
mute condition) is a function essentially of : Cout ,
Csvr .
Loudspeaker Protection
The STA7360 guarantees safe operations even for
the loudspeaker in case of accidental shortcir-
Being:
cuit.Whenever a single OUT to GND, OUT to V
S
14/18
STA7360
T1
T2
≈
≈
120 · C
Figure 34.
out
1200 · C
svr
The turn-on delay is given by:
T1+T2 STEREO
T2 BRIDGE
The best performance is obtained by driving the st-by
pin with a ramp having a slope slower than 2V/ms
TURN-OFF
A turn-off pop can occur if the st-by pin goes low with
a short time constant.This pop is due to the fast
switch-off of the internal current generator of the am-
plifier.If the voltage present across the load becomes
rapidly zero (due to the fast switch off) a small pop
occurs, depending also on Cout,Rload.
b) C = 47 µF
svr
The parameters that set the switch off time constant
of the st-by pin are:
■ the st-by capacitor (C4)
■ the SVR capacitor (Csvr)
■ resistors connected from st-by pin to the logical
input (Rext)
BALANCED INPUT IN BRIDGE CONFIGURATION
A helpful characteristic of the STA7360 is that,in
bridge configuration, a signal present on both the in-
put capacitors is amplified by the same amount and
it is present in phase at the outputs,so this signal
does not produce effects on the load.The typical val-
ue of CMRR is 46dB.
c) C = 100 µF
svr
Looking at fig 35, we can see that a noise signal from
the ground of the power amplifier to the ground of the
hypothetical preamplifier is amplified of a factor equal
to the gain of the amplifier (2 * Gv).
Using a configuration of fig. 36 the same ground
noise is present at the output multiplied by the factor
2 * Gv/200.
This means less distortion,less noise (e.g. motor cas-
sette noise) and/or a simplification of the layout of PC
board.
The only limitation of this balanced input is the maxi-
mum amplitude of common mode signals (few tens of
millivolt) to avoid a loss of output power due to the
common mode signal on the output, but in a large
number of cases this signal is within this range.
(*) These parameters must be validated after final silicon character-
ization.
15/18
STA7360
Figure 35.
Figure 36.
16/18
STA7360
mm
inch
DIM.
OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX.
MECHANICAL DATA
A
B
5
0.197
0.104
0.063
2.65
1.6
C
D
1
0.039
E
0.49
0.88
1.45
16.75
19.6
0.55 0.019
0.95 0.035
0.022
0.037
F
G
1.7
17
1.95 0.057 0.067 0.077
17.25 0.659 0.669 0.679
0.772
G1
H1
H2
L
20.2
0.795
21.9
21.7
17.4
22.2
22.1
22.5 0.862 0.874 0.886
22.5 0.854 0.87 0.886
L1
L2
L3
L4
L7
M
18.1 0.685
0.713
17.25 17.5 17.75 0.679 0.689 0.699
10.3
2.65
4.25
4.73
1.9
10.7
10.9 0.406 0.421 0.429
2.9 0.104 0.114
4.55
5.08
4.85 0.167 0.179 0.191
5.43 0.186 0.200 0.214
M1
S
2.6
2.6
0.075
0.075
0.102
0.102
0.152
S1
Dia1
1.9
Multiwatt11 V
3.65
3.85 0.144
17/18
STA7360
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
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18/18
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