STCN75M2E [STMICROELECTRONICS]
Digital temperature sensor and thermal watchdog; 数字温度传感器和热看门狗
| 型号： | STCN75M2E |
| 厂家： | 
ST |
| 描述： | Digital temperature sensor and thermal watchdog |
| 文件： | 总35页 (文件大小：292K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STCN75
Digital temperature sensor and thermal watchdog
Features
■ Measures temperatures from –55°C to +125°C
(–67°F to +257°F)
–
2°C accuracy from –25°C to
+100°C (max)
■ Low operating current:125µA (typ)
■ No external components required
2
■ 2-Wire I C/SMBus-compatible serial interface
– Selectable bus address allows connection
of up to eight devices on the bus
SO8 (M)
■ Wide power supply range-operating voltage
range: 2.7V to 5.5V
■ Conversion time is 45ms (typ)
■ Programmable temperature threshold and
hysteresis set points
■ Pin- and software-compatible with TCN75
(Drop-in replacement)
■ Power-up defaults permit standalone operation
as a thermostat
■ Shutdown mode to minimize power
consumption
MSOP8
(TSSOP8) (DS)
■ Output pin (open drain) can be configured for
interrupt or comparator/thermostat mode (Dual
Purpose Event Pin)
■ Packages:
– SO8
(a)
– MSOP8 (TSSOP8)
a. Contact local ST sales office for availability
June 2007
Rev 5
1/35
www.st.com
1
Contents
STCN75
Contents
1
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
1.2
1.3
Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
V
DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Temperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Over-limit temperature register (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
OS
Hysteresis temperature register (T
) . . . . . . . . . . . . . . . . . . . . . . . . . 18
HYS
3.2
3.3
3.4
Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4.1
3.4.2
3.4.3
Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/35
STCN75
Contents
3.4.4
3.4.5
Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.5
3.6
READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4
5
6
7
8
9
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3/35
List of tables
STCN75
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
T
and T
register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
OS
HYS
STCN75 serial bus slave addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO8 – 8-pin, plastic small outline, package mechanical data. . . . . . . . . . . . . . . . . . . . . . . 31
MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3x3) mech. data . . . . . . . . . . . . . 32
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4/35
STCN75
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connections (SO8 and TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Typical 2-byte READ from preset pointer location (e.g. Temp - T , T
). . . . . . . . . . . . 22
OS HYS
Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 22
Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer . . . . . . . . . . . . . . . 22
Figure 11. Typical pointer set followed by an immediate READ from the configuration register . . . . . 23
Figure 12. Configuration register WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 13.
T
and T
WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
OS
HYS
Figure 14. Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 15. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 16. SO8 – 8-pin, plastic small package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 17. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3x3) outline. . . . . . . . . . . . . . . . . 32
5/35
Summary description
STCN75
1
Summary description
The STCN75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta
2
temperature-to-digital converter and an I C-compatible serial digital interface (see Figure 1
on page 7). It is targeted for general applications such as personal computers, system
thermal management, electronics equipment, and industrial controllers, and is packaged in
the industry standard 8-lead TSSOP and SO8N packages.
The device contains a band gap temperature sensor and 9-bit ADC which monitor and
digitize the temperature to a resolution up to 0.5°C. The STCN75 is typically accurate to
( 3°C - max) over the full temperature measurement range of –55°C to 125°C with 2°C
accuracy in the –25°C to +100°C range. The STCN75 is pin-for-pin and software compatible
with the TCN75.
STCN75 is specified for operating at supply voltages from 2.7V to 5.5V. Operating at 3.3V,
the supply current is typically (125µA).
The on-board sigma-delta analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in degrees Centigrade; for Fahrenheit
applications a lookup table or conversion routine is required.
The STCN75 is factory-calibrated and requires no external components to measure
temperature.
1.1
Serial communications
2
The STCN75 has a simple 2-wire I C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
In addition, the serial interface gives the user easy access to all STCN75 registers to
customize operation of the device.
6/35
STCN75
Summary description
1.2
Temperature sensor output
The STCN75 Temperature Sensor has a dedicated open drain Over-Limit Signal/Interrupt
(OS/INT) output which features a thermal alarm function. This function provides a user-
programmable trip and turn-off temperature. It can operate in either of two selectable
modes:
●
Section 2.3: Comparator mode
●
Section 2.4: Interrupt mode.
At power-up the STCN75 immediately begins measuring the temperature and converting
the temperature to a digital value.
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (T ) READ/WRITE register), and the hysteresis temperature (which is stored in
OS
the 16-bit (T
) READ/WRITE register). If the measured value exceeds these limits, the
HYS
OS/INT pin is activated (see Figure 3 on page 8).
Note:
See Pin descriptions on page 8 for details.
Figure 1.
Logic diagram
V
DD
(1)
(1)
OS/INT
SDA
SCL
STCN75
A
A
A
0
1
2
GND
AI11899
1. SDA and OS/INT are open drain.
Table 1.
Pin
Signal names
Sym
Type/direction
Description
1
2
3
4
5
6
7
8
SDA(1)
Input/ Output
Input
Serial data input/output
Serial clock input
SCL
OS/INT(1)
GND
A2
Output
Over-limit signal/interrupt alert output
Ground
Supply Ground
Input
Address2 Input
A1
Input
Address1 Input
A0
Input
Address0 Input
VDD
Supply power
Supply voltage (2.7V to 5.5V)
1. SDA and OS/INT are open drain.
7/35
Summary description
Figure 2.
STCN75
Connections (SO8 and TSSOP8)
(1)
SDA
1
2
3
4
8
7
6
5
V
A
A
A
DD
0
SCL
(1)
OS/INT
1
GND
2
AI11841
1. SDA and OS/INT are open drain.
Figure 3.
Functional block diagram
Configuration Register
Temperature Register
Pointer Register
Temperature
Sensor and
Analog-to-Digital
Converter (ADC)
S-D
THYS Set Point Register
TOS Set Point Register
V
DD
Control and Logic
Comparator
OS/INT
SDA
A
0
2
A
1
2-wire I C Interface
A
2
SCL
GND
AI11833a
1.3
Pin descriptions
See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals connected
to this device.
1.3.1
1.3.2
1.3.3
SDA (open drain)
This is the Serial Data Input/Output pin for the 2-wire serial communication port.
SCL
This is the Serial Clock Input pin for the 2-wire serial communication port.
OS/INT (open drain)
This is the Over-Limit Signal/Interrupt Alert Output pin. It is open drain, so it needs a pull-up
resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds
the programmed threshold (T ). It behaves as a thermostat, toggling to indicate whether
OS
the measured temperature is above or below the threshold and hysteresis (T
).
HYS
8/35
STCN75
Summary description
1.3.4
GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5
1.3.6
A2, A1, A0
2
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I C interface address.
They can be set to V or GND to provide 8 unique address selections.
DD
V
DD
This is the supply voltage pin, and ranges from +2.7V to +5.5V.
9/35
Operation
STCN75
2
Operation
After each temperature measurement and analog-to-digital conversion, the STCN75 stores
the temperature as a 16-bit two’s complement number (see Table 5: Register pointers
selection summary on page 16) in the 2-byte Temperature register (see Table 7 on
page 17). The most significant bit (S) indicates if the temperature is positive or negative:
●
for positive numbers S = 0, and
for negative numbers S = 1.
●
The most recently converted digital measurement can be read from the Temperature
register at any time. Since temperature conversions are performed in the background,
reading the Temperature register does not affect the operation in progress.
The temperature data is provided by the 9 MSBs (Bits 15 through 7). Bits 6 through 0 are
unused. Table 3 on page 14 gives examples of the digital output data and corresponding
temperatures. The data is compared to the values in the T and T
registers, and then
OS
HYS
the OS/INT is updated based on the result of the comparison and the operating mode.
The alarm fault tolerance is controlled by the FT1 and FT0 Bits in the Configuration register.
They are used to set up a fault queue. This prevents false tripping of the OS/INT pin when
the STCN75 is used in a noisy environment (see Table 2 on page 13).
The active state of the OS/INT output can be changed via the Polarity Bit (POL) in the
Configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STCN75, the
OS/INToutput should be left floating.
Note:
If the thermostat is not used, the T and T
registers can be used for general storage of
HYS
OS
system data.
10/35
STCN75
Operation
2.1
Applications information
STCN75 digital Temperature Sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pull-
up resistors on SCL, SDA, and OS/INT outputs. A 0.1µF bypass capacitor on V is
DD
recommended. The sensing device of STCN75 is the chip itself. The typical interface
connection for this type of digital sensor is shown in Figure 4 on page 11.
Intended Applications include:
●
●
●
●
●
●
●
●
System thermal management
Computers/disk drivers
Electronics/test equipment
Power supply modules
Consumer products
Battery management
FAX/printers management
Automotive
Figure 4.
Typical 2-wire interface connections diagram
Pull-up
Pull-up
V
DD
V
V
DD
DD
V
DD
10kΩ
10kΩ
10kΩ
0.1μF
STCN75
(1)
O.S./INT
SCL
(1)
Master
Device
A
SDA
0
2
A
A
1
2
I C Address = 1001000 (1001A A A )
2 1 0
GND
AI12200
1. SDA and OS/INT are open drain.
2.2
Thermal alarm function
The STCN75 thermal alarm function provides user-programmable thermostat capability and
allows the STCN75 to function as a standalone thermostat without using the serial interface.
The OS/INT output is the alarm output. This signal is an open drain output, and at power-up,
this pin is configured with active-low polarity by default.
11/35
Operation
STCN75
2.3
Comparator mode
In Comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new
digital temperature is compared to the value stored in the T and T registers. If a fault
OS
HYS
tolerance number of consecutive temperature measurements are greater than the value
stored in the T register, the OS/INT output will be asserted.
OS
For example, if the FT1 and FT0 Bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed T to activate the OS/INT output. Once the
OS
OS/INT output is active, it will remain active until the first time the measured temperature
drops below the temperature stored in the T
inactive state.
register, whereupon it will reset to its
HYS
Putting the device into Shutdown mode does not clear OS/INT in Comparator mode.
2.4
Interrupt mode
In Interrupt mode, the OS/INT output becomes active when the measured temperature
exceeds the T value a consecutive number of times as determined by the Fault Tolerance
OS
bits (FT1, FT0) value in the Configuration register. Once activated, the OS/INT can only be
cleared by reading from any register (temperature, configuration, T , or T
) on the
OS
HYS
device. Once the OS/INT has been deactivated, it will only be reactivated when the
measured temperature falls below the T value a consecutive number of times equal to
HYS
the FT value. This mode is better suited for interrupt driven microprocessor based systems.
12/35
STCN75
Operation
2.5
Fault tolerance
For both Comparator and Interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS/INT output will be activated. Fault tolerance refers to the number
of consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the Configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At power-up,
these bits both default to logic '0'.
Table 2.
FT1
Fault tolerance setting
FT0
STCN75 (consecutive faults)
Comments
Power-up default
0
0
1
1
0
1
0
1
1
2
4
6
2.6
Shutdown mode
For power-sensitive applications, the STCN75 offers a low-power Shutdown mode. The SD
Bit in the Configuration register controls Shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the Temperature
register, after which the STCN75 will go into a low-power standby state. The OS/INT output
will be cleared if the thermostat is operating in Interrupt mode and the OS/INT will remain
unchanged in Comparator mode. The 2-wire interface remains operational in Shutdown
mode, and writing a '0' to the SD Bit returns the STCN75 to normal operation.
13/35
Operation
STCN75
2.7
Temperature data format
Table 3 shows the relationship between the output digital data and the external
temperature. Temperature data for the Temperature, T , and T
registers is
OS
HYS
represented as a 9-bit, two’s complement word.
The left-most bit in the output data stream contains temperature polarity information for each
conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the
temperature is negative.
Table 3.
Relationship between temperature and digital output
Digital output
Temperature
Binary
HEX
+125°C
+25°C
+0.5°C
0°C
0 1111 1010
0 0011 0010
0 0000 0001
0 0000 0000
1 1111 1111
1 1100 1110
1 1011 0000
1 1001 0010
0FAh
032h
001h
000h
1FFh
1CEh
1B0h
192h
–0.5°C
–25°C
–40°C
–55°C
14/35
STCN75
Functional description
3
Functional description
The STCN75 registers have unique pointer designations which are defined in Table 5 on
page 16. Whenever any READ/WRITE operation to the STCN75 register is desired, the
user must “point” to the device register to be accessed.
All of these user-accessible registers can be accessed via the digital serial interface at
anytime (seeSection 3.3: Serial interface on page 19), and they include:
●
●
●
●
●
Command register/Address Pointer register
Configuration register
Temperature register
Over-Limit Signal Temperature register (T
)
OS
Hysteresis Temperature register (T
)
HYS
3.1
Registers and register set formats
3.1.1
Command/pointer register
The Most Significant Bits (MSBs) of the Command register must always be zero. Writing a
'1' into any of these bits will cause the current operation to be terminated (Bit 2 through Bit 7
must be kept '0', see Table 4).
Table 4.
MSB
Command/pointer register format
LSB
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0
0
0
0
0
0
P1
P0
Pointer/register
select bits
These bits must be ‘O’
The Command register retains pointer information between operations (see Table 5).
Therefore, this register only needs to be updated once for consecutive READ operations
from the same register. All bits in the Command register default to '0' at power-up.
15/35
Functional description
Table 5.
STCN75
Register pointers selection summary
Pointer
value (H)
Width Type Power-on
P1 P0 Name Description
Comments
(bits) (R/W)
default
Temperature
register
Read-
only
To store measured
temperature data
00
01
02
0
0
1
0
1
0
TEMP
16
N/A
CON Configuration
8
R/W
R/W
00
F
register
Hysteresis
register
THYS
16
4B00
Default = 75°C
Set point for over-
temperature shutdown
(TOS) limit default =
80°C
Over-
TOS temperature
shutdown
03
1
1
16
R/W
5000
3.1.2
Configuration register
The Configuration register is used to store the device settings such as Device Operation
mode, OS/INT Operation mode, OS/INT Polarity, and OS/INT Fault Queue.
The Configuration register allows the user to program various options such as thermostat
fault tolerance, thermostat polarity, Thermostat Operating mode, and Shutdown mode. The
user has READ/WRITE access to all of the bits in the Configuration register except the MSB
(Bit7), which is reserved as a “Read only” bit (see Table 6). The entire register is volatile and
thus powers-up in its default state only.
Table 6.
Byte
Configuration register format
MSB
LSB
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
STCN75
Default
0
0
0
0
0
0
FT1
0
FT0
0
POL
0
M
0
SD
0
Keys: SD = shutdown control bit
M = thermostat mode(1)
FT1 = fault tolerance1 bit
Bit 5 = must be set to '0'.
Bit 6 = must be set to '0'.
Bit 7 = must be set to '0'.
POL = output polarity(2)
FT0 = Fault tolerance0 bit
1. Indicates Operation mode; 0 = comparator mode, and 1 = Interrupt mode (see Section 2.3: Comparator
mode and Section 2.4: Interrupt mode).
2. The OS is active-low ('0').
16/35
STCN75
Functional description
3.1.3
Temperature register
The Temperature register is a two-byte (16-bit) “Read only” register (see Table 7). Digital
temperatures from the T-to-D converter are stored in the Temperature register in two’s
complement format, and the contents of this register are updated each time the T-to-D
conversion is finished.
The user can read data from the Temperature register at any time. When a T-to-D
conversion is completed, the new data is loaded into a comparator buffer to evaluate fault
conditions, and will update the Temperature register if a read cycle is not ongoing. The
STCN75 is continuously evaluating fault conditions regardless of READ or WRITE activity
on the bus. If a READ is ongoing, the previous temperature will be read. The readable
temperature will be updated upon the completion of the next T-to-D conversion that is not
masked by a read cycle.
All unused bits following the digital temperature will be zero. The MSB position of the
Temperature register always contains the sign bit for the digital temperature, and Bit 14
contains the temperature MSB. All bits in the Temperature register default to zero at power-
up.
(1)
Table 7.
Bytes
Temperature register format
HS byte
LS byte
TLSB
MSB
TMSB
LSB
0
Bits
15
14
13 12 11 10
9
8
7
6
5
4
3
2
1
TD8
(S) (TMSB)
TD7
TD TD TD TD TD TD TD0
STCN75
x
x
x
x
x
x
x
6
5
4
3
2
1
(TLSB)
Keys: S = Two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TDx = temperature data bits
1. These are comparable formats to the LM75.
3.1.4
Over-limit temperature register (T
)
OS
T
register is a two-byte (16-bit) READ/WRITE register that stores the user-programmable
OS
upper trip-point temperature for the thermal alarm in two’s complement format (see Table 8
on page 18). This register defaults to 80°C at power-up (i.e., 0101 0000 0000 0000).
The format of the T register is identical to that of the Temperature register. The MSB
OS
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.
For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the T
OS
register, and all remaining bits are “Don’t cares” (x).
17/35
Functional description
STCN75
3.1.5
Hysteresis temperature register (T
)
HYS
T
register is a two-byte (16-bit) READ/WRITE register that stores the user-
HYS
programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Table 8). This register defaults to 75°C at power-up (i.e., 0100 1011 0000
0000).
The format of this register is the same as that of the Temperature register. The MSB
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.
(1)
Table 8.
Bytes
T
and T
register format
HYS
OS
HS byte
TMSB
13 12 11 10
LS byte
TLSB
MSB
15
LSB
0
Bits
14
9
8
7
6
5
4
3
2
1
9-bit
TLSB
STCN75
S
TMSB TD TD TD TD TD TD
0
0
0
0
0
0
0
Keys: S = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature Data
1. These are comparable formats to the DS75 and LM75.
3.2
Power-up default conditions
The STCN75 always powers up in the following default states:
●
●
●
●
●
●
Thermostat mode = comparator mode
Polarity = active-low
Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register)
= 80°C
T
OS
T
= 75°C
HYS
Register pointer = 00 (temperature register)
Note:
After power-up these conditions can be reprogrammed via the serial interface.
18/35
STCN75
Functional description
3.3
Serial interface
Writing to and reading from the STCN75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STCN75 is a slave device
(see Table 9). Both the master and slave devices can send and receive data on the bus.
During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note:
There are no unused clock cycles during any operation, so there must not be any breaks in
the data stream and ACKs/NACKs during data transfers. Consequently, having too few clock
cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit register
occurs. So, the entire word must be transferred out regardless of the superflous trailing
zeroes.
Table 9.
MSB
STCN75 serial bus slave addresses
LSB
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
0
0
1
A2
A1
A0
R/W
3.4
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
●
●
●
Data transfer may be initiated only when the bus is not busy.
During data transfer, the data line must remain stable whenever the clock line is High.
Changes in the data line, while the clock line is High, will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined (see Figure 5 on page 20):
3.4.1
3.4.2
Bus not busy
Both data and clock lines remain High.
Start data transfer
A change in the state of the data line, from high to Low, while the clock is High, defines the
START condition.
3.4.3
Stop data transfer
A change in the state of the data line, from Low to High, while the clock is High, defines the
STOP condition.
19/35
Functional description
STCN75
3.4.4
Data valid
The state of the data line represents valid data when after a start condition, the data line is
stable for the duration of the high period of the clock signal. The data on the line may be
changed during the Low period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a start condition and terminated with a stop condition.
The number of data bytes transferred between the start and stop conditions is not limited.
The information is transmitted byte-wide and each receiver acknowledges with a ninth bit.
By definition a device that gives out a message is called “transmitter”, the receiving device
that gets the message is called “receiver”. The device that controls the message is called
“master”. The devices that are controlled by the master are called “slaves”.
Figure 5.
Serial bus data transfer sequence
DATA LINE
STABLE
DATA VALID
CLOCK
DATA
START
CONDITION
CHANGE OF
DATA ALLOWED
STOP
CONDITION
AI00587
3.4.5
Acknowledge
Each byte of eight bits is followed by one Acknowledge Bit. This Acknowledge Bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see Figure 6 on page 21). A slave receiver which is addressed is
obliged to generate an acknowledge after the reception of each byte that has been clocked
out of the slave transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable Low during the High period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line High to enable the master to generate the
STOP condition.
20/35
STCN75
Functional description
Figure 6.
Acknowledgement sequence
CLOCK PULSE FOR
ACKNOWLEDGEMENT
START
SCL FROM
MASTER
1
2
8
9
DATA OUTPUT
BY TRANSMITTER
MSB
LSB
DATA OUTPUT
BY RECEIVER
AI00601
3.5
READ mode
In this mode the master reads the STCN75 slave after setting the slave address (see
Figure 7). Following the WRITE mode Control Bit (R/W=0) and the Acknowledge Bit, the
word address 'An' is written to the on-chip address pointer.
There are two READ modes:
●
Preset pointer locations (e.g. Temperature, T and T
registers), and
OS
HYS
●
Pointer setting (the pointer has to be set for the register that is to be read).
Note:
The Temperature register pointer is usually the default pointer.
These modes are shown in the READ mode typical timing diagrams (see Figure 8, Figure 9,
and Figure 10 on page 22).
Figure 7.
Slave address location
R/W
START
SLAVE ADDRESS
A
1
0
0
1
A2 A1 A0
AI12226
21/35
Functional description
Figure 8.
STCN75
Typical 2-byte READ from preset pointer location (e.g. Temp - T , T
)
OS HYS
1
9
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
D7 D6 D5 D4 D3 D2 D1 D0
Least Significant Data Byte
Stop
Cond.
by
Master
Start
by
Master
Address Byte
ACK
by
ACK
by
No ACK
by
STCN75
Master
Master
AI12227
Figure 9.
Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
1
1
9
1
9
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
Start
by
Master
Address Byte
Pointer Byte
ACK
by
ACK
by
STCN75
STCN75
1
9
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
D7 D6 D5 D4 D3 D2 D1 D0
Least Significant Data Byte
Stop
Cond.
by
Repeat
Start
by
Address Byte
ACK
by
ACK
by
No ACK
by
Master
Master
STCN75
Master
Master
AI12228
Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Data Byte
Stop
Cond.
by
Start
by
Master
Address Byte
ACK
by
No ACK
by
Master
STCN75
Master
AI12229
22/35
STCN75
Functional description
3.6
WRITE mode
In this mode the master transmitter transmits to the STCN75 slave receiver. Bus protocol is
shown in Figure 11. Following the START condition and slave address, a logic '0' (R/W = 0)
is placed on the bus and indicates to the addressed device that word address will follow and
is to be written to the on-chip address pointer.
These modes are shown in the WRITE mode typical timing diagrams (see Figure 11, and
Figure 12, and Figure 13 on page 24).
Figure 11. Typical pointer set followed by an immediate READ from the
configuration register
1
1
9
1
0
9
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
D1 D0
Start
by
Master
Address Byte
Pointer Byte
ACK
by
ACK
by
STCN75
STCN75
1
1
9
1
9
R/W
0
0
1
A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
Data Byte
Stop
Cond.
by
Repeat
Start
by
Address Byte
ACK
by
No ACK
by
Master
STCN75
Master
STCN75
AI12230
Figure 12. Configuration register WRITE
1
9
1
9
1
0
9
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
0
0
D4 D3 D2 D1 D0
Stop
Cond.
by
Start
by
Master
Address Byte
Pointer Byte
Configuration Byte
ACK
by
STCN75
ACK
by
STCN75
ACK
by
STCN75
Master
AI12231
23/35
Functional description
Figure 13. T and T
STCN75
WRITE
HYS
OS
1
9
1
0
9
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
D1 D0
Start
by
Master
Address Byte
Pointer Byte
ACK
by
ACK
by
STCN75
STCN75
1
9
1
9
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
D7 D6 D5 D4 D3 D2 D1 D0
Least Significant Data Byte
Stop
Cond.
by
ACK
by
ACK
by
Master
STCN75
STCN75
AI12232
24/35
STCN75
Typical operating characteristics
4
Typical operating characteristics
Figure 14. Temperature variation vs. voltage
140
120
100
80
–20
0.5
85
60
40
20
110
125
0
–20
–40
–60
2
3
4
5
6
Voltage (V)
AI12258
25/35
Maximum ratings
STCN75
5
Maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 10. Absolute maximum ratings
Symbol
Parameter
Value
Unit
TSTG
Storage temperature (VCC Off, VBAT Off)
Lead solder temperature for 10 seconds
Input or output voltage
Supply voltage
–60 to 150
260
°C
°C
V
(1)
TSLD
VIO
VDD
VOUT
IO
VCC +0.5
7.0
V
Output voltage
VDD + 0.5
10
V
Output current
mA
mW
PD
Power dissipation
320
1. Reflow at peak temperature of 255°C to 260°C for < 30 seconds (total thermal budget not to exceed 180°C
for between 90 to 150 seconds).
26/35
STCN75
DC and AC parameters
6
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics Tables that
follow, are derived from tests performed under the Measurement Conditions summarized in
Table 11, Operating and AC Measurement Conditions. Designers should check that the
operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.
Table 11. Operating and AC measurement conditions
Parameter
Conditions
Unit
V
DD supply voltage
2.7 to 5.5
–55 to 125
≤ 5
V
°C
ns
V
Ambient operating temperature (TA)
Input rise and fall times
Input pulse voltages
0.2 to 0.8VCC
0.3 to 0.7VCC
Input and output timing reference voltages
V
27/35
DC and AC parameters
STCN75
Table 12. DC and AC characteristics
Sym
Description
Test condition(1)
Min
Typ(2)
Max
Unit
VDD Supply voltage
TA = –55 to +125°C
2.7
5.5
V
VDD supply current,
active temperature
conversions
V
DD = 3.3V
125
70
150
100
1.0
µA
µA
µA
IDD
VDD supply current,
TA = 25°C
TA = 25°C
communication only
Shutdown mode supply
IDD1 current, serial port
inactive
Accuracy for
corresponding range
2.7V ≤ VDD ≤ 5.5V
–25°C < TA < 100
–55°C < TA < 125
2.0
3.0
°C
°C
0.5
9
°C/LSB
bits
Resolution
9-bit Temperature data
tCONV Conversion time
9
45
80
75
85
ms
Over-temperature
shutdown
TOS
Default value
Default value
4mA sink current
°C
°C
V
THYS Hysteresis
OS/INT saturation
VOL1
0.5
voltage (VDD = 5V)
Digital pins
0.5xVDD
-0.45
VDD + 0.5
VIH
VIL
Input logic high
Input logic low
V
(SCL, SDA, A2-A0)
0.3xVDD
0.4
Digital pins
IOL = 3mA
V
V
VOL2 Output logic low (SDA)
CIN
IOL
Capacitance
5
pF
mA
SDA output low current
6
1. Valid for ambient operating temperature: TA = –55 to 125°C; VDD = 2.7V to 5.5V (except where noted).
2. Typical numbers taken at VDD= 3V, TA = 25°C.
28/35
STCN75
DC and AC parameters
Figure 15. Bus timing requirements sequence
SDA
tBUF
tHD:STA
tR
tHD:STA
tF
SCL
tHIGH
tSU:DAT
tHD:DAT
tSU:STA
tSU:STO
P
S
tLOW
SR
P
AI00589
Table 13. AC characteristics
Sym
Parameter(1)
Min
Max
Unit
fSCL
tBUF
SCL clock frequency
0
400
kHz
µs
Time the bus must be free before a new transmission can start
SDA and SCL fall time
1.3
tF
300
ns
(2)
tHD:DAT
Data hold time
0
µs
START condition hold time
(after this period the first clock pulse is generated)
tHD:STA
600
ns
tHIGH
tLOW
tR
Clock high period
Clock low period
600
1.3
ns
µs
ns
ns
SDA and SCL rise time
300
tSU:DAT Data setup time
100
600
600
START condition setup time
tSU:STA
ns
ns
(only relevant for a repeated start condition)
tSU:STO STOP condition setup time
1. Valid for ambient operating temperature: TA = –55 to 125°C; VDD = 2.7V to 5.5V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling
edge of SCL
29/35
Package mechanical data
STCN75
7
Package mechanical data
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
30/35
STCN75
Package mechanical data
Figure 16. SO8 – 8-pin, plastic small package outline
h x 45˚
c
A2
A
ccc
b
e
0.25 mm
D
GAUGE PLANE
k
8
1
E1
E
L
A1
L1
SO-A
1. Drawing is not to scale.
Table 14. SO8 – 8-pin, plastic small outline, package mechanical data
millimetres
Min
inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
b
1.75
0.25
0.069
0.010
0.10
1.25
0.28
0.17
0.004
0.049
0.011
0.007
0.48
0.23
0.10
5.00
6.20
4.00
–
0.019
0.009
0.004
0.197
0.244
0.157
–
c
ccc
D
4.90
6.00
3.90
1.27
4.80
5.80
3.80
–
0.193
0.236
0.154
0.050
0.189
0.228
0.150
–
E
E1
e
h
0.25
0°
0.50
8°
0.010
0°
0.020
8°
k
L
0.40
1.27
0.016
0.050
L1
1.04
0.041
31/35
Package mechanical data
Figure 17. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3x3) outline
STCN75
D
8
1
5
4
c
E1
E
k
A1
L
L2
A
A2
L1
ccc
b
e
E3_ME
1. Drawing is not to scale.
Table 15. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3x3) mech. data
mm
Min
inches
Min
Sym
Typ
Max
Typ
Max
A
A1
A2
b
1.10
0.15
0.95
0.40
0.23
3.20
5.15
3.10
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
0.00
0.75
0.22
0.08
2.80
4.65
2.80
0.000
0.030
0.009
0.003
0.110
0.183
0.110
0.85
0.034
c
D
3.00
4.90
3.00
0.65
0.60
0.95
0.25
0.118
0.193
0.118
0.026
0.024
0.037
0.010
E
E1
e
L
0.40
0°
0.80
0.016
0°
0.032
L1
L2
k
8°
8°
ccc
0.10
0.004
32/35
STCN75
Part numbering
8
Part numbering
Table 16. Ordering information scheme
Example:
STCN75
M
2
F
Device type
STCN75
Package
M = SO8N
DS = MSOP8 (TSSOP8)(1)
Temperature range
2 = –55 to 125°C
Shipping method
F = ECOPACK package, Tape & Reel
E = ECOPACK package, Tube
1. Contact local ST sales office for availability
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
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Revision history
STCN75
9
Revision history
Table 17. Revision history
Date
Revision
Changes
25-Jul-2006
1
Initial release
Changed document to new template; document status
updated from target specification to preliminary data; updated
footnotes in Table 1: Signal names; updated footnotes, V
,
OL1
17-Nov-2006
22-Jan-2007
2
3
V , V
and I in Table 12: DC and AC characteristics;
IL OL2
OL
deleted t
from Table 13: AC characteristics; updated
TIME-OUT
package mechanical data for the SO8N package in Section 7.
Updated information in features and cover page, DC and AC
characteristics (Table 12), package mechanical information
(Figure 17 and Table 15) and part numbering (Table 16).
Updated cover page (package information); Section 2:
Operation; Section 2.3: Comparator mode; Section 2.4:
Interrupt mode; Table 4; Table 12; package mechanical data
(Figure 17, Table 15); and part numbering (Table 16).
02-Mar-2007
06-Jun-2007
4
5
Updated cover page, document status upgraded to full
datasheet, updated Table 12.
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STCN75
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