STD6NF10 [STMICROELECTRONICS]
N-CHANNEL 100V - 0.22 ohm - 6A IPAK/DPAK LOW GATE CHARGE STripFET⑩ POWER MOSFET; N沟道100V - 0.22欧姆 - 6A IPAK / DPAK低栅电荷STripFET⑩功率MOSFET![STD6NF10](http://pdffile.icpdf.com/pdf1/p00038/img/icpdf/STD6NF10_199551_icpdf.jpg)
型号: | STD6NF10 |
厂家: | ![]() |
描述: | N-CHANNEL 100V - 0.22 ohm - 6A IPAK/DPAK LOW GATE CHARGE STripFET⑩ POWER MOSFET |
文件: | 总9页 (文件大小:268K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
STD6NF10
N-CHANNEL 100V - 0.22 Ω - 6A IPAK/DPAK
LOW GATE CHARGE STripFET™ POWER MOSFET
V
R
I
D
TYPE
DSS
DS(on)
STD6NF10
100 V
<0.250 Ω
6 A
■
■
■
■
■
TYPICAL R (on) = 0.22 Ω
DS
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
LOW THRESHOLD DRIVE
3
3
2
1
1
THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX “-1")
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
IPAK
DPAK
TO-252
(Suffix “T4”)
■
TO-251
(Suffix “-1”)
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended
for any applications with low gate drive requirements.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■
HIGH-EFFICIENCY DC-DC CONVERTERS
■
UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
100
100
± 20
6
Unit
V
V
Drain-source Voltage (V = 0)
DS
GS
V
Drain-gate Voltage (R = 20 kΩ)
V
DGR
GS
V
GS
Gate- source Voltage
V
I
Drain Current (continuos) at T = 25°C
A
D
C
I
Drain Current (continuos) at T = 100°C
4
A
D
C
I
•)
Drain Current (pulsed)
24
A
DM(
P
Total Dissipation at T = 25°C
30
W
tot
C
Derating Factor
0.2
40
W/°C
V/ns
mJ
(1)
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
dv/dt
(2)
E
200
AS
T
stg
-65 to 175
°C
T
Max. Operating Junction Temperature
j
(1) I ≤6A, di/dt ≤300A/µs, V ≤ V
, T ≤ T
j JMAX
SD
DD
(BR)DSS
•) Pulse width limited by safe operating area.
(
o
(2) Starting T = 25 C, I = 3A, V = 50V
j
D
DD
June 2001
1/9
.
STD6NF10
THERMAL DATA
Rthj-case
Rthj-amb
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
Max
Max
Typ
5
100
300
°C/W
°C/W
°C
T
j
ELECTRICAL CHARACTERISTICS (T
= 25 °C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol
Parameter
Drain-source
Test Conditions
Min.
Typ.
Max.
Unit
I
= 250 µA, V = 0
D
GS
V
100
V
(BR)DSS
Breakdown Voltage
V
= Max Rating
= Max Rating T = 125°C
Zero Gate Voltage
1
10
µA
µA
I
DS
DSS
Drain Current (V = 0)
V
DS
GS
C
Gate-body Leakage
V
GS
= ± 20V
±1
µA
I
GSS
Current (V = 0)
DS
(1)
ON
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
V
GS(th)
V
V
= V
I
I
= 250 µA
Gate Threshold Voltage
2
4
DS
GS
GS
D
D
= 10 V
= 3 A
Static Drain-source On
Resistance
0.22
0.25
Ω
R
DS(on)
DYNAMIC
Symbol
Parameter
Test Conditions
> I x R
DS(on)max,
Min.
Typ.
Max.
Unit
V
DS
D(on)
(*)
g
fs
Forward Transconductance
34
S
I
D
= 3 A
V
= 25V, f = 1 MHz, V = 0
GS
C
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
280
45
20
pF
pF
pF
DS
iss
C
oss
C
rss
2/9
STD6NF10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
= 50 V
Min.
Min.
Min.
Typ.
Max.
Max.
Max.
Unit
V
R
I
= 3 A
D
Turn-on Delay Time
Rise Time
6
10
ns
ns
t
DD
d(on)
= 4.7 Ω
V
= 10 V
GS
t
r
G
(Resistive Load, Figure 3)
Q
V
= 80 V I = 6 A V = 10 V
D GS
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
10
2.5
4
nC
nC
nC
g
DD
Q
gs
Q
gd
SWITCHING OFF
Symbol
Parameter
Test Conditions
= 50 V
Typ.
Unit
V
R
I
= 6 A
D
Turn-off Delay Time
Fall Time
20
3
ns
ns
t
DD
d(off)
= 4.7Ω,
V
GS
= 10 V
t
G
f
(Resistive Load, Figure 3)
t
V
R
= 80 V
I
D
= 6 A
Off-voltage Rise Time
Fall Time
Cross-over Time
19
8
15
ns
ns
ns
d(Voff)
clamp
t
= 4.7Ω,
V
GS
= 10 V
f
G
t
c
(Inductive Load, Figure 5)
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Typ.
Unit
I
Source-drain Current
Source-drain Current (pulsed)
6
24
A
A
SD
( )
•
I
SDM
(*)
I
I
= 6 A
V
= 0
GS
V
Forward On Voltage
1.3
V
SD
SD
SD
t
rr
= 6 A
di/dt = 100A/µs
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
70
175
5
ns
nC
A
Q
V
= 10 V
T = 150°C
j
rr
DD
I
(see test circuit, Figure 5)
RRM
(*)
(
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
•)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
3/9
STD6NF10
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/9
STD6NF10
Normalized Gate Threshold Voltage vs Temperature
Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
.
.
.
5/9
STD6NF10
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Fig. 4: Gate Charge test Circuit
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STD6NF10
TO-251 (IPAK) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
2.2
TYP.
MAX.
2.4
MIN.
0.086
0.035
0.027
0.025
0.204
MAX.
0.094
0.043
0.051
0.031
0.212
0.033
A
A1
A3
B
0.9
1.1
0.7
1.3
0.64
5.2
0.9
B2
B3
B5
B6
C
5.4
0.85
0.3
0.012
0.95
0.6
0.6
6.2
6.6
4.6
16.3
9.4
1.2
1
0.037
0.023
0.023
0.244
0.260
0.181
0.641
0.370
0.047
0.039
0.45
0.48
6
0.017
0.019
0.236
0.252
0.173
0.626
0.354
0.031
C2
D
E
6.4
4.4
15.9
9
G
H
L
L1
L2
0.8
0.8
0.031
H
L
D
L2
L1
0068771-E
7/9
STD6NF10
TO-252 (DPAK) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
2.2
TYP.
MAX.
2.4
MIN.
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
0.252
0.173
0.368
MAX.
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.260
0.181
0.397
A
A1
A2
B
0.9
1.1
0.03
0.64
5.2
0.23
0.9
B2
C
5.4
0.45
0.48
6
0.6
C2
D
0.6
6.2
E
6.4
6.6
G
4.4
4.6
H
9.35
10.1
L2
L4
0.8
0.031
0.6
1
0.023
0.039
H
DETAIL "A"
D
L2
DETAIL "A"
L4
0068772-B
8/9
STD6NF10
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
2001 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
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9/9
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