STHS4257A1DB6F [STMICROELECTRONICS]
SPECIALTY INTERFACE CIRCUIT, DSO8, 3 X 3 MM, ROHS COMPLIANT, DFN-8;
| 型号： | STHS4257A1DB6F |
| 厂家： | 
ST |
| 描述： | SPECIALTY INTERFACE CIRCUIT, DSO8, 3 X 3 MM, ROHS COMPLIANT, DFN-8 接口集成电路 |
| 文件： | 总18页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STHS4257A, STHS4257A1
STHS4257L, STHS4257L1
IEEE 802.3af PoE Powered Device (PD)
interface controller with integrated signature resistor
Features
■ IEEE 802.3af-compliant interface for Powered
8
Devices (PDs)
1
■ Integrated 100V, 450mA power MOSFET low
SO8 (M)
side switch
■ Inrush current limit
■ Normal operation current limit
■ Integrated 25kΩ signature resistor
■ Signature disable (STHS4257A1/L1)
DFN8 3mm x 3mm (DB)
■ Resistor-programmable classification current
(Class 0-4)
■ Power Good output, open drain
■ Undervoltage Lockout (UVLO)
Applications
■ Voice over IP (VoIP) phones
■ Web cameras
■ Thermal overload protection (two-step for the
STHS4257A/L)
■ WLAN access points
■ Internet appliances
■ POS terminals
■ Latch (L) or auto-retry (A) after repetitive
thermal overload
■ Industrial temperature range: –40 to +85°C
■ SO8 and DFN8 (3mm x 3mm) packages
■ RoHS compliant
■ RFID readers
Table 1.
Device options
Signature
Normal
operation
current limit
Inrush
current limit
UVLO
threshold, threshold,
UVLO
Thermal
overload
protection
Protection
mode
Order code
disable
rising (V)
falling (V)
(mA, typ)
(mA, typ)
STHS4257A
STHS4257A1
STHS4257L
STHS4257L1
39.2
36.0
39.2
36.0
30.5
30.5
30.5
30.5
Auto
Auto
2 steps
1 step
2 steps
1 step
350/188 (1)
✔
✔
140
375
375
Latch
Latch
350/188 (1)
140
1. Current limit is common for both modes and gets reduced only in case of thermal overload. See Table 5: Electrical parameters.
July 2007
Rev 4
1/18
www.st.com
1
Contents
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Contents
1
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.1.6
Classification (R
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
CLASS
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
IN
Power supply (GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Signature disable input (SIGDISA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Good output (PWRGD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Negative power output (V
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
OUT
1.2
IEEE802.3af PD power classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
3
4
5
6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
IEEE802.3af PD power classes and corresponding R values. . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SO8 – 8-lead plastic small outline, 150mils width, mechanical data. . . . . . . . . . . . . . . . . . 14
DFN8 – 8-lead dual flat no-lead outline, package mechanical data . . . . . . . . . . . . . . . . . . 15
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
CLASS
3/18
List of figures
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connections (STHS4257A/L, top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connections (STHS4257A1/L1, top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application circuit overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block diagram (STHS4257A/L). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical application circuit (STHS4257A/L) with a DC/DC converter. . . . . . . . . . . . . . . . . . . 9
Block diagram (STHS4257A1/L1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical application circuit (STHS4257A1/L1) with a DC/DC converter. . . . . . . . . . . . . . . . 10
SO8 – 8-lead plastic small outline, 150mils width, mechanical drawing. . . . . . . . . . . . . . . 14
Figure 10. DFN8 – 8-lead dual flat no-lead outline, package mechanical drawing . . . . . . . . . . . . . . . 15
4/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Summary description
1
Summary description
The STHS4257 is an IEEE802.3af-compliant family of interface controllers for Power over
Ethernet (PoE) Powered Device (PD) applications. The devices consist of two main
sections:
●
The IEEE802.3af interface to the PoE powered RJ-45 wall socket, and
●
the Hot Swap Controller (HSC) functions required to protect the PD during insertion,
operation, and withdrawal from the RJ-45 socket.
These devices have an integrated high voltage power MOSFET (low-side switch) with low
and the capability to accept transients as high as 100V. Since the pins (such as GND
R
ON
and V ) which interface to the RJ-45 socket can routinely see high peak voltages in excess
IN
of 100V, it is strongly recommended that board designers protect the PD device with a
transient voltage suppressor, such as the SMAJ58A (available from STMicroelectronics),
connected between the GND and V pins (see Figure 4 on page 8).
IN
The IEEE802.3af-compliant interface includes the basic PD detection and Classification
functions, whereas the ‘Hot Swap’ functions include other basic features, such as Inrush
Current Limiting, Undervoltage Lockout (UVLO), and Thermal Overload Protection. All of the
devices include an open drain Power Good (PWRGD) signal to indicate normal steady
operation (see Figure 1 on page 6 and Table 2 on page 6). The STHS4257 family also
incorporates a 1.5V voltage offset (two series diodes) to accommodate the input diode
bridge used to make the PD polarity insensitive.
The STHS4257A1/L1 includes a dual level current limit circuit. This allows the
STHS4257A1/L1 to interface with legacy Power over Ethernet (LAN) systems while
maintaining compatibility with the current IEEE 802.3af specification.
Each of the two basic part types, the STHS4257A/L and the STHS4257A1/L1, is available
either with Latched Operation (L) Mode or with Automatic Retry (A) Mode after fault
conditions. For product options overview see Table 1 on page 1.
5/18
Summary description
Figure 1. Logic diagram
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
GND
(1)
PWRGD
SIGDISA
STHS4257A/L
STHS4257A1/L1
R
V
OUT
CLASS
V
IN
AI12214a
1. STHS4257A1 and STHS4257L1 devices only.
Table 2.
Signal names
Pin
Symbol
Description
STHS4257A/L STHS4257A1/L1
1, 3, 7
1, 3
2
NC
RCLASS
VIN
No Connect
2
4
Classification pin
4
Negative return power line to PSE
5
5
VOUT
Power Output (negative rail)
6
6
PWRGD
SIGDISA
GND
Power Good Output, open drain, active-low (referenced to VIN)
Signature Disable Input, internally pulled to VIN
Positive Power Supply; common input/output power rail
—
8
7
8
Figure 2.
Pin connections (STHS4257A/L, top view)
GND
NC
1
2
3
4
8
7
6
5
R
NC
CLASS
NC
PWRGD
V
V
IN
OUT
AI12204b
Figure 3.
Pin connections (STHS4257A1/L1, top view)
GND
NC
1
2
3
4
8
7
6
5
R
SIGDISA
PWRGD
CLASS
NC
V
V
IN
OUT
AI12205b
6/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Summary description
1.1
Pin descriptions
1.1.1
Classification (R
)
CLASS
This is the Classification pin. Connect a Classification resistor between this pin and V to
IN
tell the PSE which power class will be connected. Leave it open for Class 0.
Note: Do not connect this pin directly to V . For power classes and R
resistor values,
CLASS
IN
see Table 3.
1.1.2
V
IN
This is negative return power line to PSE.
1.1.3
1.1.4
Power supply (GND)
This is the Power Input/Output, positive rail.
Signature disable input (SIGDISA)
This pin is internally pulled down to V to present a valid signature to PSE. Connect to V
IN
IN
if it is unused. Tie to GND to present an invalid signature.
Note: This signal is available for STHS4257A1 and STHS4257L1 only.
1.1.5
Power Good output (PWRGD)
This pin indicates that the STHS4257x/x1 power MOSFET is fully on and works in normal
operation mode (Power Good). Open drain, low impedance means that the power is good; in
all other cases, the impedance is high (referenced to V ).
IN
1.1.6
Negative power output (V
)
OUT
This is the Power Output, negative rail.
1.2
IEEE802.3af PD power classes
Table 3.
Class
IEEE802.3af PD power classes and corresponding R
values
CLASS
Max. power levels Nominal classification RCLASS Resistor
Usage
at input of PD (W)
load current (mA)
(Ω, 1%)
0
1
2
3
4
Default
Optional
Optional
Optional
Reserved
0.44 to 12.95
0.44 to 3.84
3.84 to 6.49
6.49 to 12.95
Reserved (1)
< 5
10.5
18.5
28
Open
124
68.1
45.3
30.9
40
1. Class 4 is currently reserved and should not be used.
7/18
Summary description
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Figure 4.
Application circuit overview
RJ-45
TX
Pair
Data to Ethernet Physical Layer Device
2x DF01S
GND
(1)
100
kΩ
SMAJ58A
SIGDISA
PWRGD
To DC/DC
Converter
C2
C1
STHS4257A/L
+
STHS4257A1/L1
0.1µF,
100V
100µF,
100V
Spare
Pair
R
CLASS
V
OUT
V
IN
Spare
Pair
R
CLASS
RX
Pair
Data to Ethernet Physical Layer Device
AI12203b
1. STHS4257A1 and STHS4257L1 devices only. To disable signature, tie this pin to GND.
2. This configuration uses either data wires or spare wires for DC power.
8/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Summary description
Figure 5.
Block diagram (STHS4257A/L)
Classification
Current Source
GND
1
8
NC
+
–
ref
25k
Signature
Resistor
EN
NC
2
3
7
6
R
CLASS
NC
PWRGD
Power Good
Control
Circuits
Input
Current
Limit
EN
+
–
ref
Power
MOSFET
R
S
V
V
4
5
IN
OUT
AI12206c
Figure 6.
Typical application circuit (STHS4257A/L) with a DC/DC converter
Powered Device (PD)
V
SMAJ58A
GND
IN
5µF
(min)
100V
~
+
Switching
Power
Supply
STHS4257A/L
100
kΩ
C1
+
48V from
power sourcing
Diode
Bridge
R
CLASS
0.1µF
100V
C2
equipment (PSE)
+
SHDN
PWRGD
~
–
3V
to logic
R
RTN
CLASS
DF01S
V
V
OUT
–
IN
AI12207a
9/18
Summary description
Figure 7.
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Block diagram (STHS4257A1/L1)
Classification
Current Load
GND
1
8
NC
+
ref
9kΩ
Signature Disable
–
EN
25k
Signature
Resistor
SIGDISA
PWRGD
2
3
7
6
R
CLASS
16kΩ
NC
Power Good
Control
Circuits
Input
Current
Limit
(1)
ref1
ref2
EN
+
–
(2)
Power
R
S
MOSFET
V
4
5
V
IN
OUT
AI12208a
1. Ref.1 = ILIMIT HIGH
2. Ref. 2 = ILIMIT LOW
Figure 8.
Typical application circuit (STHS4257A1/L1) with a DC/DC converter
Powered Device (PD)
V
SMAJ58A
GND
IN
5µF
(min)
+ 100V
~
+
Switching
Power
Supply
STHS4257A1/L1
100
kΩ
48V from
power sourcing
C1
Diode
Bridge
R
CLASS
0.1µF
100V
equipment (PSE)
SIGDISA
PWRGD
C2
+
SHDN
RTN
~
–
3V
to logic
R
DF01S
CLASS
V
V
OUT
–
IN
AI12209a
10/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Absolute maximum ratings
2
Absolute maximum ratings
Stressing the device above the rating listed in the Table 4: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4.
Absolute maximum ratings
Parameter
Symbol
Value
Unit
VIN
Input/supply voltage (1)
Voltage on VOUT pin
+0.3 to –100
VIN +100 to VIN –0.3
VIN +90 to VIN –0.3
VIN +7 to VIN –0.3
10
V
V
VOUT
VSIGDISA, VPWRGD
VRCLASS
IPWRGD
Voltage on the respective pins
Voltage on RCLASS pin
V
V
Power Good output current
RCLASS pin current
mA
mA
°C
°C
IRCLASS
TA
100
Operating ambient temperature range
Storage temperature
–40 to 85
TSTG
–55 to 150
Lead solder temperature for 10 seconds,
lead-free lead finish (2)
TSLD
260
°C
1. With respect to the GND pin.
2. Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C for more than 30 seconds).
11/18
Electrical parameters
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
3
Electrical parameters
Over the full operating temperature range, unless otherwise noted. Specifications common
for both STHS4257x (=STHS4257A, STHS4257L) and STHS4257x1 (=STHS4257A1,
STHS4257L1) product families unless otherwise noted.
Table 5.
Electrical parameters
Symbol
Parameter
Conditions
Min Typ Max Unit
Maximum Operating Voltage
Signature Range
–57
–9.5
–21
V
V
V
–1.5
Classification Range
–12.5
Input/supply voltage - with respect
UVLO Turn-On Voltage,
STHS4257x1
VIN
to GND pin (1) (2) (3)
,
,
–34.8 –36.0 –37.2
V
V
UVLO Turn-On Voltage,
STHS4257x
–37.7 –39.2 –40.2
–29.3 –30.5 –31.5
UVLO Turn-Off Voltage
Supply Current when on
V
IIN ON
VIN = –48V, pins 5, 6, 7 floating
0.33
0.5
mA
Supply Current During
Classification
VIN = –17.5V, pins 2, 7 floating,
VOUT tied to GND (4)
IIN CLASS
0.12 0.25 0.38 mA
3.5
Current Accuracy During
Classification
10mA < ICLASS < 40mA,
ΔICLASS
%
–12.5V ≤ VIN ≤ –21V (5)
–1.5V ≤ VIN ≤ –9.5V, VOUT tied to
RSIGNATURE Signature Resistance
GND, IEEE 802.3af 2-point
23.25
26.00 kΩ
11.8 kΩ
measurement (2) (6)
,
–1.5V ≤ VIN ≤ –9.5V, SIGDISA and
RINVALID
Invalid Signature Resistance
VOUT tied to GND, IEEE 802.3af
9
2-point measurement (2) (6) (7)
,
,
Signature Disable High Level
Input Voltage
With respect to VIN, high level
invalidates signature (7)
VIH
VIL
3
57
V
V
Signature Disable Low Level
Input Voltage
With respect to VIN, low level
enables signature (7)
0.45
Signature Disable Input
Resistance
RINPUT
VPG OUT
VPG TH RISE
IPG LEAK
RON
With respect to VIN
100
2.7
kΩ
V
IPG = 1mA, VIN = –48V, PWRGD
referenced to VIN
Power Good Output Low Voltage
0.5
3.3
1
Power Good Trip Point, power
good signal going inactive
VIN = –48V, voltage between VIN
and VOUT, VOUT rising
(8)
3.0
V
VPWRGD - VIN = 57V, PWRGD
Power Good Leakage Current
On-Resistance
µA
Ω
(9)
MOSFET off, VPWRGD = VGND
I = 350mA, VIN = –48V, measured
from VIN to VOUT
0.72
1.0
1
V
IN = 0V, power MOSFET off,
IOUT LEAK
VOUT Pin Leakage Current
µA
VOUT = 57V (10)
VIN = –48V, VOUT = –43V (11) (12)
0°C ≤ TA ≤ 70°C
–40°C ≤ TA ≤ 85°C
,
340
330
375
375
400 mA
400 mA
Input Current Limit, High Level,
STHS4257x1
(normal operation mode)
ILIMIT HIGH
12/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Electrical parameters
Min Typ Max Unit
Table 5.
Symbol
Electrical parameters (continued)
Parameter
Conditions
VIN = –48V, VOUT = –43V (11) (12)
Input Current Limit, Low Level,
STHS4257x1
ILIMIT LOW
,
100
300
140
180 mA
(inrush mode)
ILIMIT
Input Current Limit, STHS4257x VIN = –48V, VOUT = –43V (14)
350
188
400 mA
mA
Overtemperature Input Current
Limit, STHS4257x
(14)
ILIMIT WARM
Overtemperature Trip
Temperature, STHS4257x
(14)
TOVERTEMP
TSHUTDOWN
120
140
°C
°C
Thermal Shutdown Trip
Temperature
(11) (13) (14)
,
,
1. The STHS4257 family of PoE products operates with a negative supply voltage (with respect to the GND pin, unless
otherwise noted). Voltages in this data sheet are always referred to in terms of absolute magnitude, thus "maximum
negative voltage" means the most negative voltage and analogically "rising negative voltage" refers to a voltage that is
becoming more negative.
2. The STHS4257 family of products is designed to work with two series diode drops caused by diode bridge that makes the
PD input polarity-insensitive. Parameter ranges specified in the Electrical Parameters Table are with respect to
STHS4257x/x1 pins and are designed to meet the IEEE 802.3af specifications when these diode drops are included. See
Figure 4 on page 8.
3. The STHS4257x/x1 devices include hysteresis in the UVLO voltages to avoid any start-up oscillation. As required by IEEE
802.3af, the STHS4257 family devices will power up from a voltage source with 20Ω series resistance on the first trial.
4. The Supply Current During Classification (IIN CLASS) does not include classification current programmed at pin 2. Total
supply current in classification mode will be IIN CLASS + ICLASS (see also Note 5).
5. ICLASS is the measured current flowing through RCLASS. ΔICLASS accuracy is with respect to the ideal current defined as
ICLASS = 1.237/RCLASS. The current accuracy specification does not include variations in RCLASS resistance. The total
classification current seen by PSE also includes the quiescent current (IIN CLASS). See Figure 4 on page 8.
6. Signature resistance is measured via the 2-point ΔV/ΔI method as defined by IEEE 802.3af standard. The STHS4257
device family signature resistance is offset from standard 25kΩ to account for the series diode bridge resistance. With two
series diodes, the total PD resistance will be between 23.75kΩ and 26.25kΩ which meets IEEE 802.3af specifications. The
minimum probe voltages measured at the STHS4257x/x1 pins are –1.5 and –2.5V. The maximum probe voltages are –8.5
and –9.5V.
7. To disable the 25kΩ signature, tie SIGDISA to GND ( 0.1V) or hold SIGDISA high with respect to VIN. See Figure 4 on
page 8.
8.
VPG TH FALL is not used: To eliminate the current peak during the transition from inrush to normal operation mode, the
power MOSFET (between VOUT and VIN - see Figure 5 on page 9) turns fully on only after the inrush current decreases by
10% from its initial value (i.e. when the output capacitor is fully charged).
9. GND pin at the same potential as PWRGD pin to prevent ESD protection from impacting the measured results. To keep
PWRGD MOSFET off under this condition, maintain uninterrupted inrush current e.g. by applying 1V voltage between
V
OUT and VIN pin. This will keep the device in inrush mode, thus preventing PWRGD from going active (on).
10. To significantly reduce IOUT LEAK and eliminate its impact on total current during detection and classification, the resistor
divider used to provide feedback on VOUT - VIN voltage is disconnected below the UVLO threshold.
11. The STHS4257x1 includes thermal protection. In the event of an overtemperature condition (TSHUTDOWN is reached), the
STHS4257x1 will turn off the power MOSFET until the part cools below the overtemperature limit (TOVERTEMP). The
STHS4257x1 is also protected against thermal damage from incorrect classification probing by the PSE: If the
STHS4257x1 temperature exceeds the shutdown trip point (TSHUTDOWN), the classification load current is disabled.
12. The STHS4257x1 includes dual level input current limit. At turn-on, before output capacitor C2 is charged, the
STHS4257x1 current level is set to the low level. After the output capacitor C2 is charged, the STHS4257x1 switches to
high level current limit and remains there until the input voltage drops below the UVLO turn-off threshold.
13. The STHS4257 family devices include overtemperature protection that is intended to protect the device during momentary
overload conditions only. Continuous operation close to overtemperature limits may impair device reliability.
14. The STHS4257x includes smart thermal protection. In the event of an overtemperature condition, the STHS4257x will
reduce the input current limit by 50% to reduce the power dissipation in the package. If the part continues heating and
reaches the shutdown temperature (TSHUTDOWN), the current is reduced to zero until the part cools below the
overtemperature limit (TOVERTEMP). The STHS4257x is also protected against thermal damage from incorrect classification
probing by the PSE: If the STHS4257x temperature exceeds the shutdown trip point (TSHUTDOWN), the classification load
current is disabled.
13/18
Package mechanical data
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
4
Package mechanical data
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 9.
SO8 – 8-lead plastic small outline, 150mils width, mechanical drawing
h x 45˚
A2
A
C
B
ddd
e
D
8
1
E
H
A1
α
L
SO-A
1. Drawing is not to scale.
Table 6.
Symb
SO8 – 8-lead plastic small outline, 150mils width, mechanical data
mm
Min
inches
Min
Typ
Max
Typ
Max
A
A1
B
–
–
1.35
0.10
0.33
0.19
4.80
–
1.75
0.25
0.51
0.25
5.00
0.10
4.00
–
–
0.053
0.004
0.013
0.007
0.189
–
0.069
0.010
0.020
0.010
0.197
0.004
0.157
–
–
–
–
C
–
–
D
–
–
ddd
E
–
–
–
3.80
–
–
0.150
–
e
1.27
–
0.050
H
5.80
0.25
0.40
0°
6.20
0.50
0.90
8°
–
–
–
–
0.228
0.010
0.016
0°
0.244
0.020
0.035
8°
h
–
L
–
α
–
N
8
8
14/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Package mechanical data
Figure 10. DFN8 – 8-lead dual flat no-lead outline, package mechanical drawing
Seating
Plane
C
D
e
1
2
3
4
8
7
6
5
b
D2
Bottom View
DFN-A
1. Drawing is not to scale.
Table 7.
Symb
DFN8 – 8-lead dual flat no-lead outline, package mechanical data
mm
Min
inches
Typ
Max
Typ
Min
Max
A
A1
A2
A3
b
0.90
0.02
0.70
0.20
0.23
3.00
2.38
–
0.80
–
1.00
0.05
–
0.035
0.001
0.028
0.008
0.009
0.118
0.094
0.031
0.039
0.002
–
–
–
0.18
–
0.30
–
0.007
0.012
0.003
D
D2
ddd
E
2.23
–
2.48
0.08
–
3.00
1.64
0.50
0.40
–
0.118
0.065
0.020
0.016
E2
e
1.49
–
1.74
–
0.059
–
0.069
–
L
0.30
8
0.50
0.012
8
0.020
N
15/18
Part numbering
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
5
Part numbering
Table 8.
Ordering information scheme
STHS
Example:
4257A1
M
6
F
Device type
STHS
Product options
4257A
4257A1
4257L
4257L1
Package
M = SO8 (150mils width)
DB(1) = DFN8 (3mm x 3mm)
Temperature range
6 = –40 to 85°C
Shipping method
F = ECOPACK Package, Tape & Reel
E = ECOPACK Package, Tube
1. Contact local sales office for availability.
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
16/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
Revision history
6
Revision history
Table 9.
Date
Document revision history
Revision
Changes
12-Jul-2006
19-Dec-2006
24-May-2007
1
2
3
Initial release.
Updated Features and Table 4.
Formatting changes and updatedTable 5.
Document status upgraded to full datasheet, updated cover page
and Table 8.
26-Jul-2007
4
17/18
STHS4257A, STHS4257A1, STHS4257L, STHS4257L1
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18/18
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