STI5211 [STMICROELECTRONICS]
Low-cost HDTV satellite set-top box decoder for Microsoft VC-1, H.264 and MPEG-2; 低成本的HDTV卫星机顶盒解码器，用于微软的VC -1， H.264和MPEG -2的
| 型号： | STI5211 |
| 厂家： | 
ST |
| 描述： | Low-cost HDTV satellite set-top box decoder for Microsoft VC-1, H.264 and MPEG-2 |
| 文件： | 总4页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STi5211
Low-cost HDTV satellite set-top box decoder for Microsoft VC-1,
H.264 and MPEG-2
Data brief
digital external TS inputs, 2 internal inputs from
internal demodulators and one TS from
memory for network client
Features
Microsoft VC-1, MPEG-2 and H.264 support
ST40-300 CPU running at 450 MHz, high
performance for Linux, Windows CE and OS21
based systems
USB 2.0 to support network interface and
feature enhancement
External memory interface (EMI) with Nand-
DVB-S2 and DVB-S front-end integrated
demodulators with a fully featured SD
advanced decoder system-on-chip (SoC)
Flash, Nor-Flash, PCI, peripherals support
10/100 Mbit/s Ethernet MAC with media
independent interface (MII) and reduced MII
(RMII)
Flexible ST231 based advanced video decoder
ST231 audio decoder at 450 MHz supporting
WMA9, AC3, DD+, AAC, AAC+ with SPDIF
output
Advanced security, SVP compliant, WM DRM
compliant
Dual smartcard, 4 x UART, 3 x synchronous
serial controllers (SSC), soft modem and DAA
interface, IR blaster and receiver, UHF Rx
digital input
SD display: 2 video, 3 graphics planes and
background color with high quality filtering
HDMI/HDCP output with standard definition
(SD) component and composite output
DiSEqC 2.0 and FSK modem supported
Unified DDR2 16-bit interface operating at up
4 x 4 matrix key front panel switch scanner
to 333 MHz
FSM with key de-bounce
Programmable transport interface (PTI) and
27 x 27 mm package, 65-nm technology
transport stream (TS) merger with up to 2
(2 channels)
PCI
Digital PCMout
DDR-2
SDRAM
NOR/NAND
FLASH
Analog Stereo
YPrPb
HDMI CEC
SDTV
S/PDIF
Video out
DAC
Audio
Memory
JTAG
IRQs
SD DACs HDMI
SD DACs
DENC
Padlogic Padlogic
Video output
Compositor
ClockGen/
Service
(JTAG, ICE..)
Audio
decoder
ST231
VDP main
(DEI-SD + IQI)
GDPx3
cursor
alpha
EMI/PCI
resets
clocks
Audio IF
VDP aux
LMI
STBus system interconnect
SAT FE core
Transport/SEC CPU DMA
CPU
Peripheral
COMMS
Video
FDMA
SWTS
Video
Ethernet USB 2.0
ST40-4/300 (x2)
decoder
GMAC
Host
H.264/VC-1 SD
DVB-S2+DVB-S
demodulator
MailBoxes (x2)
ST231
TSmerger
PTI
PDES3
Blitter display
2
PHY
int I C
FE0 FE1 DiSEqC 1/FSK
TSin
SSCs, PWM
PIOs, UARTs
MAFE, SC...
USB-bus
MII/RMII
2 x serial
or 1 x parallel
DiSEqC 0
June 2010
Doc ID 14550 Rev 2
1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Description
STi5211
1
Description
The STi5211 is a standard definition, full back-end processor for satellite set-top boxes,
compliant with ATSC, SMPTE VC-1, DVB-S2, DIRECTV, DCII and ARIB BS4 specifications.
It provides very high performance for low-cost SD systems. With its enhanced performance
compared to the STi5202, the STi5211 includes both VC-1 and H.264 video decoders for
new, low bitrate applications.
The main platform target for the STi5211 is the DVB-S2 zapper. Alternatively, the device can
be used in a client box through IP over Ethernet, Multimedia over Coax Alliance (MoCA) or
WiFi.
Figure 1.
STi5211 applications
2 x 128 MB
DDR2-333 MHz
16
IR Rx
UHF Rx
Key scanning
(no front panel micro-ctrl)
27/30MHz
PIOs
FE0 - DVB-S2
27/30MHz
STb6110
L
Discrete and
power circuitry
R
DiSEqC0
27/30MHz
STi5211
S/PDIF
plug
FE1 - DVB-S1
Analog
YPbPr
STb6110
Buffer filter
HDMI TMDS 1.48GHz
Discrete and
power circuitry
DiSEqC1
Ethernet
Plug
MII
Ethernet PHY
CEC / DDC
CVBS/YC
Coax
plug
MoCA PHY
Si3062
USB 2.0
Buffer filter
VCR
USB 2.0 host plug
I2C
DAA
EMI/PCI
EEPROM
PSTN
V92 SW modem
NOR/NAND
flash
WiFi
ST8024
Smart card
socket interface
2/4
Doc ID 14550 Rev 2
STi5211
Revision history
2
Revision history
Table 1.
Date
Document revision history
Revision
Changes
19-Mar-2008
28-Jun-2010
1
2
Initial release.
Removed erroneous watermark
Doc ID 14550 Rev 2
3/4
STi5211
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Doc ID 14550 Rev 2
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