STLQ020PU19R [STMICROELECTRONICS]
200 mA ultra-low quiescent current LDO;
| 型号： | STLQ020PU19R |
| 厂家： | 
ST |
| 描述： | 200 mA ultra-low quiescent current LDO |
| 文件： | 总31页 (文件大小：2813K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STLQ020
Datasheet
200 mA ultra-low quiescent current LDO
Features
•
•
•
Operating input voltage range: 2 V to 5.5 V
Output current up to 200 mA
Ultra-low quiescent current:
Flip-Chip4
DFN6-2x2
–
–
300 nA typ. at no load
100 μA typ. at 200 mA load
SOT323-5L
•
•
•
•
•
•
•
•
•
Controlled Iq in dropout conditions
Very low-dropout voltage: 160 mV at 200 mA
Output voltage accuracy: 2% at room temperature, 3% in full temperature range
Output voltage versions: from 0.8 V to 4.5 V, with 50 mV step and adjustable
Logic-controlled electronic shutdown
Output discharge feature (optional)
Internal overcurrent and thermal protections
Temperature range: from -40 °C to +125 °C
Packages: DFN6-2x2, SOT323-5L, Flip-Chip4
Applications
•
•
•
•
•
Smartphones/tablets
Image sensors
Wearable accessories
Healthcare devices
Metering
Maturity status link
STLQ020
Description
The STLQ020 is a 200 mA low-dropout voltage regulator, able to work with an input
voltage ranging from 2 V to 5.5 V.
The typical dropout voltage at maximum load is 160 mV.
The ultra-low quiescent current, which is just 0.3 μA at no load, extends battery-life of
applications requiring very long standby time.
Even though the device intrinsic consumption is ultra-low, STLQ020 is able to provide
fast transient response and good PSRR performance, thanks to its adaptive biasing
circuit.
Enable pin puts the STLQ020 in shutdown mode, reducing total current consumption
to 5 nA.
The STLQ020 is designed to keep the quiescent current under control and at a low
value also during dropout operation, helping to extend even more the operating time
of battery- powered devices.
It also includes short-circuit constant-current limiting and thermal protection.
Several small package options are available.
DS12072 - Rev 3 - June 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
STLQ020
Block diagram
1
Block diagram
Figure 1. Block diagram (fixed version)
Figure 2. Block diagram (adjustable version)
VIN
VOUT
Bias
generator
OPAMP
EN
Enable
Thermal
protection
ADJ
Bandgap
reference
*
GND
Note:
(*) output discharge function is optional.
DS12072 - Rev 3
page 2/31
STLQ020
Pin configuration
2
Pin configuration
Figure 3. Pin configuration
Table 1. Pin description
Symbol
SOT323-5L
DFN6-2x2
Flip-Chip4
Description
V
1
5
2
6
1
3
A1
A2
B2
LDO supply voltage
LDO output voltage
Ground
IN
V
OUT
GND
Enable input: set V = high to turn on the device;
EN
EN
3
4
4
2
B1
-
V
= low to turn off the device. Not internally
EN
pulled-up, don’t leave floating.
Adjustable pin (only on ADJ version). Connect to
external resistor divider. Not connected on the
fixed version
NC/ADJ
NC
Not internally connected: it can be connected to
GND
-
-
5
-
-
Exposed
pad
Exposed pad
Must be connected to GND
DS12072 - Rev 3
page 3/31
STLQ020
Typical application diagram
3
Typical application diagram
Figure 4. Typical application diagram (fixed version)
VIN
VOUT
VI
VO
ON
STLQ020
EN
OFF
CIn
COut
1µF
1µF
GND
AMG270320170900MT
Figure 5. Typical application diagram (adjustable version)
VIN
VOUT
VI
VO
STLQ020
R1
R2
CIn
COut
ON
EN
ADJ
OFF
1µF
1µF
GND
Adjustable version
AMG270320170901MT
Note:
R1 and R2 are calculated according to the following formula: R1 = R2 x (VOUT / VADJ - 1).
DS12072 - Rev 3
page 4/31
STLQ020
Maximum ratings
4
Maximum ratings
Table 2. Absolute maximum ratings
Parameter
Symbol
Value
Unit
V
V
Input supply voltage
Output voltage
-0.3 to 7
IN
V
-0.3 to V + 0.3
V
OUT
IN
V
I
Adjustable pin voltage
Output current
-0.3 to 2
V
ADJ
Internally limited
A
OUT
-0.3 to V + 0.3
EN
Enable pin voltage
V
IN
P
Power dissipation
Internally limited
±500
W
D
Charged device model
Human body model
ESD
V
±2000
T
Operating junction temperature
Maximum junction temperature
Storage temperature
-40 to 125
°C
°C
°C
J-OP
T
150
J-MAX
T
-55 to 150
STG
Table 3. Thermal data
Symbol
Parameter
DFN6-2x2
Flip-Chip4
SOT323-5L
Unit
°C/W
°C/W
R
thjc
Thermal resistance, junction-to-case
Thermal resistance, junction-to-ambient
15
65
130
250
R
thja
180
DS12072 - Rev 3
page 5/31
STLQ020
Electrical characteristics
5
Electrical characteristics
TJ = 25 °C, VIN = VOUT + 0.5 V or 2 V, whichever is greater; VEN = VIN; CIN = 1 μF; COUT = 1 μF; IOUT = 1 mA.
Table 4. Electrical characteristics (fixed version)
Symbol
Parameter
Test conditions
Min.
2
Typ.
Max.
5.5
2
Unit
V
Operating input voltage range
V
IN
T = 25 °C
-2
J
V
Output voltage accuracy
Static line regulation
Static load regulation
%
OUT
-40 °C < T < 125 °C
-3
3
J
V
OUT
+ 0.5 V < V < 5.5 V (1)
IN
0.005
∆V
∆
/
/
OUT%
%/V
VIN
-40 °C < T < 125 °C
0.05
J
1 mA < I
< 0.2 A; T = 25 °C
J
0.0015
OUT
∆V
∆
OUT%
%/mA
IOUT
-40 °C < T < 125 °C
0.005
J
V
OUT
V
OUT
= 2.5 V; I
= 2.5 V; I
= 0.2 A
160
15
mV
mV
OUT
OUT
Dropout voltage(2)
V
DROP
= 20 mA
µV
/
RMS
eN
Output noise voltage
f = 10 Hz to 100 kHz
= 2.5 V; V
135
52
V
OUT
V
= 0.2 Vpp
RIPPLE
OUT
I
= 10 mA; f = 100 Hz
OUT
V
OUT
= 2.5 V; V
= 0.2 Vpp
RIPPLE
SVR
Supply voltage rejection
35
dB
I
= 10 mA ; f = 1 kHz
OUT
V
= 2.5 V; V
= 0.2 Vpp
OUT
RIPPLE
45
I
I
I
I
I
= 10 mA; f = 10 kHz
= 0 A
OUT
OUT
OUT
OUT
OUT
300
nA
µA
= 0 A; -40 °C < T < 125 °C
1000
J
Quiescent current
= 0.2 A
I
100
q
= 0.2 A; -40 °C < T < 125 °C
150
J
V
V
V
= 0 V, V = V
+ 0.5 V (3)
OUT
Shutdown current
0.005
380
0.05
µA
mA
Ω
EN
IN
I
= 0 V
OUT
Short-circuit current
SC
(4)
= 0 V
R
Output discharge resistance
Enable input logic low
100
EN
LOW
0.4
V
-40 °C < T < 125 °C
J
V
EN
Enable input logic high
Enable pin input current
1.2
I
V
I
= V ; 1.25 < V < 6.0 V
1
nA
°C
EN
EN
IN
IN
Thermal shutdown(5)
Hysteresis
> 1 mA
160
20
OUT
T
SHDN
1.
2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value.
3. = V + 0.5 V or 2 V, whichever is greater.
V
= V
+ 0.5 V or 2 V, whichever is greater.
IN
OUT
V
IN
OUT
4. On specific version only.
5. The thermal protection is not active when the load current is lower than 1 mA.
DS12072 - Rev 3
page 6/31
STLQ020
Electrical characteristics
TJ = 25 °C, VIN = 2 V, VEN = VIN; CIN = 1 μF; COUT = 1 μF; IOUT = 1 mA.
Table 5. Electrical characteristics (adjustable version)
Symbol
Parameter
Test conditions
Min.
2
Typ.
Max.
5.5
Unit
V
V
Operating input voltage range
IN
T = 25 °C
0.784
-3
0.8
0.816
3
V
J
V
Reference voltage accuracy
Adjustable pin current
Static line regulation
ADJ
-40 °C < T < 125 °C
%
J
I
1
nA
ADJ
2 V< V < 5.5 V
0.005
IN
∆V
/∆
%/V
ADJ% VIN
-40 °C < T < 125 °C
0.05
J
1 mA < I
< 0.2 A; T = 25 °C
J
0.0015
OUT
∆V
/∆I
Static load regulation
%/mA
ADJ% OUT
-40 °C < T < 125 °C
0.005
J
V
OUT
V
OUT
= 2.0 V; I
= 2.0 V; I
= 0.2 A
200
20
mV
mV
OUT
OUT
Dropout voltage(1)
V
DROP
= 20 mA
µV
/
RMS
eN
Output noise voltage
f = 10 Hz to 100 kHz
= 2.5 V; V
135
60
V
OUT
V
= 0.2 Vpp
RIPPLE
OUT
I
= 10 mA; f = 100 Hz
OUT
V
= 2.5 V; V
= 10 mA ; f = 1 kHz
= 0.2 Vpp
OUT
RIPPLE
SVR
Supply voltage rejection
40
dB
I
OUT
V
= 2.5 V; V
= 10 mA; f = 10 kHz
= 0.2 Vpp
OUT
RIPPLE
60
I
I
I
I
I
OUT
OUT
OUT
OUT
OUT
= 0 A
300
nA
µA
= 0 A; -40 °C < T < 125 °C
1000
J
Quiescent current
= 0.2 A
80
I
q
= 0.2 A; -40 °C < T < 125
J
150
°C
V
= 0 V, V = 2 V
Shutdown current
0.005
380
0.05
µA
mA
Ω
EN
IN
I
V
V
= 0 V
OUT
Short-circuit current
SC
(2)
= 0 V
R
LOW
Output discharge resistance
Enable input logic low
100
EN
0.4
V
-40 °C < T < 125 °C
J
V
EN
Enable input logic high
Enable pin input current
1.2
I
V
I
= V ; 1.25 < V < 5.5 V
1
nA
°C
EN
EN
IN
IN
Thermal shutdown(3)
Hysteresis
> 1 mA
160
20
OUT
T
SHDN
1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value.
2. The thermal protection is not active when the load current is lower than 1 mA.
3. On specific version only.
DS12072 - Rev 3
page 7/31
STLQ020
Typical characteristics
6
Typical characteristics
The following plots are referred to the typical application circuit and, unless otherwise noted, at TA = 25 °C.
Figure 6. Output voltage vs. temperature
Figure 7. Output voltage vs. temperature
VIN = 2 V, VOUT = VADJ, IOUT = 1 mA
VIN = 2 V, VOUT = VADJ, IOUT = 200 mA
0.820
0.815
0.810
0.805
0.800
0.795
0.790
0.785
0.780
0.820
0.815
0.810
0.805
0.800
0.795
0.790
0.785
0.780
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
Figure 8. Output voltage vs. temperature
Figure 9. Output voltage vs. temperature
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 1 mA
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 200 mA
1.850
1.840
1.830
1.820
1.810
1.800
1.790
1.780
1.770
1.760
1.750
1.850
1.840
1.830
1.820
1.810
1.800
1.790
1.780
1.770
1.760
1.750
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
DS12072 - Rev 3
page 8/31
STLQ020
Typical characteristics
Figure 10. Line regulation vs. temperature
Figure 11. Load regulation vs. temperature
VIN = 2.3 V to 5.5 V, VOUT = V
IOUT = 1 mA
VIN = 2.3 V , VOUT = 1.8 V, IOUT = 1 mA to 200 mA
ADJ,
0.005
0.004
0.003
0.002
0.001
0.000
-0.001
-0.002
-0.003
-0.004
-0.005
0.050
0.040
0.030
0.020
0.010
0.000
-0.010
-0.020
-0.030
-0.040
-0.050
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
Figure 12. Short-circuit current vs. temp.
Figure 13. Quiescent current vs. temperature
VIN = 2 V, VOUT = GND
VIN = 2 V, VOUT = VADJ , IOUT = 0 mA
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
Figure 14. Quiescent current vs. temperature
Figure 15. Shutdown current vs. temperature
VIN = 2 V, VOUT = VADJ, IOUT = 200 mA
VIN = 5.5 V, EN = GND
160
0.2
0.18
0.16
0.14
0.12
0.1
140
120
100
80
0.08
0.06
0.04
0.02
0
60
40
20
0
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
DS12072 - Rev 3
page 9/31
STLQ020
Typical characteristics
Figure 17. Quiescent current vs. load current
(magnification)
Figure 16. Quiescent current vs. load current
VIN = 2 V, VOUT = VADJ, IOUT = 0 to 200 mA
VIN = 2 V, VOUT = VADJ, IOUT = 0 to 1 mA
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
11.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0
20
40
60
80
100
120
140
160
180
200
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
IOUT [mA]
IOUT [mA]
Figure 18. Quiescent current vs. input voltage
Figure 19. Output voltage vs. input voltage
VIN = 0 to 5.5 V, VOUT = 2.5 V, IOUT = 0 mA
VIN = 0 to 5.5 V, VOUT = 2.5 V, IOUT = 0 mA
1.8
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Input Voltage [V]
V
[V]
IN
Figure 20. Enable pin current vs. temperature
Figure 21. Dropout voltage vs. temperature
VIN = 2 V
VOUT = 2 V, IOUT = 20 mA
100
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
DS12072 - Rev 3
page 10/31
STLQ020
Typical characteristics
Figure 22. Dropout voltage vs. temperature
Figure 23. Enable threshold vs. temperature
VOUT = 2 V, IOUT = 200 mA
1200
500
400
300
200
100
0
1100
1000
900
800
700
600
500
400
VEN-ON
VEN-OFF
-60
-40
-20
0
20
40
60
80
100
120
140
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature [ºC]
Temperature [ºC]
Figure 25. Line transient (trise = 5 µs)
Figure 24. PSRR vs. frequency
IOUT = 10 mA
100
90
80
70
60
50
40
30
20
10
0
Vout=0.8V
Vout=1.8V
10
100
1000
10000
100000
f [Hz]
Figure 26. Line transient (trise = 1 µs)
Figure 27. Line transient
DS12072 - Rev 3
page 11/31
STLQ020
Typical characteristics
Figure 29. Load transient (trise = 5 µs)
Figure 28. Load transient
Figure 30. Load transient (VOUT = 1.8 V)
Figure 31. Load transient (VOUT = VADJ)
Figure 33. Startup transient (trise = 10 µs)
Figure 32. Startup transient
DS12072 - Rev 3
page 12/31
STLQ020
Application information
7
Application information
7.1
External capacitors
The STLQ020 voltage regulator requires external low ESR capacitors to assure the control loop stability. These
capacitors must be selected to meet the requirements of minimum capacitance and equivalent series resistance
defined in the following chapters. Input and output capacitors should be located as close as possible to the
relevant pins.
Input capacitor
An input capacitor, with a minimum value of 1 μF, must be located as close as possible to the input pin of the
device and returned to a clean analog ground. A good quality, low-ESR ceramic capacitor is suggested. It helps to
ensure stability of the control loop, reduces the effects of inductive sources and improves ripple rejection.
Capacitance higher than 1 µF can be chosen in case of fast load transients in application.
Output capacitor
STLQ020 requires a low-ESR capacitor connected on its output, to keep the control loop stable and reduce the
risk of ringing and oscillations. The control loop is designed to be stable with any good quality ceramic capacitor
(such as X5R/X7R types) with a minimum value of 1 µF and equivalent series resistance in the [3 – 500 mΩ]
range. It is important to highlight that the output capacitor must maintain its capacitance and ESR in the stable
region over the full operating temperature, load and input voltage ranges, to assure stability. Therefore,
capacitance and ESR variations must be taken into account in the design phase to ensure the device works in the
expected stability region. There is no maximum limit to the output capacitance, provided that the above conditions
are respected.
7.2
Output voltage adjustment (adjustable version)
In the adjustable version, available on the DFN6-2x2 and SOT323-5L packages, the output voltage can be
adjusted to any voltage, starting from 0.8 V (VADJ) up to the input voltage minus the voltage drop (VDROP) across
the internal power pass element, by connecting a resistor divider between the ADJ pin and the output, allowing
the remote voltage sensing.
The resistor divider should be selected using the following equation:
Equation 1
VOUT = VADJ (1 + R1 / R2)
with VADJ = 0.8 V (typ.) and VOUT < VIN-VDROP(MAX)
For best accuracy and stability the resistor divider should be designed in order to allow that a current of at least
500 nA flows across it. The current flowing into the ADJ pin is typically less than 1 nA, therefore causing negligible
change in final the output voltage.
7.3
Enable pin operation
This is a logic control pin, CMOS level-compatible, which can be used to turn On/Off the regulator.It is active high,
so when it is pulled down, the device enters the shutdown mode, drastically reducing the current consumption, to
less just few nA.
Since it is not internally pulled-up, when the enable feature is not used, this pin must not be left floating. It can be
tied to VIN to keep the regulator output in ON state all the time.
To assure reliable operation, the signal source used to drive the EN pin, must be able to swing above and below
the specified thresholds listed in the electrical characteristics table (VEN).
7.4
Power dissipation
A proper PCB design is recommended, to ensure that the device internal junction temperature is kept below
125°C, in all the operating condition.
Depending on the package option, the thermal energy generated by the device flows from the die surface to the
PCB copper area through the package leads, solder bumps and/or exposed pad.
DS12072 - Rev 3
page 13/31
STLQ020
Protection features
The PCB copper area acts as a heat sink. The footprint copper pads should be as wider as possible to spread
and dissipate the heat to the surrounding environment. Thermal vias to the inner or backside copper layers
improve the overall thermal performance of the device.
The power dissipation of the LDO depends on the input voltage, output voltage and output current, and is given
by:
Equation 2
PD = (VIN -VOUT) IOUT
The junction temperature of the device is:
Equation 3
TJ_MAX = TA + RthJA x PD
where: TJ_MAX is the maximum junction of the die, 125 °C; TA is the ambient temperature; RthJA is the thermal
resistance junction-to-ambient.
With the above equation it is possible to calculate the maximum allowable power dissipation, therefore the
maximum load current for a certain voltage drop. Appropriate de-rating of the operating condition can be applied
accordingly.
7.5
Protection features
Current limit
The STLQ020 embeds a constant-current limit circuit, which acts in case of overload or short-circuit on the output,
clamping the load current to a safe value (typ. 380 mA).
Normal operation is restored if the overload disappears, but prolonged operation in current limit may lead to high
power dissipation inside the LDO and subsequently to thermal shutdown.
Thermal protection
An internal thermal feedback loop disables the output voltage if the die temperature reaches approximately
160 °C. This feature protects the device from excessive temperature that could lead to permanent damage to the
LDO.
Once the thermal protection is triggered and the device is shut down, normal operation is automatically recovered
if the die temperature falls below 140 °C (thermal protection hysteresis of 20 °C typically)
Important note: to keep the device power consumption below 500 nA in low load/no load condition, the internal
thermal protection is kept disabled for load current below 1 mA.
Current and thermal limit protections are designed to protect the LDO from excessive power dissipation and not
intended to replace a proper thermal and electrical design of the application.
Continuous operation above the maximum ratings may lead to permanent damage to the device.
DS12072 - Rev 3
page 14/31
STLQ020
Package information
8
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
8.1
SOT323-5L package information
Figure 34. SOT323-5L package outline
7091413_G
DS12072 - Rev 3
page 15/31
STLQ020
SOT323-5L package information
Table 6. SOT323-5L package mechanical data
mm
Dim.
Min.
0.80
0
Typ.
Max.
1.10
0.10
1
A
A1
A2
b
0.80
0.15
0.10
1.80
1.80
1.15
0.90
0.30
0.22
2.20
2.40
1.35
c
D
2
E
2.10
1.25
0.65
1.30
0.36
E1
e
e1
L
0.26
0°
0.46
8°
<
Figure 35. SOT323-5L recommended footprint
DS12072 - Rev 3
page 16/31
STLQ020
SOT323-5L package information
8.1.1
SOT323-5L tape and reel information
Figure 36. SOT323-5L tape outline
DS12072 - Rev 3
page 17/31
STLQ020
SOT323-5L package information
Figure 37. SOT323-5L reel outline
DS12072 - Rev 3
page 18/31
STLQ020
Flip-Chip4 package information
8.2
Flip-Chip4 package information
Figure 38. Flip-Chip4 package outline
Table 7. Flip-Chip4 mechanical data
mm
Dim.
Min.
0.51
0.17
0.34
0.23
0.743
Typ.
0.56
0.20
0.36
0.26
0.773
0.40
0.773
0.40
0.20
0.20
0.187
0.075
Max.
0.61
0.23
0.38
0.29
0.803
A
A1
A2
b
D
D1
E
0.743
0.803
E1
SD
SE
f
ccc
DS12072 - Rev 3
page 19/31
STLQ020
Flip-Chip4 package information
Figure 39. Flip-Chip4 recommended footprint
DS12072 - Rev 3
page 20/31
STLQ020
Flip-Chip4 package information
8.2.1
Flip-Chip4 reel information
Figure 40. Flip-Chip4 reel outline
DS12072 - Rev 3
page 21/31
STLQ020
Flip-Chip4 package information
Figure 41. Flip-Chip4 tape outline
DS12072 - Rev 3
page 22/31
STLQ020
DFN6 2x2 package information
8.3
DFN6 2x2 package information
Figure 42. DFN6 2x2 package outline
Bottom view
Side view
Top view
DM00205706
DS12072 - Rev 3
page 23/31
STLQ020
DFN6 2x2 package information
Table 8. DFN6 2x2 package mechanical data
mm
Dim.
Min.
0.75
0.00
0.10
0.18
1.90
1.33
0.68
Typ.
0.85
0.02
0.20
0.23
2.00
1.43
0.78
0.50
2.00
0.35
6
Max.
0.95
0.05
0.30
0.28
2.10
1.53
0.88
A
A1
A3
b
D
D2
E2
e
E
1.90
0.25
2.10
0.45
L
N
Figure 43. DFN6 2x2 recommended footprint
DS12072 - Rev 3
page 24/31
STLQ020
DFN6 2x2 package information
8.3.1
DFN6 2x2 tape information
Figure 44. DFN6 2x2 tape outline
DS12072 - Rev 3
page 25/31
STLQ020
Ordering information
9
Ordering information
Table 9. Order codes
Order code
STLQ020C18R
STLQ020C22R
STLQ020C28R
STLQ020C33R
STLQ020J18R
STLQ020J25R
STLQ020J30R
STLQ020J33R
STLQ020PU19R
STLQ020PU28R
STLQ020PUR
Package
Output voltage
1.8 V
Marking
QLJ
QLS
QM3
QMB
LJ
Packing
SOT323-5L
SOT323-5L
SOT323-5L
SOT323-5L
Flip-Chip 4
Flip-Chip 4
Flip-Chip 4
Flip-Chip 4
DFN6-2x2
DFN6-2x2
DFN6-2x2
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
2.2 V
2.8 V
3.3 V
1.8 V
2.5 V
LX
3.0 V
M7
3.3 V
MB
1.9 V
QLL
QM3
QAD
2.8 V
ADJ
Figure 45. Marking composition (flip-chip)
A1
xy
DS12072 - Rev 3
page 26/31
STLQ020
Revision history
Table 10. Document revision history
Date
Revision
Changes
27-Mar-2017
05-Dec-2017
1
2
Initial release.
Added: Section 6 Typical characteristics and Section 7 Application information.
Added: order codes Table 9. Order codes and reel information Section
8.1.1 SOT323-5L tape and reel information, Section 8.2.1 Flip-Chip4 reel
information and Section 8.3.1 DFN6 2x2 tape information.
07-Jun-2019
3
DS12072 - Rev 3
page 27/31
STLQ020
Contents
Contents
1
2
3
4
5
6
7
Block diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Typical application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Typical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Application information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
7.1
7.2
7.3
7.4
7.5
External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Output voltage adjustment (adjustable version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Enable pin operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
8
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.1
8.2
8.3
SOT323-5L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.1.1
SOT323-5L tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Flip-Chip4 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
8.2.1
Flip-Chip4 reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DFN6 2x2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
8.3.1
DFN6 2x2 reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
DS12072 - Rev 3
page 28/31
STLQ020
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics (fixed version). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics (adjustable version). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SOT323-5L package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Flip-Chip4 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DFN6 2x2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 10. Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DS12072 - Rev 3
page 29/31
STLQ020
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Block diagram (fixed version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram (adjustable version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Typical application diagram (fixed version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical application diagram (adjustable version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Output voltage vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Output voltage vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Output voltage vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Output voltage vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Line regulation vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Load regulation vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Short-circuit current vs. temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Quiescent current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Quiescent current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Shutdown current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Quiescent current vs. load current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Quiescent current vs. load current (magnification) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Quiescent current vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Output voltage vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Enable pin current vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Dropout voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Dropout voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Enable threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRR vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Line transient (trise = 5 µs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Line transient (trise = 1 µs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Line transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Load transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Load transient (trise = 5 µs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Load transient (VOUT = 1.8 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Load transient (VOUT = VADJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Startup transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Startup transient (trise = 10 µs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SOT323-5L package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SOT323-5L recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SOT323-5L tape outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SOT323-5L reel outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flip-Chip4 package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Flip-Chip4 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Flip-Chip4 reel outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Flip-Chip4 tape outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DFN6 2x2 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DFN6 2x2 recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DFN6 2x2 tape outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Marking composition (flip-chip) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
DS12072 - Rev 3
page 30/31
STLQ020
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS12072 - Rev 3
page 31/31
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STLQ50M25R
2.5V FIXED POSITIVE LDO REGULATOR, PDSO5, ROHS COMPLIANT, SOT-23, 5 PINWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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STMICROELECTR
STLQ50M33R
3.3V FIXED POSITIVE LDO REGULATOR, PDSO5, ROHS COMPLIANT, SOT-23, 5 PINWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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STMICROELECTR
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