STLVDS32B [STMICROELECTRONICS]
High speed differential line receivers; 高速差分线路接收机
| 型号： | STLVDS32B |
| 厂家： | 
ST |
| 描述： | High speed differential line receivers |
| 文件： | 总17页 (文件大小：696K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STLVDS32B
High speed differential line receivers
Features
■ Meets or exceeds the requirements of ansi
TIA/EIA-644 standard
■ Operates with a single 3.3 V supply
■ Designed for signaling rate up to 400 Mbps
■ Differential input thresholds 100 mV max
■ Typical propagation delay time of 2.5 ns
■ Power dissipation 60 mW typical per receiver
SOP
TSSOP
at 200 MHz
■ Low voltage TTL (LVTTL) logic output levels
■ Pin compatible with the AM26LS32,
SN65LVD32
■ Open circuit fail safe
■ ESD protection:
input common mode voltage allows 1 V of ground
potential difference between two LVDS nodes.
■ 7 kV receiver pins
■ 3 kV all pins vs gnd
The intended application of this device and
signalling technique is both point-to-point and
multidrop data transmission over controlled
impedance media approximately 100 Ω. The
transmission media may be printed circuit board
traces, backplanes or cables. The ultimate rate
and distance of data transfer depend upon the
attenuation characteristics of the media and noise
coupling to the environment.
Description
The STLVDS32 is a differential line receiver that
implements the electrical characteristics of low
voltage differential signaling (LVDS). This
signaling technique lowers the output voltage
levels of 5 V differential standard levels (such as
TIA/EIA-422B) to reduce the power, increase the
switching speeds and allow operations with a
3.3 V supply rail. This differential receiver
The STLVDS32 version is characterized for
operation from -55°C to 125°C.
provides a valid logical output state with a 3.3 V
supply rail. It also provides a valid logical output
state with a 100 mV differential input voltage
within the input common mode voltage range. The
Table 1.
Device summary
Temperature
Order code
Package
Packaging
range
STLVDS32BDR
STLVDS32BTR
-55 to 125 °C
-55 to 125 °C
SO16 (Tape & reel)
2500 parts per reel
2500 parts per reel
TSSOP16 (Tape & reel)
August 2007
Rev. 13
1/17
www.st.com
17
STLVDS32B
Contents
1
2
3
4
5
6
7
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
STLVDS32B
1
Pin configuration
Pin configuration
Figure 1.
Pin connections and functional diagram
Table 2.
Pin description
Pin n°
2, 6, 10, 14
Symbol
Name and function
1A to 4A
1B to 4B
1Y to 4Y
G
Receiver inputs
1, 7, 9, 15
Negated receiver inputs
Receiver outputs
Enable
3, 5, 11, 13
4
12
8
G
Enable
GND
Ground
16
VCC
Supply voltage
3/17
Pin configuration
STLVDS32B
Figure 2.
Logic diagram and logic symbol
Table 3.
Truth table
Differential inputs
Enables
Outputs
Y
A, B
G
G
H
X
H
X
H
X
L
X
L
H
H
?
VID ≥ 100mV
X
L
-100mV < VID < 100mV
?
X
L
L
VID ≤-100mV
L
X
H
X
L
Z
H
H
H
X
OPEN
L=Low level, H=High Level, X=Don’t care, Z= High Impedance
4/17
STLVDS32B
Maximum ratings
2
Maximum ratings
Table 4.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VCC
VI
Supply voltage (1)
-0.5 to 4.6
V
Input voltage
-0.5 to (VCC + 0.5)
V
V
VI
Input voltage (A or B inputs)
-0.5 to 4.6
Pins receivers
All pins vs gnd
7
ESD
Human body model
kV
°C
3
Tstg
Storage temperature range
-65 to +150
1. All voltages except differential I/O bus voltage, are with respect to the network ground terminal.
Note:
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these condition is not implied.
Table 5.
Symbol
Recommended operating conditions
Parameter
Min.
Typ.
Max.
Unit
VCC
VIH
Supply voltage
3.0
2.0
3.3
3.6
V
V
V
V
HIGH level input voltage (ENABLE)
LOW level input voltage (ENABLE)
Magnitude of differential input voltage
VIL
0.8
0.6
|VID|
0.1
0.5|VID|
2.4-0.5|VID|
VCC - 0.8
85
VIC
TA
Common mode input voltage
Operating temperature range
V
-40
°C
5/17
Electrical characteristics
STLVDS32B
3
Electrical characteristics
Table 6.
Electrical characteristics
(Over recommended operating conditions unless otherwise noted. All typical values are at
T = 25°C, and V = 3.3 V).
A
CC
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Positive going differential input voltage
threshold
VITH+
100
mV
mV
Negative going differential input
voltage threshold
VITH-
-100
I
OH = -8 mA
2.4
2.8
VOH
VOL
ICC
High level output voltage
Low level output voltage
Supply current
V
IOH = -4 mA
IOH = 8 mA
Enabled, No Load
Disabled
0.4
18
V
10
0.25
-10
-3
mA
mA
0.5
-20
VI = 0 V
-2
II
Input current (A or B inputs)
µA
VI = 2.4 V
-1.2
II(OFF)
ICS
Power off input current (A or B inputs) VCC = 0, VI = 3.6 V
10
20
20
µA
µA
Cold spare leakage current
VI = 3.6 V, VDD = 0 V
IH = 2 V
High level input current (EN, G, G or
inputs)
IIH
V
10
µA
Low level input current (EN, G, G or
inputs)
IIL
VIL = 0.8 V
10
10
µA
µA
IOZ
High impedance output current
VO = 0 or VCC
6/17
STLVDS32B
Electrical characteristics
Table 7.
Switching characteristics
(Over recommended operating conditions unless otherwise noted. All typical values are at
T = 25°C, and V = 3.3 V).
A
CC
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Propagation delay time, low to
high output
tPLH
1.5
2.5
3.3
ns
Propagation delay time, high to
low output
tPHL
1.5
2.5
3.3
ns
tr
tf
Output signal rise time
Output signal fall time
0.4
0.4
ns
ns
CL = 10 pF, Figure 3.
Channel to channel output skew
(Note: 1)
tsk(O)
0.1
0.2
0.3
ns
tsk(P)
Pulse skew (|tPHL - tPLH|) (Note 2)
Part to part skew (Note 3)
0.4
1
ns
ns
tsk(PP)
Propagation delay time, high
impedance to high level output
tPZH
tPZL
tPHZ
tPLZ
3
5
5
5
12
12
12
12
ns
ns
ns
ns
Propagation delay time, high
impedance to low level output
Figure 4.
Propagation delay time, high level
to high impedance output
Propagation delay time, low level
to high impedance output
Note:
1
t
is the maximum delay time difference between the propagation delay of one channel
sk(O)
and that of the others on the same chip with any event on the inputs.
t is the magnitude difference in differential propagation delay time between the positive
sk(P)
going edge and the negative going edge of the same channel.
2
3
t
is the differential channel-to-channel skew of any event between devices. This
sk(PP)
specification applies to devices at the same V , and within 5°C of each other within the
CC
operating temperature range
7/17
Typical characteristics
STLVDS32B
4
Typical characteristics
Figure 3.
Timing test and waveforms
Note:
Note:
A: All input pulse are supplied by a generator having the following characteristics:
t or t ≤1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 0.2 ns.
r
f
B: C includes instrumentation and fixture capacitance within 6 mm of the D.U.T.
L
8/17
STLVDS32B
Figure 4.
Typical characteristics
Enable and disable time test circuit and waveform
Note:
Note:
A: All input pulse are supplied by a generator having the following characteristics:
t or t ≤1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 0.2 ns.
r
f
B: C includes instrumentation and fixture capacitance within 6 mm of the D.U.T.
L
9/17
Typical performance characteristics
STLVDS32B
5
Typical performance characteristics
(Unless otherwise specified T = 25°C)
J
Figure 5.
Output current vs output voltage
Figure 6.
Output current vs output voltage
10/17
STLVDS32B
Package mechanical data
6
Package mechanical data
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
11/17
Package mechanical data
STLVDS32B
SO-16 mechanical data
mm.
inch.
Typ.
Dim.
Min.
Typ.
Max.
1.75
0.25
1.64
0.46
0.25
Min.
Max.
0.068
0.010
0.063
0.018
0.010
A
a1
a2
b
0.1
0.004
0.35
0.19
0.013
b1
C
0.007
0.5
0.019
c1
D
45° (typ.)
9.8
5.8
10
0.385
0.228
0.393
E
6.2
0.244
e
1.27
0.050
e3
F
8.89
0.350
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.024
G
L
1.27
0.62
M
S
8° (max.)
0016020D
12/17
STLVDS32B
Package mechanical data
TSSOP16 mechanical data
mm.
inch.
Dim.
Min.
Typ.
Max.
1.2
Min.
Typ.
Max.
0.047
0.006
0.041
0.012
0.0079
0.201
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
5.1
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
1
0.039
0.19
0.09
4.9
c
D
5
6.4
0.197
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0°
8°
0°
8°
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
c
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
13/17
Package mechanical data
STLVDS32B
Tape & reel SO-16 mechanical data
mm.
inch.
Typ.
Dim.
Min.
Typ.
Max.
330
Min.
Max.
12.992
0.519
A
C
D
12.8
20.2
60
13.2
0.504
0.795
2.362
N
T
22.4
6.65
10.5
2.3
0.882
0.262
0.414
0.090
0.161
0.319
Ao
Bo
Ko
Po
P
6.45
10.3
2.1
0.254
0.406
0.082
0.153
0.311
3.9
4.1
7.9
8.1
14/17
STLVDS32B
Package mechanical data
Tape & reel TSSOP16 mechanical data
mm.
inch.
Typ.
Dim.
Min.
Typ.
Max.
330
Min.
Max.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
6.9
5.5
1.8
4.1
8.1
0.882
0.272
0.217
0.071
0.161
0.319
Ao
Bo
Ko
Po
P
6.7
5.3
1.6
3.9
7.9
0.264
0.209
0.063
0.153
0.311
15/17
Revision history
STLVDS32B
7
Revision history
Table 8.
Revision history
Revision
Date
Changes
07-Jul-2004
05-Dec-2005
28-Mar-2006
20-Mar-2007
28-Aug-2007
9
tr and tf description changed in table 6 - pag 7.
10
11
12
13
Temperature Range has been changed in cover page, add ICS on table 5.
Order code updated and new template.
Title in cover page updated.
Added Table 1. in cover page.
16/17
STLVDS32B
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