STOD1317BTPUR [STMICROELECTRONICS]
Very high efficiency at light load thanks to pulse skipping operation;
| 型号： | STOD1317BTPUR |
| 厂家： | 
ST |
| 描述： | Very high efficiency at light load thanks to pulse skipping operation |
| 文件： | 总22页 (文件大小：907K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STOD1317B
170 mA 13 V, high efficiency
boost converter + LDO
Datasheet - production data
Description
The STOD1317B is a fixed frequency, high
efficiency, boost DC-DC converter with cascaded
LDO able to provide output voltages ranging from
6 V to 13 V starting with an input voltage from
2.6 V to 4.8 V. The device is designed to supply
loads that are very sensitive to output ripple such
as AMOLED display panels. A dedicated LDO is
able to suppress any ripple and noise coming out
from the DC-DC converter. The LDO works with a
constant drop in order to maintain high efficiency
DFN12L (3 x 3 mm)
in the whole operating range. The low R
N-
DSon
channel and P-channel MOSFET switches are
integrated and contribute to achieving high
efficiency. The true-shutdown feature allows
physical disconnection of the battery from the
load when the device is in shutdown mode. The
control technique is able to maintain efficiency
higher than 85% at light loads and higher than
80% at full load. The device includes soft-start
control, inrush current limiter, thermal shutdown
and inductor peak current limit. The STOD1317B
is packaged in DFN12L (3 x 3 x 0.8 mm) height.
Features
Operating input voltage range from 2.6 V to
4.8 V
±1% output voltage tolerance
Low output ripple
True-shutdown
Short-circuit protection
Digital low power function
Very high efficiency at light load thanks to pulse
skipping operation
Very fast line and load transients
1.2 MHz switching frequency
1 µA max. quiescent current
DFN12L (3 x 3 x 0.8 mm)
Applications
Single rail AMOLED display
Cellular phones
Battery powered equipment
Table 1. Device summary
Order code
Marking
1317B
Package
Packaging
STOD1317BTPUR
DFN12L (3 x 3 mm)
3000 parts per reel
April 2013
DocID022607 Rev 2
1/22
This is information on a product in full production.
www.st.com
22
Contents
STOD1317B
Contents
1
2
3
4
5
6
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1
BOOST multiple mode of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
6.1.1
6.1.2
6.1.3
Pulse skipping operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Discontinuous conduction mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Continuous conduction mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2
6.3
6.4
6.5
6.6
Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Soft-start and inrush current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Digital low power function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1
External passive components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.1
7.1.2
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2
Recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22
DocID022607 Rev 2
STOD1317B
Schematic
1
Schematic
Figure 1. Application schematic
Table 2. Typical external components
Comp. Manufacturer
Part number
Value
Ratings
Size
MURATA
GRM219R61A106KE44
LMK212BJ106KD-T
C1608X5R0J106
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 6.3V
0805
0805
0603
CIN
Taiyo Yuden
TDK
10µF
MURATA
TDK
GRM219R61C475KE15
C2012X5R1C475
±10%, X5R, 16V
±10%, X5R, 16V
0805
0805
CMID
4.7µF
4.7µF
MURATA
TDK
GRM219R61C475KE15
C2012X5R1C475
±10%, X5R, 16V
±10%, X5R, 16V
0805
0805
COUT
CoilCraft
TDK
LPS4012-472ML
±20%, curr. 1.7A, resist. 0.175 4.0 x 4.0 x 1.2
±20%, curr. 1.3A, resist. 0.338 2.5 x 2.0 x 1.2
±20%, curr. 0.9A, resist. 0.280 3.1 x 3.1 x 0.8
L (1)
VLS252012T-4R7MR81 4.7µH
PNL3008-4R7M
DASTEK
R1
R2
k
k
0402
0402
1. Inductor used for the typical application conditions. Inductance values ranging from 3.3 µH to 6.8 µH can be used together
with the STOD1317B. A minimum saturation current of 1.2 A must be ensured to support 170 mA at 2.6 V in full range.
Note:
All the above components refer to a typical application. Operation of the device is not limited
to the choice of these external components.
DocID022607 Rev 2
3/22
Schematic
STOD1317B
Figure 2. Block schematic
LX
VMID
SCP
s
s
M1
M2
s
M3
VOUT
PGND
GND
VO_SET
DMD
M0
s
OTA
PGND
+
-
FB
PWM LOGIC CONTROL
SOFT
START
OVP
&
VREF
DRIVER
+
-
OCP
RING
EA
KILLER
COMP
+
-
VIN
+
SHUT
DOWN
OSC
OTP
NC
EN
4/22
DocID022607 Rev 2
STOD1317B
Pin configuration
2
Pin configuration
Figure 3. Pin configuration (top view)
VMID
VOUT
VO_SET
GND
FB
LX
LX
PGND
PGND
VIN
AGND
EN
NC
Table 3. Pin description
Pin name
Pin number
Description
VMID
VOUT
VO_SET
GND
1
2
3
4
5
Step-up output voltage
LDO output voltage
LDO output voltage set
Analog ground
FB
Feedback voltage
Enable pin. Connect this pin to GND or a voltage lower than 0.4V
to shut down the IC. A voltage higher than 1.2V is required to
enable the IC
EN
6
NC
VIN
7
8
Not connected
Supply voltage
PGND
LX
9, 10
11, 12
Power ground
Switch pin. Inductor connection to the internal switches
Exposed
PAD
Internally connected to PGND
DocID022607 Rev 2
5/22
Maximum ratings
STOD1317B
3
Maximum ratings
Table 4. Absolute maximum ratings
Parameter
Symbol
Value
Unit
VIN
LX
Supply voltage
-0.3 to +7.0
-0.3 to +16
16
V
V
Switching node
VOUT_SET
VOUT
EN
LDO output voltage set
Output voltage
V
-0.3 to +16
-0.3 to 4.6
-0.3 to +2.5
±200
V
Logic pin
V
FB
Feedback pin
V
Machine model
V
ESD
Human body model
Operating ambient temperature
Maximum operating junction temperature
Storage temperature
±2000
V
TAMB
TJ
-40 to 85
+150
°C
°C
°C
TSTG
-65 to 150
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 5. Thermal data
Symbol
Parameter
Value
Unit
RthJA
RthJC
Thermal resistance junction-ambient
49.1
°C/W
°C/W
Thermal resistance junction-case (FR-4 PCB)
4.216
6/22
DocID022607 Rev 2
STOD1317B
Electrical characteristics
4
Electrical characteristics
T = 25 °C, V = 3.7 V, V
= 10 V, C = 2 x 10 µF, C
= 2 x 4.7 µF, C
= 2 x 4.7 µF,
OUT
J
IN
OUT
IN
MID
L = 4.7 µH, V = 2 V, unless otherwise specified.
EN
Table 6. Electrical characteristics
Test conditions Min.
Symbol
Parameter
Typ.
Max.
Unit
General section
Operating power input
voltage range
VIN
Iq
2.6
3.7
0.5
4.8
1
V
Shutdown mode,
EN=GND
Shutdown mode
No switching
µA
V
VEN=VIN=3.7V, VFB=1.3V
VIN rising
1
1.5
2.5
mA
2.4
2.2
1.2
2
Undervoltage lockout
threshold
VUVLO
V
VIN falling
2.1
1
fSW
IPK
Switching frequency
1.35
2.4
MHz
A
Switch current limitation
1.6
Output voltage (VOUT
)
VFB
Feedback voltage
Accuracy
TA=25°C
1.08
1.02
6
1.2
1.32
1.38
13
V
V
V
∆VFB
VOUT
-40°C<TA<85°C
Output voltage range
10
30
∆VLINE/LOA Total line/load static
TA=25°C; VIN=2.6V to
4.8V; IOUT=5mA to 170mA
40
30
mV
mV
variation (1)
D
VOUT
VIN=3.7V, VOUT=10V,
IOUT=10mA
Output voltage ripple
RIPPLE
VOVP
ILKFB
Overvoltage protection
FB pin leakage current
VFB=0
14
15
16
1
V
VFB=5V to 13V
µA
Step-up output voltage
regulation
V
0.38
OUT
+
V
0.56
OUT
+
V
0.7
OUT
+
VMID
V
Logic inputs
VIL
VIH
ILK-I
EN low-level input voltage
EN high-level input voltage
EN input leakage current
0.4
1
V
V
1.2
VEN=VIN=4.8V
µA
Power switches
P-Channel ON resistance
ISW_P=100mA
550
250
900
400
1
RDSON
ILKG-LX
mΩ
N-Channel ON resistance
LX leakage current
ISW_N=100mA
VIN=VLX=4.8V; VEN=0
µA
DocID022607 Rev 2
7/22
Electrical characteristics
STOD1317B
Table 6. Electrical characteristics (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
DLP function
VIN=3.7V, VEN=0,
Leakage current from load VOUT=6V (supplied by
external power)
IO_LEAK
0.5
2
µA
1. Not tested in production. This value is guaranteed by correlation with RDSON, peak current limit and operating input voltage.
2. Not tested in production.
8/22
DocID022607 Rev 2
STOD1317B
Typical performance characteristics
5
Typical performance characteristics
T = 25 °C, V = 3.7 V, V
= 10 V, C = 2 x 10 µF, C
= 2 x 4.7 µF, C
= 2 x4.7 µF,
J
IN
OUT
IN
MID
OUT
L = 4.7 µH, V = 2 V, unless otherwise specified.
EN
Figure 4. Quiescent current vs. temperature
Figure 5. Switching frequency vs. temperature
1.35
3
2.75
2.5
3.7V
1.33
1.31
1.29
1.27
1.25
2.9V
4.8V
2.25
2
1.75
1.5
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature [C]
Temperature [C]
Figure 6. Efficiency vs. output current
Figure 7. Switching frequency
VI
SW
90
85
80
75
70
65
60
55
VMID
VIN=4.2V
VIN=3.2V
VIN=3.7V
VIN=2.9V
VOUT
0
20
40
60
80
100
120
140
160
180
Output Current [mA]
Frequency : 1.285 MHz
VIN = 3.7 V, IOUT = 170 mA, TJ = 25 °C
Figure 8. Soft-start inrush current
Figure 9. Feedback voltage vs. temperature
EN
1.22
1.21
1.2
1.19
1.18
1.17
1.16
1.15
VOUT
2.3 2.5 2.7
2.9 3.1
3.3
3.5 3.7
3.9 4.1
4.3
4.5 4.7 4.9
IIN
Input Voltage [V]
VIN = 3.7 V, NO LOAD, TJ = 25°C, SS:1.265 ms, Inrush
current: 260 mA
DocID022607 Rev 2
9/22
Typical performance characteristics
Figure 10. TDMA noise immunity
STOD1317B
VIN
VOUT
VIN = 2.6 V to 3.1 V, IOUT = 20 mA
10/22
DocID022607 Rev 2
STOD1317B
Detailed description
6
Detailed description
The STOD1317B is a high efficiency DC-DC converter which integrates a step-up and LDO
power stage suitable for supplying AMOLED panels. Thanks to the high level of integration it
needs only 6 external components to operate and it achieves very high efficiency using a
synchronous rectification technique.
The controller uses an average current mode technique in order to obtain good stability and
precise voltage regulation in all possible conditions of input voltage, output voltage and
output current. In addition, the peak inductor current is monitored in order to avoid saturation
of the coils.
The STOD1317B implements a power saving technique in order to maintain high efficiency
at very light load and it switches to PWM operation as the load increases in order to
guarantee the best dynamic performances and low noise operation.
In order to guarantee very low ripple on the output voltage, the step-up output is filtered by
the LDO. There are two control loops; the LDO control loop regulates V
in order to
OUT
provide the right voltage to the output, while the boost control loop is internally set to provide
and output voltage 380 mV higher than V
the minimum possible drop.
in order to maintain the LDO in regulation at
OUT
The STOD1317B avoids battery leakage thanks to the true-shutdown feature and it is self
protected from overtemperature and short-circuit on the V
soft-start guarantee proper operation during startup.
pin. Undervoltage lockout and
OUT
6.1
BOOST multiple mode of operation
The boost DC-DC operates in three different modes: pulse skipping (PS), discontinuous
conduction mode (DCM) and continuous conduction mode (CCM). It switches automatically
between the three modes according to input voltage, output current and output voltage
conditions.
6.1.1
6.1.2
Pulse skipping operation
The STOD1317B works in pulse skipping mode when the load current is below some tens of
mA. The load current level at which this way of operation occurs depends on the input and
output voltage.
Discontinuous conduction mode
When the load increases above some tens of mA, the STOD1317B enters DCM operation.
In order to obtain this type of operation the controller must avoid the inductor current going
negative. The discontinuous mode detector (DMD) block senses the voltage across the
synchronous rectifier and turns off the switch when the voltage crosses a defined threshold
which, in turn, represents a certain current in the inductor. This current can vary according to
the slope of the inductor current which depends on input voltage, inductance value, and
output voltage.
6.1.3
Continuous conduction mode
At medium/high output loads the STOD1317B enters full CCM at constant switching
frequency mode.
DocID022607 Rev 2
11/22
Detailed description
STOD1317B
6.2
Enable pin
The device operates when the EN pin is set high. If the EN pin is set low, the device stops
switching, all the internal blocks are turned off. In this condition the current drawn from V is
IN
below 1 µA in the whole temperature range. In addition, the internal switches are in OFF
state so the load is electrically disconnected from the input, this avoids unwanted current
leakage from the input to the load.
6.3
Soft-start and inrush current limiting
After the EN pin is pulled high, or after a suitable voltage is applied to V and EN, the
IN
device initiates the startup phase.
As a first step, the C
capacitor is charged, the P1 switch implements a current limiting
MID
technique in order to keep the charge current below 400 mA. This avoids battery
overloading during startup.
After V
reaches the V voltage level, the P1 switch is fully turned on and the soft-start
IN
MID
procedure for the step-up is started. V
regulation value.
starts to softly increase until it reaches the
OUT
6.4
Undervoltage lockout
The undervoltage lockout function avoids improper operation of the STOD1317B when the
input voltage is not high enough. When the input voltage is below the UVLO threshold the
device is in shutdown mode. The hysteresis of 100 mV avoids unstable operation when the
input voltage is close to the UVLO threshold.
6.5
6.6
Overtemperature protection
An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 150 °C, typical, the device stops operating. As soon as the
temperature falls below 135 °C, typical, normal operation is restored.
Digital low power function
The digital low power (DLP) function allows physical disconnection of the load from the
device.
12/22
DocID022607 Rev 2
STOD1317B
Detailed description
Figure 11. Digital low power function
D-IC
VPNL
DDVDH(6V)
Enable
Charge Pump
SW
*
S/D
GPIO2
EN
GPIO1
Disable
DCDC
VDDEL
Disable
EN
FB
**
Enable/Disable
Refer to next page
SW
Leakage
Pass
Disable
Operation
– (*) When the power IC is disabled, in order to disconnect leakage current through the
feedback node, the S/W function is active.
– (**) A new EN transition from low to high and/or device power-up turn off the DLP
function and allow IC to work under typical conditions.
DocID022607 Rev 2
13/22
Application information
STOD1317B
7
Application information
7.1
External passive components
7.1.1
Inductor selection
The inductor is the key passive component for switching converters.
For the step-up converter an inductance between 3.3 µH and 6.8 µH is recommended.
It is very important to select the right inductor according to the maximum current the inductor
can handle in order to avoid saturation. The peak current for the step-up can be calculated
as:
Equation 1
V
I
VIN
MIN
(V
MID
- VIN )
MIN
MID OUT
I
PEAK BOOST
η VIN
MIN
2 V fs L
MID
where
: step-up output voltage, it is fixed internally to V
V
+ 0.38 V;
OUT
MID
I
: output current;
OUT
V : input voltage of the STOD1317B;
IN
fs: switching frequency. Use the minimum value of 1 MHz for worst case;
: efficiency of the step-up converter (0.80 at maximum load).
7.1.2
Input and output capacitor selection
It is recommended to use ceramic capacitors with low ESR as input and output capacitors in
order to filter any disturbance present in the input line and to obtain stable operation of the
step-up converter and LDO. A minimum real capacitance value of 3 µF must be guaranteed
for C
and C
in all conditions.
MID
OUT
7.2
Recommended PCB layout
The STOD1317B is a high frequency power switching device so it requires a proper PCB
layout in order to obtain the necessary stability and optimize line/load regulation and output
voltage ripple.
The input capacitor must be as close as possible to the V pin.
IN
In order to minimize the ground noise, a common ground node for power ground (PGND)
and a different one for analog ground (GND) must be used. The exposed pad is connected
to PGND through vias.
Grounding is fundamental to the operation of DC-DC converters; run separate ground paths
for critical parts of the circuit (GND and Power GND), each connected back to a single
ground point.
Separate ground lines prevent the current and noise of one component from interfering with
other components. If using a ground plane, utilize “split” plane techniques to give effective
grounding. Use multiple vias to decrease the trace impedance to ground.
14/22
DocID022607 Rev 2
STOD1317B
Application information
Figure 12. Ground schematic
# V routing #:
the incoming and the outgoing
track are not connected to each
other but only to the capacitor pad
This track can be longer.
In fact we add here an inductor
that creates a second order filter
with the CoHF
Do not !!
Via wich dives into
the power supply plane
Do !!
Vout
Vout
L2
We add here
an impedance
that lowers the
resonating
L1
frequency of
CoHF
1/2 L3
CoHF
COUT
Vout
1/2 L3
CoHF
GND
COUT
Start from the
component pad and not
the incoming track
CO HF
100 nF
L3
f
Via wich dives into
the ground plane
30 nH
(1via)
3 MHz
100nF
100nF
10 nH
1 nH
5 MHz
16 MHz
Co HF resonating frequency
Such isolation is necessary to prevent high-level switching currents from returning to the
battery, or other power supply, through the same ground-return path as the analog signals.
If that happens, the ground path of those sensitive signals is disturbed; the high-level
switching currents flowing through the ground's resistance and inductance cause the
voltage along the return path to vary.
In addition to the grounding scheme, proper placement of the regulator's components is
important.
Beginning a new layout, for the reasons above, it is necessary to firstly place the capacitors
C , C
and C
as close as possible to the related device pins.
IN
OUT
MID
After that, it is possible to place the inductors and the Power GND routing. Next, we can
trace the GND connected through vias to the PGND near to one of the main filter capacitors.
The LDO needs a quiet ground signal in order to operate properly.
It is important to pay close attention to the routing of traces from capacitor terminals in a
DC-DC converter circuit.
Large-valued low-ESR capacitors are expensive, and bad routings can cancel their
performance.
A good routing, on the other hand, can lower the output noise.
Ripple is directly related to the inductor value, the capacitor ESR, the switching frequency,
and so forth, but HF noise (spikes) depends on parasitic elements and the switching action.
In a bad routing, parasitic inductance associated with trace lengths causes problems:
In Figure 12, L1 brings about an increase in noise, and L2 limits the attenuation of an added
HF capacitor. The solution is to bring the input trace in on one side of the capacitor pad, and
the output trace out on the other side of the pad.
DocID022607 Rev 2
15/22
Application information
STOD1317B
Figure 13. Top layer
Figure 14. Bottom layer
16/22
DocID022607 Rev 2
STOD1317B
Package mechanical data
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
Table 7. DFN12L (3 x 3 x 0.8 mm.) package mechanical data
mm.
Dim.
Min.
Typ.
Max
A
A1
A3
b
0.70
0
0.75
0.02
0.20
0.25
3
0.80
0.05
0.18
2.85
1.87
2.85
1.06
0.30
3.15
2.12
3.15
1.31
D
D2
E
2.02
3
E2
e
1.21
0.45
0.40
L
0.30
0.50
DocID022607 Rev 2
17/22
Package mechanical data
STOD1317B
Figure 15. DFN12L package dimensions
8065043_A
18/22
DocID022607 Rev 2
STOD1317B
Package mechanical data
Tape & reel QFNxx/DFNxx (3x3) mechanical data
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
99
13.2
0.504
0.795
3.898
D
N
101
3.976
0.567
T
14.4
Ao
Bo
Ko
Po
P
3.3
3.3
1.1
4
0.130
0.130
0.043
0.157
0.315
8
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Package mechanical data
STOD1317B
Figure 16. DFN12L (3 x 3 mm) footprint recommended data
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Revision history
9
Revision history
Table 8. Document revision history
Changes
Date
Revision
19-Dec-2011
1
Initial release.
Updated:
11-Apr-2013
2
– Package mechanical data Table 7 on page 17 and
Figure 15 on page 18.
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