STP16C596AB1R [STMICROELECTRONICS]
EFFICIENCY PACKAGE;
| 型号： | STP16C596AB1R |
| 厂家： | 
ST |
| 描述： | EFFICIENCY PACKAGE 功效 |
| 文件： | 总18页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STP16C596A
16-BIT CONSTANT CURRENT LED SINK DRIVER
I
I
16 CONSTANT CURRENT OUTPUT
CHANNELS
ADJUSTABLE OUTPUT CURRENT
THROUGH EXTERNAL RESISTOR
I
I
SERIAL DATA IN/PARALLEL DATA OUT
SERIAL OUT CHANGE STATE ON THE
FALLING EDGES OF CLOCK
DIP-24
SO-24
I
I
I
OUTPUT CURRENT: 15-120 mA
25 MHz CLOCK FREQ.
AVAILABLE IN HIGH THERMAL TSSOP
EXPOSED PAD
I
EFFICIENCY PACKAGE
TSSOP24
TSSOP24
(exposed pad)
DESCRIPTION
The STP16C596A
is
a
monolithic,
medium-voltage, low current power 16-bit shift
register designed for LED panel displays. The
Through an external resistor, users may adjust the
STP16C596A output current, controlling in this
way the light intensity of LEDs.
STP16C596A contains
a
16-bit serial-in,
parallel-out shift register that feeds a 16-bitD-type
storage register. In the output stage, sixteen
regulated current sources are designed to provide
15-120mA constant current to drive the LEDs.
The serial output change state on the falling edges
of clock, this special feature will provide an
improved performance of the application when the
clock signal is skewed because the daisy chain is
too long.
The STP16C596A guarantees a 16V output
driving capability, allowing users to connect more
LEDs in series. The high clock frequency, 25 MHz,
also satisfies the system demand for high volume
data transmission. Compared with a standard
TSSOP package, the TSSOP exposed pad
increases heat dissipation capability by a 2.5
factor.
Table 1: Order Codes
Part Number
Package
DIP-24
Comments
STP16C596AB1R
STP16C596AM
15 parts per tube
SO-24 (Tube)
SO-24 (Tape & Reel)
40 parts per tube
1000 parts per reel
2500 parts per reel
2500 parts per reel
STP16C596AMTR
STP16C596ATTR
STP16C596AXTTR
TSSOP24 (Tape & Reel)
TSSOP24 Exposed-Pad (Tape & Reel)
Rev. 2
July 2005
1/18
STP16C596A
Table 2: Current Accuracy
Current accuracy
Output Voltage
Output Current
Between bits
Between ICs
≥ 0.7V
TYP. ± 3%
± 6%
15 to 120 mA
Figure 1: Pin Connection (Note 1)
Note 1: The exposed Pad is electrically not connected.
Table 3: Pin Description
PIN N°
Symbol
Name and Function
1
2
GND
SDI
Ground Terminal
Serial data input terminal
Clock input terminal
Latch input terminal
Output terminal
3
CLK
4
/LE
5-20
21
22
23
24
OUT 0-15
/OE
Input terminal of output enable (active low)
Serial data out terminal
SDO
R-EXT
Input terminal of an external resistor for constant current programing
Supply voltage terminal
V
DD
2/18
STP16C596A
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
0 to 7
-0.5 to 16
120
V
V
DD
V
Output Voltage
O
I
Output Current
mA
O
V
Input Voltage
-0.4 to V +0.4
V
mA
MHz
°C
I
DD
I
GND Terminal Current
Clock Frequency
1920
25
GND
f
CLK
T
Operating Temperature Range
Storage Temperature Range
-40 to +125
-65 to +150
OPR
T
°C
STG
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Under these conditions, functional operation
is not implied.
Table 5: Thermal Data
TSSOP24 (*)
(exposed pad)
Symbol
Parameter
DIP-24
SO-24
TSSOP24
Unit
R
Thermal Resistance Junction-ambient
60
75
85
37.5
°C/W
thj-amb
(*) The exposed pad should be soldered directly to the PCB to realize the thermal benefits.
Table 6: Recommended Operating Conditions
Symbol
Parameter
Supply Voltage
Test Conditions
Min.
Typ.
Max.
5.5
Unit
V
V
4.5
5.0
DD
V
Output Voltage
16.0
120
+1
V
O
I
Output Current
OUTn
5
mA
mA
mA
V
O
I
Output Current
SERIAL-OUT
SERIAL-OUT
OH
I
Output Current
-1
OL
V
Input Voltage
0.7V
V
+0.3
IH
DD
DD
V
Input Voltage
-0.3
20
0.3V
V
IL
DD
t
/LE Pulse Width
CLK Pulse Width
/OE Pulse Width
Setup Time for DATA
Hold Time for DATA
Setup Time for LATCH
Clock Frequency
V
= 4.5 to 5.5V
DD
ns
wLAT
wCLK
t
20
ns
t
400
20
ns
wEN
SETUP(D)
t
ns
t
15
ns
HOLD(D)
t
15
ns
SETUP(L)
f
Cascade Operation
25
MHz
CLK
3/18
STP16C596A
Table 7: Electrical Characteristics (V =5V, T = 25°C, unless otherwise specified.)
DD
Symbol
Parameter
Test Conditions
Min.
0.7V
Typ.
Max.
Unit
V
V
Input Voltage High Level
Input Voltage Low Level
Output Leakage Current
Output Voltage (Serial-OUT)
Output Voltage (Serial-OUT)
Output Current
V
DD
IH
DD
V
I
GND
0.3V
V
IL
DD
V
= 16 V
OH
10
µA
V
OH
V
I
I
= 1mA
0.4
OL
OH
OL
V
I
= -1mA
V
-0.4V
DD
V
OH
V
V
V
V
= 0.7V R
= 0.7V R
= 0.7V R
= 0.7V R
= 910 Ω
= 360 Ω
= 910 Ω
= 360 Ω
18.6
45.7
20.4
50.2
± 3
22.4
55.2
± 4
mA
mA
%
OL1
OL2
O
O
O
O
EXT
EXT
EXT
EXT
I
∆I
∆I
Output Current Error
between bit (All Output ON)
OL1
± 3
± 4
%
OL2
R
Pull-up Resistor
150
100
300
200
0.3
600
400
0.6
KΩ
KΩ
mA
SIN(up)
SIN(down)
DD(OFF1)
DD(OFF2)
DD(OFF3)
R
Pull-down Resistor
Supply Current (OFF)
I
I
I
R
R
R
R
R
= OPEN OUT 0 to 15 = OFF
= 470 Ω OUT 0 to 15 = OFF
= 250 Ω OUT 0 to 15 = OFF
= 470 Ω OUT 0 to 15 = ON
= 250 Ω OUT 0 to 15 = ON
EXT
EXT
EXT
EXT
EXT
5.5
7.7
10.1
5.5
14.1
7.7
I
Supply Current (ON)
DD(ON1)
DD(ON2)
I
10.1
14.1
Table 8: Switching Characteristics (V =5V, T = 25°C, unless otherwise specified.)
DD
Symbol
Parameter
Test Conditions
= 5 V
Min.
Typ.
Max.
Unit
t
t
t
Propagation Delay Time,
CLK-OUTn, /LE = H, /OE = L
V
V
V
= V
DD
200
280
ns
PLH1
PLH2
PLH3
DD
IH
= GND
C = 13pF
L
IL
Propagation Delay Time,
/LE-OUTn, /OE = L
160
145
15
250
200
30
ns
ns
ns
ns
ns
ns
ns
I
= 40mA
V = 3 V
O
L
R
= 470 Ω
R = 65 Ω
EXT
L
Propagation Delay Time,
/OE-OUTn, /LE = H
t
Propagation Delay Time,
CLK-SDO
PLH
t
Propagation Delay Time,
CLK-OUTn, /LE = H, /OE = L
15
30
PHL1
PHL2
PHL3
t
t
Propagation Delay Time,
/LE-OUTn, /OE = L
15
30
Propagation Delay Time,
/OE-OUTn, /LE = H
45
60
t
Propagation Delay Time,
CLK-SDO
15
300
PHL
t
t
Output Rise Time
Output Fall Time
160
15
200
25
ns
ns
r
f
4/18
STP16C596A
EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS
Figure 2: /OE Terminal
Figure 3: /LE Terminal
Figure 4: CLK, SDI Terminal
5/18
STP16C596A
Figure 5: SDO Terminal
Figure 6: Block Diagram
6/18
STP16C596A
Table 9: Truth Table
CLOCK
/LE
H
/OE
L
SERIAL-IN OUT0 .................. OUT7 .................. OUT15
SDO
Dn
Dn ..... Dn - 7 ..... Dn -15
No Change
Dn - 15
Dn - 14
Dn - 13
Dn - 13
Dn - 13
L
L
Dn + 1
Dn + 2
Dn + 3
Dn + 3
H
L
Dn - 2 ..... Dn - 5 ..... Dn -13
Dn - 2 ..... Dn - 5 ..... Dn -13
OFF
X
L
X
L
Note 1: OUT0 to OUT15 = ON when Dn = H; OUT0 to OUT15 = OFF when Dn = L.
Figure 7: Timing Diagram
Note: The latches circuit holds data when the LE terminal is Low.
When LE terminal is at High level, latch circuit doesn’t hold the data it passes from the input to the output.
When OE terminal is at Low level, output terminals OUT0 to OUT15 respond to the data, either ON or OFF.
When OE terminal is at High level, it switches off all the data on the output terminal.
7/18
STP16C596A
Figure 8: Clock, Serial-in, Serial-out
Figure 9: Clock, Serial-in, Latch, Enable, Outputs
8/18
STP16C596A
Figure 10: Outputs
TEST CIRCUIT
Figure 11: DC Characteristic
Figure 12: AC Characteristic
9/18
STP16C596A
Figure 13: Output Current-R
Resistor
Figure 14: Power Dissipation vs Temperature
EXT
Package
10/18
STP16C596A
Plastic DIP-24 (0.25) MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
MIN.
MAX.
A
A1
A2
B
4.32
0.170
0.38
0.015
3.3
0.46
1.52
0.25
31.75
0.130
0.018
0.060
0.010
1.250
0.41
1.40
0.20
31.62
7.62
6.35
0.51
1.65
0.30
31.88
8.26
6.86
0.016
0.055
0.008
1.245
0.300
0.250
0.020
0.065
0.012
1.255
0.325
0.270
B1
c
D
E
E1
e
6.60
2.54
7.62
0.260
0.100
0.300
E1
L
3.18
0˚
3.43
15˚
0.125
0˚
0.135
15˚
M
E
E1
Stand-off
B
B1
e
e1
c
D
24
1
13
12
.015
0,38
Gage Plane
M
0034965/D
11/18
STP16C596A
SO-24 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A1
B
2.35
2.65
0.093
0.104
0.1
0.33
0.23
15.20
7.4
0.30
0.51
0.32
15.60
7.6
0.004
0.013
0.009
0.598
0.291
0.012
0.020
0.013
0.614
0.299
C
D
E
e
1.27
0.050
H
10.00
0.25
0.4
10.65
0.75
1.27
8°
0.394
0.010
0.016
0°
0.419
0.030
0.050
8°
h
L
k
0°
ddd
0.100
0.004
0070769C
12/18
STP16C596A
TSSOP24 EXPOSED PAD MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
MIN.
MAX.
A
A1
A2
b
1.2
0.15
1.05
0.30
0.20
7.9
0.047
0.006
0.041
0.012
0.0089
0.311
0.004
0.039
0.8
0.19
0.09
7.7
1
0.031
0.007
0.004
0.303
0.106
0.244
0.169
0.059
c
D
7.8
0.307
D1
E
2.7
6.2
6.4
4.4
6.6
4.5
0.252
0.173
0.260
0.177
E1
E2
e
4.3
1.5
0.65
0.60
0.0256
0.024
K
0°
8°
0°
8°
L
0.45
0.75
0.018
0.030
7100778C
13/18
STP16C596A
TSSOP24 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.1
MIN.
MAX.
0.043
0.006
A
A1
A2
b
0.05
0.15
0.002
0.9
0.035
0.19
0.09
7.7
0.30
0.20
7.9
0.0075
0.0035
0.303
0.0118
0.0079
0.311
c
D
E
4.3
4.5
0.169
0.177
e
0.65 BSC
0.0256 BSC
H
K
6.25
0°
6.5
8°
0.246
0°
0.256
8°
L
0.50
0.70
0.020
0.028
A2
A
K
L
b
e
A1
H
c
D
E
PIN 1 IDENTIFICATION
1
7047476B
14/18
STP16C596A
Tape & Reel SO-24 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
11.0
15.9
3.1
1.197
0.433
0.626
0.122
0.161
0.476
Ao
Bo
Ko
Po
P
10.8
15.7
2.9
0.425
0.618
0.114
0.153
0.468
3.9
4.1
11.9
12.1
15/18
STP16C596A
Tape & Reel TSSOP24 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
7
0.882
0.276
0.331
0.075
0.161
0.476
Ao
Bo
Ko
Po
P
6.8
8.2
0.268
0.323
0.067
0.153
0.468
8.4
1.9
4.1
12.1
1.7
3.9
11.9
16/18
STP16C596A
Table 10: Revision History
Date
Revision
Description of Changes
19-May-2005
25-Jul-2005
1
2
First Release.
Add note on Fig. 1 and Table 5.
17/18
STP16C596A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2005 STMicroelectronics - All Rights Reserved
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18/18
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