STPTIC-47L1H5 [STMICROELECTRONICS]
Parascan tunable integrated capacitor;
| 型号： | STPTIC-47L1H5 |
| 厂家： | 
ST |
| 描述： | Parascan tunable integrated capacitor |
| 文件： | 总10页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STPTIC-27L2
Parascan™ tunable integrated capacitor
Datasheet
-
production data
Description
The ST integrated tunable capacitor offers
excellent RF performance, low power
,&
7
consumption and high linearity required in
adaptive RF tuning applications. The fundamental
building block of PTIC is a tunable material called
3
7
6
Parascan™, which is a version of barium
strontium titanate (BST) developed by Paratek
Microwave.
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BST capacitors are tunable capacitors intended
for use in mobile phone application and dedicated
to RF tunable applications. These tunable
capacitors are controlled through an extended
bias voltage ranging from 1 to 24 V. The
implementation of BST tunable capacitors in
mobile phones enables significant improvement
in terms of radiated performance making the
performance almost insensitive to the external
environment.
Features
•
•
•
•
•
•
High power capability
5:1 tuning range
Higher linearity (48x)
High quality factor (Q)
Low leakage current
Figure 1. PTIC functional block diagram
Compatible with high voltage control IC
(STHVDAC series)
37,&
•
•
Available in WLCSP package 0.75 x 1.00 x 0.3
mm
ECOPACK®2 compliant component
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Benefit
RF tunable passive implementation in mobile
•
phones to optimize antenna radiated
performance
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Applications
•
Cellular antenna open loop tunable matching
network in multi-band GSM/WCDMA/LTE
mobile phone
•
Open loop tunable RF filters
TM: Parascan is a trademark of Paratek Microwave Inc.
December 2015
DocID028611 Rev 1
1/10
This is information on a product in full production.
www.st.com
Electrical characteristics
STPTIC-27L2
1
Electrical characteristics
Table 1. Absolute maximum ratings (limiting values)
Parameter
Symbol
Rating
Unit
PIN
Input peak power RFIN (CW mode)/all RF ports
+40
Class 1B(1)
100
dBm
V
VESD(HBM) Human body model, JESD22-A114-B, all I/O
VESD(MM)
Tdevice
Tstg
Machine model, JESD22-A115-A, all I/O
Device temperature
V
+125
°C
V
Storage temperature
-55 to +150
25
Vx
Bias voltage
1. Class 1B defined as passing 500 V, but fails after exposure to 1000V ESD pulse.
Table 2. Recommended operating conditions
Rating
Symbol
Parameter
Unit
Min.
Typ.
Max.
PIN
FOP
RF input power
+33
+39
dBm
Operating frequency
Device temperature
Operating temperature
Bias voltage
700
2700 MHz
Tdevice
TOP
+100
°C
+85
-30
1
VBIAS
24
V
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DocID028611 Rev 1
STPTIC-27L2
Symbol
Electrical characteristics
Table 3. Representative performance (Tamb = 25 °C otherwise specified)
Value
Parameter
Conditions
Unit
Min. Typ. Max.
C1V
C2V
capacitance at 1 V bias
capacitance at 2 V bias
STPTIC-27L2
STPTIC-27L2
STPTIC-27L2
2.8 3.2 3.58 pF
2.43 2.7 2.97 pF
0.63 0.69 0.75 pF
0.56 0.61 0.66 pF
5/1
C20V capacitance at 20V bias
C24V capacitance at 24 V bias STPTIC-27L2
(1)
∆C
IL
Tuning range
Leakage current
Quality factor
Quality factor
Ratio between C1V/C24V
Measured with Vbias = 24 V
Measured at 700 MHz at 2 V
Measured at 2700 MHz at 2 V
100
nA
QLB
QHB
50
35
60
80
80
55
40
V
bias = 1 V(2)(4)
IP3
H2
Third order intercept point Vbias = 24 V(2)(4)
Vbias = 20 V(2)(4)
dBm
Vbias = 1 V(3)(4)
-70 -65
Second harmonic
Vbias = 24 V(3)(4)
-80 -75 dBm
-65
Vbias = 20 V(3)(4)
Vbias = 1 V(3)(4)
-55 -45
-85 -70 dBm
-70
H3
tT
Third harmonic
Transition time
Vbias = 24 V(3)(4)
Vbias = 20 V(3)(4)
(5)
Average for any transition between Cmin to Cmax
50
µs
30
(5)
Average transition between Cmax to Cmin
1. Measured at low frequency
2. F = 894 MHz, F = 849 MHz, P = +25 dBm, P = +25 dBm, 2f - f = 939 MHz
1
2
1
2
1
2
3. 850 MHz, P = +34 dBm, CW
in
4. IP3 and harmonics are measured in the shunt configuration in a 50
Ω environment
5. One or both of RF and RF must be connected to DC ground, using the HVDAC turbo mode
in
out
DocID028611 Rev 1
3/10
10
Electrical characteristics
STPTIC-27L2
Figure 2. Capacitance variation versus bias
voltage
Figure 3. Quality factor versus frequency
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Figure 4. Harmonic power versus bias voltage Figure 5. Harmonic power versus bias voltage
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4/10
DocID028611 Rev 1
STPTIC-27L2
Package information
2
Package information
•
•
Epoxy meets UL94, V0
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1
Flip-Chip package information
Figure 7. Flip-Chip package outline
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The land pattern below is recommended for soldering the STPTIC-G2 on PCB.
NC stands for No Connect, this pad must not be connected on application board. Please
leave this pad floating.
Table 4. Flip-Chip package dimensions
Dimensions (in microns)
A1
A2
B1
B2
B4
C1
C2
D1
D2
D3
E1
E2
STPTIC-27L2
Tolerance
1000 750 140 500 360 105 540 225 90
315 125 165
±30 ±30 ±15 ±10 ±15 ±15 ±10 ±20 ±20 ±40 ±20 ±20
DocID028611 Rev 1
5/10
10
Package information
STPTIC-27L2
Figure 8. Recommended PCB land pattern for Flip-Chip package
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Table 5. Dimensions
Dimensions
L1
W1
L3
L2
W2
L4
X1
X2
Y1
Y2
Typical values (in microns)
160
160
260
210
210
310
320
270
240
190
2.2
Packing information
Figure 9. Flip-Chip tape and reel outline
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Table 6. Dimensions
Pocket dimensions
L
W
H
STPTIC-27L2
1070
820
380
6/10
DocID028611 Rev 1
STPTIC-27L2
Package information
Figure 10. Flip-Chip marking
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Table 7. Pinout description
Pad / ball number
Pin name
Description
A1
B1
A2
B2
DC bias
RF2
DC bias voltage
RF input / output(1)
Not connected
NC
RF1
RF input / output
1. When connected in shunt, please connect RF2 (B1 ball) to GND
DocID028611 Rev 1
7/10
10
Reflow profile
STPTIC-27L2
3
Reflow profile
Figure 11. ST ECOPACK® recommended soldering reflow profile for PCB mounting
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Note:
Minimize air convection currents in the reflow oven to avoid component movement.
Table 8. Recommended values for soldering reflow
Value
Profile
Typical
Max.
Temperature gradient in preheat (T = 70-180 °C)
Temperature gradient (T = 200-225 °C)
Peak temperature in reflow
0.9 °C/s
2 °C/s
3 °C/s
3 °C/s
260 °C
90 s
240-245 °C
60 s
Time above 220 °C
Temperature gradient in cooling
Time from 50 to 220 °C
-2 to -3 °C/s
-6 °C/s
160 to 220 s
8/10
DocID028611 Rev 1
STPTIC-27L2
Ordering information
4
Ordering information
Figure 12. Ordering information scheme
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Table 9. Ordering information
Part number
Marking
Base qty
Package
Delivery mode
STPTIC-27L2C5
27L
15 000
Flip-Chip
Tape and reel
5
Revision history
Table 10. Document revision history
Changes
Date
Revision
04-Dec-2015
1
Initial release.
DocID028611 Rev 1
9/10
10
STPTIC-27L2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
10/10
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