STV2110B [STMICROELECTRONICS]
PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR; PAL- SECAM亮度与色度与偏转处理器
| 型号： | STV2110B |
| 厂家： | 
ST |
| 描述： | PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR |
| 文件： | 总15页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STV2110B
PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR
PRELIMINARY DATA
■
■
■
RGB AND FAST BLANKINGINPUTS
AUTOMATIC CUT-OFF CONTROL
DC-CONTROLLED BRIGHTNESS, CONTRAST
AND SATURATION
Used with theTDA8222, this ICpermits a complete
low cost solution with external output stages.
It is pin compatible with STV2102B PAL only proc-
essor.
■
■
■
■
CERAMIC 500kHz VCO FOR LINE DEFLEC-
TION
CHROMA STANDARD AUTOMATIC IDENTIFI-
CATION
BIDIRECTIONAL I/O FOR CHROMA STAND-
ARD
PHASE-LOCKED REFERENCE OSCILLATOR
USING A STANDARD 4.43MHz
OSD CAPABILITY ON OUTPUTS
VIDEO IDENTIFICATION GENERATOR
■
■
SHRINK 42
(Plastic Package)
DESCRIPTION
ORDER CODE : STV2110B
The STV2110B is a PAL-SECAM chroma decoder,
video and H/V deflection processor for CTV.
PIN CONNECTIONS
SUPPLY VOLTAGE
BLANKING INPUT
Vcc
BLK
COG
ICAT CATHODECURRENT
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Vcc
BIN
GIN
SUPPLY VOLTAGE INPUT
BLUE INPUT
2
GREEN CUT-OFF CAPACITOR
3
RED OUTPUT ROUT
HORIZONTAL Vcc HVcc
GREEN INPUT
4
COR RED CUT-OFF CAPACITOR
5
GREENOUTPUT GOUT
BLUE OUTPUT BOUT
RIN
RED INPUT
6
BRIG BRIGHTNESS CONTROL
7
BLUE CUT-OFF CAPACITOR
COB
YIN
FBL
FAST BLANKING INPUT
8
LUMINANCE SIGNAL INPUT
9
CLPF CHROMA LOOP FILTER
CXTL CHROMA XTAL
SLPF
10
11
12
13
14
15
16
17
18
19
20
21
SCANNING LOOP FILTER
SCANNING XTAL SXTL
CKP PAL KILLER CAPACITOR
F425 4.25MHz FILTER
COMPOSITEVIDEO SIGNAL CVBS
LINE FLYBACK INPUT
LFB
ACC ACC CONTROL CAPACITOR
CDR RED DEEMPHASIS CAPACITOR
F440 4.40MHz FILTER
VERTICAL OUTPUT VOUT
HORIZONTAL OUTPUT HOUT
CONTRAST CONTROL
CTR
SAT SATURATION CONTROL
CDB BLUE DEEMPHASIS CAPACITOR
F432 4.32MHz FILTER
SECAMCHROMA INPUT SECIN
PAL CHROMA INPUT PALIN
GROUND
DELAY CHROMA INPUT
CHROMA STANDARD I/O
GND
DLI
PS
GND GROUND
CKS SECAM KILLER CAPACITOR
DLO CHROMA OUTPUT
1/15
April 1996
This is advance information on a new product now in development or undergoing evaluation. Detailsare subject to change without notice.
STV2110B
BLOCK DIAGRAM
X S T L
F P S L
B L F
B R I G
B S C V
C T R
0 4 F 4
C D R
N B I
G I N
R I N
2 3 F 4
C D B
F B L
5 2 F 4
C K S
P S
T
S A
I
D L
C C
H V
O
D L
C C
V
G N D
C C
V
G N D
2/15
STV2110B
FUNCTIONAL DESCRIPTION
DEFLECTION
The dynamic range is over than 30dB.
The chrominance output signal is fed to the delay
line.
- PAL mode :
the adding and substracting direct and delayed
signals are performedby the DL matrix function.
Two synchronous demodulators multiplies
the (B-Y) signal with the 0 degree phase
4.43MHz reference signal and the (R-Y) signal
with the alternate ±90 deg. 4.43MHz phase ref-
erence signal.
Synchronization Separator
The synchronization separator is based on the
bottom of synchronization pulses alignment to an
internal reference voltage. An external capacitor
permits to align synchro. pulses,two externalresis-
tors determines the detection threshold of synchro
pulses. The frame synchronization pulses are
locked to a 32µs reference signal to perfect inter-
lacing.
Horizontal Scanning
- SECAM mode :
The horizontalscanningfrequencyis obtainedfrom
a 500kHz VCO. The circuit uses two phase-locked
loops (PLL). The first one controls the frequency;
the second one, fully integrated, controls the rela-
tive phase of the synchronization and the line fly-
back signals.
thepermutatorseparatesthetwo (B-Y) and(R-Y)
subcarriers. These signals are demodulated by
two FM demodulators with two external L, C
centered on fO(blue) = 4.25MHz and fO(red)
4.406MHz.
=
4.43MHz Phase Locked Loop
The first PLL has two times constants : a long time
constant during the picture to have a good noise
immunity, a short time constant at the beginningof
the frame to recapture faster the phase in case of
VCR video signal. More over, the PLL is in short
time constant three lines before frame pulses oc-
cured, it permits to ensure good interlacing when
the video signal comes from a VCR tape with high
phase error.
The oscillating frequency of the 4.43MHz crystal
oscillator is controlled by the output voltage of the
loop filter. The phase detector will lock the 90 de-
gree reference signal to the direct burst signal.
A 90 degree phase shifter permits to recover the
0 degree reference signal. A flip-flop driven by line
pulses permits to generate the alternate ±90 de-
gree signal.
ACC Control and Color Killer
PAL mode :
the direct burst signal is demodulated with the ±90
degree reference signal. The demodulation result
is used by ACC control and killer function.
The horizontal output signal is 28µs width. On
starting up, horizontal pulses are enabled at
VCC = 6.8V. On shutting down, horizontal pulses
are inhibited for VCC = 6.2V.
Vertical Scanning
SECAM mode :
The windows for the frame sync detection are
generated by a count down system. The selection
of the windows is determined by the IC status :
- video identification off - window : 248/314
- video identification on - window : 248/352
ACC control is done by a X2 demodulator. For
identification the burst signals of the red and blue
lines are demodulated by the external LC con-
nected on Pin 31, it is centered at 4.32MHz. This
give positive and negative signals which are in-
verted by the signal coming out of the SECAM
flip-flop.
When a sync pulse is detected inside the window
a 10.5 lines long pulse is provided to VOUT pin.
The count down system provides also the needed
signals for the time constant switch, the line PLL
inhibition and service signals to the rest of the IC.
In both standard, if the demodulation result is al-
ways positive, the killer capacitor is charged and
the standard is identified (color ON). When de-
modulation result is always negative, the killer ca-
pacitor voltage reaches the flip-flop inhibition level,
so the alternace sequence is reversed and the
capacitor is charged again.
CHROMA
ACC Amplifier, DL Matrix, Permutator and De-
modulator
In case of no video signal, both killer capacitors
voltage are maintained about VCC/2, below the
color off threshold.
The correct chroma subcarrier input, issued from
bandpass or bell filter, isinternally selectedwith the
standard. The ACC amplifier envolves three
stages : the first one select the correct input, the
second one the -6dB in picture (PAL mode), the
third one is controled by the ACC voltage.
In PAL or SECAM, the ACC control voltage is
obtained by the peak detectionof the demodulated
burst.
3/15
STV2110B
FUNCTIONAL DESCRIPTION (continued)
Automatic Standard Identification
The color signals are sent to an RGB switch which
will drive to the outputs either internal RGB signals
or external RGB signals.
The circuitis alternatelyforced ineachmode during
two fields (PAL mode, SECAM mode disabled or
SECAM mode, PAL mode disabled).
Automatic Cut-off Control
If PALsignalisidentified,thealternatePAL/SECAM
sequency is locked in PAL mode.
The black levels of the RGB outputsare controlled
with the cut-off loops during three line periods after
the frame retrace. The cut-off measurements are
sequentiallyachieved duringthese threelines. The
leakage current measurement is achieved during
the frame retrace and memorized on an internal
capacitor, thus the circuit is able to extract the
cut-off current from the total current measurement.
To have a SECAM identification, the circuit must
memorizes a first SECAM identification, than test
the PAL mode and confirm a second SECAM iden-
tification. The SECAM identification will take from
four to six fields.
OutputPin 21, namedPS, is highlevelin PAL mode
and low level in SECAM mode.
Warm-up Detector
Forced standard : Pin 21 can be used for the
purpose :
- Pin 21 to HVCC : PAL mode
- Pin 21 to ground : SECAM mode
At the start-up, the cut-off loops are switch off, a
white level is inserted on the luminance signal until
a cathode current is detected. Then the cut-off
loops are released.
RGB Inputs
VIDEO
To avoid the black level of the inserted signal
differing from the black level of the normal video
signal, the external RGB are clamped to the black
level of the luminance signal. Therefore, an AC
coupling is required for the RGB inputs.
Input Stage
The luminance input is controlled by the contrast
control stage which range is 20dB.
The luminance and color difference signals are
added in the video matrix circuit to obtain the color
signals.
The RGB inputs are controlled by a 12dB range
contrast control stage.
ABSOLUTE MAXIMUM RATINGS
Symbol
HVcc
Vcc
Parameter
Horizontal Supply Voltage (Pin 5)
Value
12
Unit
V
Video & Chroma Supply Voltage (Pins 1-41)
Horizontal Output (Pin 15)
HVCC + 0.5
12
V
HOUT
Tstg
V
Storage Temperature
-55, +150
0, +70
oC
oC
Toper
Operating Temperature
THERMAL DATA
Symbol
Parameter
Value
Unit
oC/W
Rth (j-a)
Junction-ambient Thermal Resistance
Max.
60
DC AND AC ELECTRICAL CHARACTERISTICS
(HVCC = VCC = 9V, Tamb = 25oC unlessotherwise specified)
Symbol
HVcc
Vcc
Parameter
Test Conditions
Min. Typ. Max.
Unit
V
Scanning Supply Voltage (Pin 5)
Video & Chroma Supply Voltage (Pins 1-41)
Scanning Supply Current (pin 5)
Video & Chroma Supply Current (Pins 1-41)
Total Power Dissipation
8.1
8.1
9
9
9.9
9.9
35
V
Icch
No load
25
45
630
mA
mA
mW
Iccv&c
PD
No load
No load
55
890
4/15
STV2110B
DC AND AC ELECTRICAL CHARACTERISTICS (continued)
(HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Unit
LUMINANCE INPUT (Pin 9)
VBW9
VDC9
Ig
Input Voltage
DC Level
350
2.6
490 mVPP
No input signal
V
Input Current
• During burst period
• Out of burst period
±150
µA
µA
1
G9
Luma Gain
7.4
6
BW467
Bandwidth (Y to R, G, B outputs)
-3dB
MHz
CONTRAST CONTROL (Pin 16)
V16 Contrast Control Voltage
V16 (Max.) Allowed Control Voltage
2 to 4
20
V
V
5
G16
I16
Contrast Control Range
Input Current
dB
µA
10
BRIGHTNESS CONTROL (Pin 36)
V36 Brightness Control Voltage
V36 (Max.) Allowed Control Voltage
I36 Input Current
SATURATION CONTROL INPUT (Pin 27)
V27 Saturation Control Voltage
V27 (Max.) Allowed Control Voltage
1.8 to 4.3
V
V
5
10
µA
2 to 4
-50
V
V
5
G27
V27M
I27
Saturation Control Range
Mute Level
dB
V
0.5
10
Input Current
µA
RGB OUTPUTS (Pins 4-6-7)
VBW 4-6-7 Output Signal Amplitude
(black to white)
• 0.35V B to W @ Pin 9
• Contrast @ 4V
• Sat. & Brig. @ 3V
2.6
V
I4-6-7
Individual Output Sinking Current
Maximum Peak White Level
2
mA
V
VM4-6-7
7.8
0.5
2.5
4.5
Vblank 4-6-7 Blanking Level
V
VCO min. Minimum Level of Inserted Cut-off Lines
VCO max. Maximum Level of Inserted Cut-off Lines
V
V
Relative Variation in Black Level with Various
CONT. SAT. BRIG between the 3 channels
20
2
mV
∆Vtemp
Black Level Thermal Drift
0.5
mV/oC
dB
Tracking between Luminance and Chrominance
Signals over 10dB Contrast Control
RGB INPUTS (Pins 37-39-40)
VBW37-39-40 Input Amplitude (B to W)
0.7
1.8
2
1
V
V
Vclamp
Clamp Level
Contrast max
-3dB
37-39-40
I37-39-40
Control Current
±150
µA
µA
Ii37-39-40 Leakage Current
BW37-39-40 Bandwidth
8
MHz
dB
GCTR
RGB Contrast Control Range
14
3.7
G37-39-40 RGB Gain
5/15
STV2110B
DC AND AC ELECTRICAL CHARACTERISTICS (continued)
(HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
FAST BLANKING INPUT (Pin 35)
VTH1-35 First Threshold (switching)
VTH2-35 Second Threshold (blanking)
0.7
2.1
50
V
V
Tswitch
Tblank
Switching Delay
Blanking Delay
ns
ns
100
CATHODE CURRENT INPUT (Pin 42)
VREF42 Leakage Current Reference Voltage
1.75
250
V
∆VREF42 CO Reference refered to Leakage Current
mV
Reference
I42
Output Current
150
µA
Vsb42
Start-beam Current Detection Reference
Voltage
2.4
V
AUTOMATIC CUT-OFF (Pin 3-8-38)
Cut-off Capacitor Clamping Current
PAL CHROMINANCE INPUT (Pin 18)
V18 Input Level
± 100
µA
0.3
30
1.0
VPP
Vburst-18 Minimum Burst Signal Amplitude within the
ACC Control Range
mVPP
GACC
ACC Control Range
Change of burst over whole
ACC Control Range < 1dB
30
dB
R18
Input Impedance
DC Level
8
kΩ
VDC-18
No input signal
3.5
V
SECAM CHROMINANCE INPUT (Pin 17)
V17 Input Level
0.3
30
1.0
VPP
Vburst-17 Minimum Burst Signal Amplitude within the
ACC Control Range
mVPP
R17
Input Impedance
DC Level
20
kΩ
VDC-17
No input signal
3.5
V
ACC CAPACITOR (Pin 30)
I30
Charging Current
Leakage Current
During burst gate period
Out of burst gate period
250
µA
µA
Ii30
1
PLL LOOP FILTER (Pin 34)
I34 Control Current
CHROMAXTAL (Pin 33)
400
±700
2
µA
Hz
CR33
Catching Range
SUBCARRIER OUTPUT (Pin 22)
Vburst-22 Output Burst Amplitude (PAL mode)
PAL KILLER CAPACITOR (Pin 32)
VOFF-32 Color off Threshold
Within ACC Control Range
Vpp
5.0
5.4
3.2
250
6.0
V
V
VON-32
VINH-32 PAL Flip-flop Inhibition Level
I32 Control Current
Vnom-32 Voltage with Nominal Input Signal
Color on Threshold
V
µA
V
6/15
STV2110B
DC AND AC ELECTRICAL CHARACTERISTICS (continued)
(HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Unit
SECAM KILLER CAPACITOR (Pin 23)
VOFF-23 Color off Threshold
5.6
6
V
V
VON-23
VINH-23
I23
Color on Threshold
SECAM Flip-flop Inhibition Level
Control Current
3.2
250
7.3
V
µA
V
Vnom-23 Voltage with Nominal input Signal
DELAYED CHANNEL INPUT (Pin 20)
VDC-20
R20
DC Level
No input Signal
2.2
V
Input Impedance
PAL standard
SECAM standard
8
20
kΩ
kΩ
4.25MHz AND 4.40MHz FILTER (Pins 28-31)
VDC-28-31 DC Level
No input signal
2.3
20
V
R28-31
RED AND BLUE DEEMPHASIS CAPACITORS (Pins 26-29)
VDC-26-29 DC Level No input signal
Input Impedance
kΩ
6.4
6
V
R26-29
Input Impedance
kΩ
4.32MHz FILTER (Pin 25)
VDC-25
R25
DC Level
No input signal
3.5
40
V
Input Impedance
kΩ
FORCING/STANDARD IDENTIFICATION (Pin 21)
Max.Current on PS Output
PAL
SECAM
+ 5
- 5
mA
mA
DC Output Voltage
DC input Voltage
PAL
7.5
1.5
V
V
SECAM
PAL
SECAM
HVCC
0.0
V
V
COMPOSITE VIDEO BASE BAND SIGNAL (Pin 12)
VREF-12 Clamp Voltage
I12 = - 1µA
1.6
1.85
1
2.1
V
V12
I12
Video Input Signal (sync to white)
Sync Threshold
VPP
µA
12
SCANNING XTAL (Pin11)
F11
Frequency after Divider
Frequency Control Range after Divider
15.625
kHz
Hz
CR11
±700
PLL LOOP FILTER (Pin 10)
Iiow-10
Ihigh-10
Output Current
Output Current
Long time constant
Short time constant
0.15
0.40
mA
mA
DELAYED LINE FLYBACK INPUT (Pin 13)
VTH-13
V13
Threshold
0.6
V
V
Allowed Voltage Range
Input Current
- 0.4
HVCC
5
I13
V13 < 0.6V
µA
7/15
STV2110B
DC AND AC ELECTRICAL CHARACTERISTICS (continued)
(HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
- 0.4
26
Typ.
Max. Unit
DIRECT BLANKING INPUT (Pin 2)
VTH-2
V2
Threshold
0.6
V
Allowed Voltage Range
Input Current
HVCC
5
V
I2
V2 < 0.6V
µA
HORIZONTAL OUTPUT (Pin 15)
T15
Output Pulse Width
28
1.5
6.8
6.2
12
29
µs
V
Vlow-15
V5 start
V5 stop
∆t15
Output Voltage (open collector)
HVCC Start Threshold
HVCC Stop Threshold
ϕ2 Phase Range
I15 = 10mA
V
V
µs
VERTICAL OUTPUT (Pin 14)
T14
Output Pulse Width
10.5
248 to 352
1
line
line
V
Tsync1
Vlow-14
Frame Synchro. Window (search)
Output Voltage (open collector)
Figure 1 : Contrast Control Curve
Figure 2 : Saturation Control Curve
RGB Output Signal
100%
RGB Output Signal
100%
50%
50%
0%
V16 (V)
V27 (V)
0%
2
3
4
5
2
3
4
5
Figure 3 : Difference between Black Level and
Measuring Level at RGB Outputs as
a Function of the Brightness Control
Input
∆V
2V
1V
0V
V36 (V)
-1V
2
3
4
5
8/15
STV2110B
Figure 4 : Pins 3-8-38-42 (COG, COB, COR, ICAT)
3-8-38
42
Figure 5 : Pins 37-39-40 (RIN, GIN, BIN)
Figure 6 : Pins 4-6-7 (ROUT, GOUT, BOUT)
4-6-7
37-39-40
Figure 7 : Pin 9 (YIN)
Figure 8 : Pin 10 (SLPF)
10
9
9/15
STV2110B
Figure 9 : Pin 11 (SXTL)
Figure 10 : Pin 12 (CVBS)
VREF
11
12
Figure 11 : Pins 2-13 (BLK, LFB)
Figure 12 : Pins 14 (VOUT)
14
2-13
Figure 13 : Pin 15 (HOUT)
Figure 14 : Pins 16-27 (CTR, SAT)
15
16-27
Mute
(Pin 27)
10/15
STV2110B
Figure 15 : Pin 20 (DLI)
20
VREF1
VREF2
IPAL
ISEC
Figure 16 : Pin 21 (PS)
Figure 17 : Pin 25 (F432)
VREF
25
21
11/15
STV2110B
Figure 18 : Pins 17-18 (SECIN, PALIN)
Figure 19 : Pins 28-31 (F440, F425)
VREF2
28
31
17
18
VREF
VREF
Figure 20 : Pins 26-29 (CDB, CDR)
Figure 21 : Pins 23-32 (CKS, CKP)
V
REF
26
29
23-32
Figure 22 : Pin 22 (DLO)
Figure 23 : Pin 36 (BRIG)
36
22
12/15
STV2110B
Figure 24 : Pin 30 (ACC)
IPAL
ISEC
30
Figure 25 : Pin 33 (CXTL)
Figure 26 : Pin 34 (CLPF)
Base Current
Compensation
Phase
Comparator
33
34
Figure 27 : Pin 35 (FBL)
35
13/15
STV2110B
APPLICATION DIAGRAM
Ω
5 6 0 k
Ω
4 7 k
Ω 7 5
Ω
6 8 0
Ω
1 0 0
1 N x 4 2 1 4 8
H V c c
14/15
STV2110B
PACKAGE MECHANICAL DATA
42 PINS - PLASTIC SHRINK DIP
E
E1
B
B1
e
e1
e2
D
c
E
42
22
21
.015
0,38
Gage Plane
e3
e2
1
SDIP42
Millimeters
Typ.
Inches
Typ.
Dimensions
Min.
Max.
Min.
Max.
A
A1
A2
B
5.08
0.200
0.51
3.05
0.020
0.120
0.0142
0.030
0.0090
1.490
0.60
3.81
0.46
1.02
0.25
38.10
4.57
0.56
0.150
0.0181
0.040
0.0098
1.5
0.180
0.0220
0.045
0.0150
1.510
0.629
0.570
0.36
B1
c
0.76
1.14
0.23
0.38
D
37.85
15.24
12.70
38.35
16.00
14.48
E
E1
e
13.72
1.778
15.24
0.50
0.540
0.070
0.60
e1
e2
e3
L
18.54
1.52
3.56
0.730
0.060
0.140
2.54
3.30
0.10
0.130
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of suchinformation nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwiseunder anypatent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
1996 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
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