TS555CDT [STMICROELECTRONICS]
Low power single CMOS timer; 低功耗，单CMOS计时器
| 型号： | TS555CDT |
| 厂家： | 
ST |
| 描述： | Low power single CMOS timer |
| 文件： | 总20页 (文件大小：234K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS555
Low power single CMOS timer
Features
■ Very low power consumption:
110 µA typ at V = 5 V
CC
90 µa typ at V = 3 V
CC
■ High maximum astable frequency of 2.7 MHz
N
DIP8
(Plastic package)
■ Pin-to-pin functionally-compatible with bipolar
NE555
■ Wide voltage range: +2 V to +16 V
■ Supply current spikes reduced during output
transitions
12
■ High input impedance: 10
Ω
■ Output compatible with TTL, CMOS and logic
D
SO8
MOS
(Plastic micropackage)
Description
The TS555 is a single CMOS timer with a very
low consumption:
(I
TS555 = 110 µA at V = +5 V versus
NE555 = 3 mA),
cc(TYP)
CC
P
I
cc(TYP)
TSSOP8
(Thin shrink small outline package)
and high frequency:
(f TS555 = 2.7 MHz versus
f(max.)
f
NE555 = 0.1 MHz).
(max)
Timing remains accurate in both monostable and
astable mode.
The TS555 provides reduced supply current
spikes during output transitions, which enable the
use of lower decoupling capacitors compared to
those required by bipolar NE555.
Pin connections
(top view)
12
With the high input impedance (10 Ω), timing
GND
Trigger
Output
Reset
1
2
3
4
8
7
6
5
V
CC
capacitors can also be minimized.
Discharge
Threshold
Control
Voltage
November 2008
Rev 2
1/20
www.st.com
20
Absolute maximum ratings and operating conditions
TS555
1
Absolute maximum ratings and operating conditions
Table 1.
Symbol
VCC
IOUT
Absolute maximum ratings
Parameter
Value
Unit
Supply voltage
+18
100
V
Output current
mA
Thermal resistance junction to ambient
DIP8 (1)
85
125
120
Rthja
°C/W
°C/W
SO8 (2)
TSSOP8 (2)
Thermal resistance junction to case
DIP8 (1)
41
40
37
Rthjc
SO8 (2)
TSSOP8 (2)
Tj
Junction temperature
+150
-65 to +150
1500
°C
°C
Tstg
Storage temperature range
Human body model (HBM)(3)
Machine model (MM)(4)
ESD
200
V
Charged device model (CDM)(5)
1000
1. Short-circuits can cause excessive heating. These values are typical and specified for a single layer PCB.
2. Short-circuits can cause excessive heating. These values are typical and specified for a four layers PCB.
3. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins remain floating.
5. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to the ground.
Table 2.
Symbol
VCC
Operating conditions
Parameter
Value
Unit
Supply voltage
2 to 16
V
Output sink current
Output source current
10
50
IOUT
mA
Operating free air temperature range
TS555C
TS555I
TS555M
0 to +70
-40 to +125
-55 to +125
Toper
°C
2/20
TS555
Schematic diagrams
2
Schematic diagrams
Figure 1.
Schematic diagram
3/20
Schematic diagrams
Figure 2.
TS555
Block diagram
V
Re se t
CC
4
8
TS555
R
R1
R
3
Q
O utp ut
Thre sho ld
6
5
+
Co ntro l
Vo lta g e
-
A
B
S
R
R
+
Trig g e r
2
-
7
Disc ha rg e
1
Gro und
Table 3.
Functions table
Reset
Trigger
Threshold
Output
Low
High
High
High
x
x
Low
High
Low
Low
High
High
x
High
Low
Previous state
Note:
LOW: level voltage ≤ minimum voltage specified.
HIGH: level voltage ≥ maximum voltage specified.
x: irrelevant.
4/20
TS555
Electrical characteristics
3
Electrical characteristics
Table 4.
Static electrical characteristics
= +2 V, T = +25° C, Reset to V (unless otherwise specified)
V
CC
amb
CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Supply current (no load, high and low states)
65
200
200
ICC
µA
Tmin. ≤Tamb ≤Tmax
Control voltage level
1.2
1.1
1.3
1.4
1.5
VCL
V
Tmin. ≤Tamb ≤Tmax
Discharge saturation voltage (Idis = 1 mA)
0.05
0.2
VDIS
IDIS
V
nA
V
Tmin. ≤Tamb ≤Tmax
0.25
Discharge pin leakage current
1
100
Low level output voltage (Isink = 1 mA)
0.1
0.3
VOL
Tmin. ≤Tamb ≤Tmax
0.35
High level output voltage (Isource = -0.3 mA)
1.5
1.5
1.9
VOH
V
V
Tmin. ≤Tamb ≤Tmax
Trigger voltage
0.4
0.3
0.67
0.95
1.05
VTRIG
Tmin. ≤Tamb ≤Tmax
ITRIG
ITH
Trigger current
10
10
pA
pA
Threshold current
Reset voltage
0.4
0.3
1.1
1.5
2.0
VRESET
V
Tmin. ≤Tamb ≤Tmax
IRESET Reset current
10
pA
5/20
Electrical characteristics
Table 5.
TS555
Static electrical characteristics
V
= +3 V, T
= +25° C, Reset to V (unless otherwise specified)
CC
amb CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Supply current (no load, high and low states)
90
230
230
ICC
µA
Tmin. ≤Tamb ≤Tmax
Control voltage level
2
2.2
2.3
1.8
1.7
VCL
V
Tmin. ≤Tamb ≤Tmax
Discharge saturation voltage (Idis = 1 mA)
0.05
0.2
VDIS
IDIS
V
nA
V
Tmin. ≤Tamb ≤Tmax
0.25
Discharge pin leakage current
1
100
Low level output voltage (Isink = 1 mA)
0.1
0.3
VOL
Tmin. ≤Tamb ≤Tmax
0.35
High level output voltage (Isource = -0.3 mA)
2.5
2.5
2.9
1
VOH
V
V
Tmin. ≤Tamb ≤Tmax
Trigger voltage
0.9
0.8
1.1
1.2
VTRIG
Tmin. ≤Tamb ≤Tmax
ITRIG
ITH
Trigger current
10
10
pA
pA
Threshold current
Reset voltage
0.4
0.3
1.1
1.5
2.0
VRESET
V
Tmin. ≤Tamb ≤Tmax
IRESET Reset current
10
pA
6/20
TS555
Electrical characteristics
Table 6.
Symbol
Dynamic electrical characteristics
= +3 V, T = +25° C, Reset to V (unless otherwise specified)
V
CC
amb
CC
Parameter
Min.
Typ.
Max.
Unit
Timing accuracy (monostable)(1)
R = 10 kΩ, C = 0.1 µF
%
VCC = 2 V
1
1
VCC = 3 V
Timing shift with supply voltage variations
(monostable)
%/V
R = 10 kΩ, C = 0.1 µF, VCC = 3 V 0.3 V (1)
0.5
75
2
Timing shift with temperature (1)
ppm/°C
MHz
%
Tmin. ≤Tamb ≤Tmax.5
Maximum astable frequency (2)
fmax
RA = 470 Ω, RB = 200 Ω, C = 200 pF
Astable frequency accuracy (2)
RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF
5
Timing shift with supply voltage variations
(astable mode) (2)
RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF,
VCC = 3 to 5 V
0.5
%/V
t
Output rise time (Cload = 10 pF)
Output fall time (Cload = 10 pF)
Trigger propagation delay
25
20
ns
ns
ns
ns
R
t
-
F
tPD
100
350
t
Minimum reset pulse width (Vtrig = 3 V)
RPW
1. See Figure 4.
2. See Figure 6.
7/20
Electrical characteristics
Table 7.
TS555
Static electrical characteristics
V
= +5 V, T
= +25° C, Reset to V (unless otherwise specified)
CC
amb CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Supply current (no load, high and low states)
110
250
250
ICC
µA
Tmin. ≤Tamb ≤Tmax
Control voltage level
2.9
2.8
3.3
0.2
3.8
3.9
VCL
V
Tmin.≤Tamb ≤Tmax
Discharge saturation voltage (Idis = 10 mA)
0.3
VDIS
IDIS
V
nA
V
Tmin. ≤Tamb≤Tmax
0.35
Discharge pin leakage current
1
100
Low level output voltage (Isink = 8 mA)
0.3
0.6
0.8
VOL
Tmin. ≤Tamb ≤Tmax
High level output voltage (Isource = -2 mA)
4.4
4.4
4.6
VOH
V
V
Tmin. ≤Tamb ≤Tmax
Trigger voltage
1.36
1.26
1.67
1.96
2.06
VTRIG
Tmin. ≤Tamb ≤Tmax
ITRIG
ITH
Trigger current
10
10
pA
pA
Threshold current
Reset voltage
0.4
0.3
1.1
1.5
2.0
VRESET
V
Tmin. ≤Tamb ≤Tmax
IRESET Reset current
10
pA
8/20
TS555
Electrical characteristics
m
Table 8.
Dynamic electrical characteristics
= +5 V, T = +25° C, Reset to V (unless otherwise specified)
V
CC
amb
CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Timing accuracy (monostable) (1)
R = 10 kΩ, C = 0.1 µF
2
%
Timing shift with supply voltage variations
(monostable) (1)
R = 10 kΩ, C = 0.1 µF,VCC = 5 V 1 V
Timing shift with temperature (1)
0.38
75
%/V
ppm/°C
MHz
%
Tmin. ≤Tamb ≤Tmax
5
Maximum astable frequency (2)
fmax
RA = 470 Ω, RB = 200 Ω, C = 200 pF
Astable frequency accuracy (2)
2.7
3
RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF
Timing shift with supply voltage variations
(astable mode) (2)
RA = RB = 10 kΩ, C = 0.1 µF, VCC = 5 to 12 V
0.1
25
%/V
ns
t
Output rise time (Cload = 10 pF)
R
t
Output fall time (Cload = 10 pF)
20
-
ns
F
tPD
Trigger propagation delay
100
350
ns
t
Minimum reset pulse width (Vtrig = 5 V)
ns
RPW
1. See Figure 4.
2. See Figure 6.
9/20
Electrical characteristics
Table 9.
TS555
Static electrical characteristics
= +12 V, T = +25° C, Reset to V (unless otherwise specified)
V
CC
amb
CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Supply current (no load, high and low states)
170
400
400
ICC
µA
Tmin. ≤Tamb ≤Tmax
Control voltage level
7.4
7.3
8
8.6
8.7
VCL
V
Tmin. ≤Tamb ≤Tmax
Discharge saturation voltage (Idis = 80 mA)
0.09
1.5
2.0
VDIS
IDIS
V
nA
V
Tmin. ≤Tamb ≤Tmax
Discharge pin leakage current
1
100
Low level output voltage (Isink = 50 mA)
1.2
2
VOL
Tmin. ≤Tamb ≤Tmax
2.8
High level output voltage (Isource = -10 mA)
10.5
10.5
11
4
VOH
V
V
Tmin. ≤Tamb ≤Tmax
Trigger voltage
3.2
3.1
4.8
4.9
VTRIG
Tmin. ≤Tamb ≤Tmax
ITRIG
ITH
Trigger current
10
10
pA
pA
Threshold current
Reset Voltage
0.4
0.3
1.1
1.5
2.0
VRESET
V
Tmin. ≤Tamb ≤Tmax
IRESET Reset current
10
pA
Table 10. Dynamic electrical characteristics
V
= +12 V, T
= +25° C, Reset to V (unless otherwise specified)
CC
amb CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Timing accuracy (monostable) (1)
R = 10 kΩ, C = 0.1 µF, VCC = +12 V
4
%
Timing shift with supply voltage variations
(monostable) (1)
0.38
%/V
R = 10 kΩ, C = 0.1 µF, VCC = +5 V 1 V
Timing shift with temperature
Tmin. ≤Tamb ≤Tmax., VCC = +5 V
Maximum astable frequency (2)
75
ppm/°C
MHz
fmax
RA = 470 Ω, RB = 200 Ω, C = 200 pF, VCC = +5 V
2.7
Astable frequency accuracy
RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF,
VCC = +12 V
3
%
Timing shift with supply voltage variations
(astable mode)
RA = RB = 1 kΩ to 100 kΩ, C = 0.1 µF,
VCC = 5 to +12 V
0.1
%/V
1. See Figure 4.
2. See Figure 6.
10/20
TS555
Electrical characteristics
Figure 3.
Supply current (per timer) versus supply voltage
300
200
100
0
4
8
12
16
SUPPLY VOLTAGE, VCC (V)
11/20
Application information
TS555
4
Application information
4.1
Monostable operation
In monostable mode, the timer operates like a one-shot generator. The external capacitor is
initially held discharged by a transistor inside the timer, as shown in Figure 4.
Figure 4.
Application schematic
V
CC
Reset
R
4
8
Trigger
7
6
2
C
TS555
5
Out
3
Control Voltage
1
μ
0.01
F
The circuit triggers on a negative-going input signal when the level reaches 1/3 V . Once
CC
triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered
again during this interval. The duration of the output HIGH state is given by t = 1.1 R x C.
Since the charge rate and threshold level of the comparator are both directly proportional to
the supply voltage, the timing interval is independent of the supply. Applying a negative
pulse simultaneously to the Reset terminal (pin 4) and the Trigger terminal (pin 2) during the
timing cycle discharges the external capacitor and causes the cycle to start over. The timing
cycle then starts on the positive edge of the reset pulse. While the reset pulse is applied, the
output is driven to the LOW state.
When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short
circuit across the external capacitor and driving the output HIGH. The voltage across the
capacitor increases exponentially with the time constant τ = R x C.
When the voltage across the capacitor equals 2/3 V , the comparator resets the flip-flop
CC
which then discharges the capacitor rapidly and drives the output to its LOW state. Figure 5
shows the actual waveforms generated in this mode of operation.
When Reset is not used, it should be tied high to avoid any false triggering.
Figure 5.
Timing diagram
t = 0.1 ms / div
INPUT = 2.0V/div
OUTPUT VOLTAGE = 5.0V/div
CAPACITOR VOLTAGE = 2.0V/div
μ Ω
Ω
, C = 0.01 F , R = 1.0k
L
R = 9.1k
12/20
TS555
Application information
4.2
Astable operation
When the circuit is connected as shown in Figure 6 (pins 2 and 6 connected) it triggers itself
and runs as a multi-vibrator. The external capacitor charges through R and R and
A
B
discharges through R only. Therefore, the duty cycle may be precisely set by the ratio of
B
these two resistors.
In the astable mode of operation, C charges and discharges between 1/3 V and 2/3 V
.
CC
CC
As in the triggered mode, the charge and discharge times, and therefore frequency, are
independent of the supply voltage.
Figure 6.
Application schematic
V
CC
Reset
R
A
4
8
3
7
6
Out
R
B
TS555
Control
Voltage
5
1
2
C
μ
0.01
F
Figure 7 shows actual waveforms generated in this mode of operation.
The charge time (output HIGH) is given by:
t1 = 0.693 (R + R ) C
A
B
The discharge time (output LOW) by:
t2 = 0.693 x R x C
B
Thus the total period T is given by:
T = t1 + t2 = 0.693 (R + 2R ) C
A
B
The frequency of oscillation is then:
1
T
1.44
(RA + 2RB)C
f = --- = -------------------------------------
The duty cycle is given by:
RB
D = ---------------------------
RA + 2RB
Figure 7.
Timing diagram
t = 0.5 ms / div
OUTPUT VOLTAGE = 5.0V/div
CAPACITOR VOLTAGE = 1.0V/div
μ
Ω Ω
= R = 4.8 k , C = 0.1 F , R = 1.0k
L
B
R
A
13/20
Package information
TS555
5
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
®
ECOPACK packages. These packages have a lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
14/20
TS555
Package information
5.1
DIP8 package information
Figure 8.
DIP8 package mechanical drawing
Table 11. DIP8 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
5.33
0.210
0.38
2.92
0.36
1.14
0.20
9.02
7.62
6.10
0.015
0.115
0.014
0.045
0.008
0.355
0.300
0.240
3.30
0.46
1.52
0.25
9.27
7.87
6.35
2.54
7.62
4.95
0.56
1.78
0.36
10.16
8.26
7.11
0.130
0.018
0.060
0.010
0.365
0.310
0.250
0.100
0.300
0.195
0.022
0.070
0.014
0.400
0.325
0.280
b2
c
D
E
E1
e
eA
eB
L
10.92
3.81
0.430
0.150
2.92
3.30
0.115
0.130
15/20
Package information
TS555
5.2
SO-8 package information
Figure 9.
SO-8 package mechanical drawing
Table 12. SO-8 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
A2
b
1.75
0.25
0.069
0.010
0.10
1.25
0.28
0.17
4.80
5.80
3.80
0.004
0.049
0.011
0.007
0.189
0.228
0.150
0.48
0.23
5.00
6.20
4.00
0.019
0.010
0.197
0.244
0.157
c
D
4.90
6.00
3.90
1.27
0.193
0.236
0.154
0.050
E
E1
e
h
0.25
0.40
0.50
1.27
0.010
0.016
0.020
0.050
L
L1
k
1.04
0.040
1°
8°
1°
8°
ccc
0.10
0.004
16/20
TS555
Package information
5.3
TSSOP8 package information
Figure 10. TSSOP8 package mechanical drawing
Table 13. TSSOP8 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.2
0.047
0.006
0.041
0.012
0.008
0.122
0.260
0.177
0.05
0.80
0.19
0.09
2.90
6.20
4.30
0.15
1.05
0.30
0.20
3.10
6.60
4.50
0.002
0.031
0.007
0.004
0.114
0.244
0.169
1.00
0.039
c
D
3.00
6.40
4.40
0.65
0.118
0.252
0.173
0.0256
E
E1
e
k
0°
8°
0°
8°
L
0.45
0.60
1
0.75
0.018
0.024
0.039
0.004
0.030
L1
aaa
0.1
17/20
Ordering information
TS555
6
Ordering information
Table 14. Order codes
Order code Temperature range
TS555CN
Package
Packaging
Marking
DIP8
Tube
TS555CN
555C
TS555CD
Tube or
Tape & reel
0°C, +70°C
-40°C, +125°C
-55°C, +125°C
SO-8
TS555CDT
TS555CPT
TS555IN
TSSOP8
DIP8
Tape & reel
Tube
555C
TS555IN
TS555ID
Tube or
Tape & reel
SO-8
555I
TS555IDT
TS555IPT
TS555MN
TSSOP8
DIP8
Tape & reel
Tube
555I
TS555CM
TS555MD
Tube or
Tape & reel
SO-8
555M
555M
TS555MDT
TS555MPT
TSSOP8
Tape & reel
18/20
TS555
Revision history
7
Revision history
Table 15. Document revision history
Date
Revision
Changes
01-Feb-2003
1
Initial release.
Document reformatted.
Added output current, ESD and thermal resistance values in
Table 1: Absolute maximum ratings.
03-Nov-2008
2
Added output current values in Table 2: Operating conditions.
19/20
TS555
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