TSU101RILT [STMICROELECTRONICS]
Nanopower, rail-to-rail input and output, 5 V CMOS operational amplifiers; 纳安级功耗，轨到轨输入和输出，5V CMOS运算放大器
| 型号： | TSU101RILT |
| 厂家： | 
ST |
| 描述： | Nanopower, rail-to-rail input and output, 5 V CMOS operational amplifiers |
| 文件： | 总33页 (文件大小：1102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSU101, TSU102, TSU104
Nanopower, rail-to-rail input and output, 5 V CMOS
operational amplifiers
Datasheet - production data
• Application performances guaranteed over
industrial temperature range
• Fast desaturation
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Applications
• Ultra long life battery-powered applications
• Power metering
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• UV and photo sensors
• Electrochemical and gas sensors
• Pyroelectric passive infrared (PIR) detection
• Battery current sensing
• Medical instrumentation
• RFID readers
Description
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The TSU101, TSU102, and TSU104 operational
amplifiers offer an ultra low-power consumption of
580 nA typical and 750 nA maximum per channel
when supplied by 1.8 V. Combined with a supply
voltage range of 1.5 V to 5.5 V, these features
allow the TSU10x series to be efficiently supplied
by a coin type Lithium battery or a regulated
voltage in low-power applications.
Features
• Submicro ampere current consumption:
580 nA typ per channel at 25 °C at VCC = 1.8 V
• Low supply voltage: 1.5 V - 5.5 V
• Unity gain stable
• Rail-to-rail input and output
The 8 kHz gain bandwidth of these devices make
them ideal for sensor signal conditioning, battery
supplied, and portable applications.
• Gain bandwidth product: 8 kHz typ
• Low input bias current: 5 pA max at 25 °C
• High tolerance to ESD: 2 kV HBM
• Industrial temperature range: -40 °C to +85 °C
Benefits
• 42 years of typical equivalent lifetime (for
TSU101) if supplied by a 220 mAh coin type
Lithium battery
• Tolerance to power supply transient drops
• Accurate signal conditioning of high impedance
sensors
July 2013
DocID024317 Rev 2
1/33
This is information on a product in full production.
www.st.com
Contents
TSU101, TSU102, TSU104
Contents
1
2
3
4
Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 17
Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Schematic optimization aiming for nanopower . . . . . . . . . . . . . . . . . . . . . 19
PCB layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Using the TSU10x series with sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Fast desaturation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Using the TSU10x series in comparator mode . . . . . . . . . . . . . . . . . . . . . 22
4.10 ESD structure of TSU10x series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
5.2
5.3
5.4
5.5
5.6
SC70-5 (or SOT323-5) package mechanical data . . . . . . . . . . . . . . . . . . 25
SOT23-5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
QFN16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Package pin connections
1
Package pin connections
Figure 1. Pin connections for each package (top view)
ꢆ
ꢀ
ꢁ
ꢃ
ꢋ
,1ꢍ
9&&ꢂ
,1ꢂ
9&&ꢍ
287
ꢆ
ꢀ
ꢃ
ꢋ
287
9&&ꢍ
,1ꢂ
ꢍ
ꢂ
9&&ꢂ
ꢍ
ꢂ
,1ꢍ
ꢁ
SC70-5/SOT23-5 (TSU101)
SC70-5/SOT23-5 (TSU101R)
287ꢆ
,1ꢆꢂ
ꢆ
ꢀ
ꢁ
ꢋ
ꢊ
9&&ꢍ
287ꢀ
,1ꢀꢂ
287ꢆ
,1ꢆꢂ
9&&ꢍ
287ꢀ
ꢉ
ꢌ
,1ꢆꢍ
9&&ꢂ
,1ꢆꢍ
,1ꢀꢂ
9&&ꢂ
,1ꢀꢍ
ꢃ
,1ꢀꢍ
DFN8 2x2 (TSU102)
MiniSO8 (TSU102)
1
2
3
Out1
In1-
14 Out4
13 In4-
In1+
Vcc+
In2+
In2-
In4+
11 Vcc-
12
4
5
6
7
10
In3+
In3-
9
8
Out3
Out2
TSSOP14 (TSU104)
QFN16 3x3 (TSU104)
DocID024317 Rev 2
3/33
33
Absolute maximum ratings and operating conditions
TSU101, TSU102, TSU104
2
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Parameter
Symbol
Value
Unit
Vcc
Vid
Vin
Iin
Supply voltage(1)
6
Differential input voltage(2)
Input voltage(3)
±Vcc
Vcc- - 0.2 to Vcc+ + 0.2
10
V
Input current(4)
mA
°C
Tstg
Storage temperature
-65 to +150
Thermal resistance junction to ambient(5)(6)
SC70-5
205
250
117
190
45
SOT23-5
DFN8 2x2
MiniSO8
QFN16 3x3
TSSOP14
Rthja
°C/W
100
Tj
Maximum junction temperature
HBM: human body model(7)
MM: machine model(8)
150
2000
200
°C
V
ESD
CDM: charged device model(9)
All other packages except SC70-5
SC70-5
1000
900
Latch-up immunity(10)
200
mA
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. (Vcc+ - Vin) must not exceed 6 V, (Vin - Vcc-) must not exceed 6 V.
4. The input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Related to ESDA/JEDEC JS-001 Apr. 2010
8. Related to JEDEC JESD22-A115C Nov.2010
9. Related to JEDEC JESD22-C101-E Dec. 2009
10. Related to JEDEC JESD78C Sept. 2010
Table 2. Operating conditions
Symbol
Parameter
Value
Unit
Vcc
Vicm
Toper
Supply voltage
1.5 to 5.5
Vcc- - 0.1 to Vcc+ + 0.1
-40 to +85
V
Common mode input voltage range
Operating free air temperature range
°C
4/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
3
Electrical characteristics
Table 3. Electrical characteristics at V
= 1.8 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified)
L
cc
Symbol
DC performance
Vio Input offset voltage
Parameter
Conditions
Min.
Typ.
Max.
Unit
-3
0.1
3
3.4
5
mV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
-3.4
ΔVio/ΔT Input offset voltage drift
μV/°C
μV
month
Long-term input offset
voltage drift
--------------------------
ΔVio
T = 25 °C(1)
0.18
1
5
30
5
Iio
Input offset current (2)
Input bias current (2)
-40 °C < T< 85 °C
-40 °C < T< 85 °C
pA
1
Iib
30
V
icm = 0 to 0.6 V, Vout = VCC/2
65
65
55
55
85
74
-40 °C < T< 85 °C
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
CMR
Vicm = 0 to 1.8 V, Vout = VCC/2
-40°C < T< 85 °C
dB
Vout = 0.3 V to (VCC+ - 0.3 V)
RL = 100 kΩ
95
95
115
Avd
Large signal voltage gain
-40 °C < T< 85 °C
RL = 100 kΩ
40
40
40
40
High level output voltage
(drop from VCC+)
VOH
-40 °C < T< 85 °C
RL = 100 kΩ
mV
VOL
Low level output voltage
Output sink current
-40 °C < T< 85 °C
V
out = VCC , VID = -200 mV
-40 °C < T< 85 °C
out = 0 V, VID = + 200 mV
4
4
4
4
5
5
Iout
mA
nA
V
Output source current
-40 °C < T< 85 °C
No load, Vout = VCC/2
-40 °C < T< 85 °C
580
750
800
Supply current
(per channel)
ICC
AC performance
GBP
Fu
Gain bandwidth product
8
8
kHz
Unity gain frequency
Phase margin
RL = 1 MΩ, CL = 60 pF
Φm
60
10
degrees
dB
Gm
Gain margin
DocID024317 Rev 2
5/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 3. Electrical characteristics at V
= 1.8 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified) (continued)
L
cc
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
RL = 1 MΩ, CL = 60 pF
Vout = 0.3 V to (VCC+ - 0.3 V)
SR
Slew rate (10 % to 90 %)
3
V/ms
f = 100 Hz
f = 1 kHz
265
265
nV
Equivalent input noise
voltage
-----------
en
∫ en
in
Hz
Low-frequency peak-to-
peak input noise
Bandwidth: f = 0.1 to 10 Hz
9
µVpp
f = 100 Hz
f = 1 kHz
0.64
4.4
Equivalent input noise
current
fA
-----------
Hz
100 mV from rail in comparator
RL = 100 kΩ, VID = ±VCC
-40 °C < T< 85 °C
trec
Overload recovery time
30
µs
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
6/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Table 4. Electrical characteristics at V
= 3.3 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified)
L
cc
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
-3
0.1
3
3.4
5
Vio
Input offset voltage
mV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
-3.4
ΔVio/ΔT Input offset voltage drift
μV/°C
μV
month
Long-term input offset
voltage drift
--------------------------
ΔVio
T = 25 °C(1)
0.36
1
5
30
5
Iio
Input offset current(2)
Input bias current(2)
-40 °C < T< 85 °C
-40 °C < T< 85 °C
pA
1
Iib
30
V
icm = 0 to 2.1 V, Vout = VCC/2
-40 °C < T< 85 °C
icm = 0 to 3.3 V, Vout = VCC/2
70
70
60
60
92
77
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
CMR
V
dB
-40 °C < T< 85 °C
Vout = 0.3 V to (VCC+ - 0.3 V)
RL= 100 kΩ
105
105
120
Avd
Large signal voltage gain
-40 °C < T< 85 °C
RL = 100 kΩ
40
40
40
40
High level output voltage
(drop from VCC+)
VOH
-40 °C < T< 85 °C
RL = 100 kΩ
mV
VOL
Low level output voltage
Output sink current
-40 °C < T< 85 °C
Vout = VCC , VID= -200 mV
-40 °C < T< 85 °C
6
6
8
8
9
Iout
mA
nA
Vout = 0 V, VID = + 200 mV
11
Output source current
-40 °C < T< 85 °C
No load, Vout = VCC/2
-40 °C < T< 85 °C
600
800
850
Supply current
(per channel)
ICC
AC performance
GBP
Fu
Gain bandwidth product
8
8
kHz
Unity gain frequency
Phase margin
RL = 1 MΩ, CL = 60 pF
Φm
60
11
degrees
dB
Gm
Gain margin
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+ - 0.3 V)
SR
Slew rate (10 % to 90 %)
3
V/ms
DocID024317 Rev 2
7/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 4. Electrical characteristics at V
= 3.3 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified) (continued)
L
cc
Symbol
Parameter
Conditions
Min.
Typ.
260
255
Max.
Unit
f = 100 Hz
f = 1 kHz
Equivalent input noise
voltage
nV
-----------
en
Hz
Low-frequency peak-to-
peak input noise
∫ en
Bandwidth: f = 0.1 to 10 Hz
8.6
µVpp
f = 100 Hz
f = 1 kHz
0.55
3.8
Equivalent input noise
current
fA
Hz
-----------
in
100 mV from rail in comparator
RL = 100 kΩ, VID= ±VCC
-40 °C < T< 85 °C
trec
Overload recovery time
30
µs
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
8/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Table 5. Electrical characteristics at V
= 5 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified)
L
cc
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
-3
0.1
3
3.4
5
Vio
Input offset voltage
mV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
-3.4
ΔVio/ΔT Input offset voltage drift
μV/°C
μV
month
Long-term input offset
voltage drift
--------------------------
ΔVio
T = 25 °C(1)
1.1
1
5
30
5
Iio
Input offset current(2)
Input bias current (2)
-40 °C < T< 85 °C
-40 °C < T< 85 °C
pA
1
Iib
30
V
icm = 0 to 3.8 V, Vout = VCC/2
70
70
65
65
70
70
90
82
90
-40 °C < T< 85 °C
Common mode rejection
ratio 20 log (ΔVicm/ΔVio)
CMR
Vicm = 0 to 5 V, Vout = VCC/2
-40 °C < T< 85 °C
dB
VCC = 1.5 to 5.5 V, Vicm = 0 V
-40 °C < T< 85 °C
Supply voltage rejection
ratio
SVR
Avd
Vout = 0.3 V to (Vcc+ - 0.3 V)
RL= 100 kΩ
110
110
130
Large signal voltage gain
-40°C < T< 85 °C
RL = 100 kΩ
40
40
40
40
High level output voltage
(drop from VCC+)
VOH
-40 °C < T< 85 °C
RL = 100 kΩ
mV
VOL
Low level output voltage
Output sink current
-40 °C < T< 85 °C
V
out = VCC , VID = -200 mV
-40 °C < T< 85 °C
out = 0 V, VID = + 200 mV
6
6
8
8
9
Iout
mA
nA
V
11
Output source current
-40 °C < T< 85 °C
No load, Vout = VCC/2
-40 °C < T< 85 °C
650
850
950
Supply current
(per channel)
ICC
AC performance
GBP
Fu
Gain bandwidth product
9
kHz
Unity gain frequency
Phase margin
8.6
60
12
RL = 1 MΩ, CL = 60 pF
Φm
degrees
dB
Gm
Gain margin
DocID024317 Rev 2
9/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Table 5. Electrical characteristics at V
= 5 V with V = 0 V, V
= V /2, T
= 25 ° C, and
cc+
cc-
icm
cc
amb
R = 1 MΩ connected to V /2 (unless otherwise specified) (continued)
L
cc
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+ - 0.3 V)
SR
Slew rate (10 % to 90 %)
3
V/ms
f = 100 Hz
f = 1 kHz
240
225
nV
Equivalent input noise
voltage
-----------
en
∫ en
in
Hz
Low-frequency
peak-to-peak input noise
Bandwidth: f = 0.1 to 10 Hz
8.1
µVpp
f = 100 Hz
f = 1 kHz
0.18
3.5
Equivalent input noise
current
fA
-----------
Hz
100 mV from rail in comparator
RL = 100 kΩ, VID= ±VCC
-40 °C < T< 85 °C
trec
Overload recovery time
30
µs
Vin = -10 dBm, f = 400 MHz
73
88
80
80
V
in = -10 dBm, f = 900 MHz
Vin = -10 dBm, f = 1.8 GHz
in = -10 dBm, f = 2.4 GHz
Electromagnetic
EMIRR
dB
interference rejection ratio(3)
V
1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
2. Guaranteed by design.
3. Based on evaluations performed only in conductive mode.
10/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Figure 2. Supply current vs. supply voltage
Figure 3. Supply current vs. input common
mode voltage
1.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Vicm=Vout=Vcc/2
0.9
T=85°C
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
T=85°C
T=25°C
T=25°C
T=-40°C
T=-40°C
Vcc=3.3V, Vout=Vcc/2
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
Supply voltage (V)
Input common mode voltage (V)
Figure 4. Supply current in saturation mode
Figure 5. Input offset voltage distribution
1.0
50
Vio distribution at T=25°C
Vcc=3.3V, Vicm=1.65V
0.9
45
Temperature
85°C/65°C/45°C/25°C/-5°C/-40°C
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
40
35
30
25
20
15
10
5
Vcc=3.3V
Follower configuration
0
-3
-2
-1
0
1
2
3
Input offset voltage (mV)
Input voltage (mV)
Figure 6. Input offset voltage vs. common mode Figure 7. Input offset voltage vs. temperature at
voltage 3.3 V supply voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
5
4
3
2
Limit for TSU10x
T=25°C
Vcc=3.3V
1
0
-1
-2
-3
-4
-5
T=85°C
Vcc=3.3V, Vicm=1.65V
T=-40°C
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
-60
-40
-20
0
20
40
60
80
100
Common mode voltage (V)
Temperature (°C)
DocID024317 Rev 2
11/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 8. Input offset voltage temperature
Figure 9. Input bias current vs. temperature at
coefficient distribution
mid V
ICM
30
20
15
10
5
Δ
Vio/ΔT distribution
between T=-40°C and 85°C
for Vcc=3.3V, Vicm=1.65V
25
20
15
10
5
Vcc=3.3V
Vcc=1.8V
Vcc=5V
0
-5
Vicm=Vcc/2
-10
-15
-20
0
-5
-4
-3
-2
-1
0
1
2
3
4
5
-40
-20
0
20
40
60
80
Δ
Vio/ΔT (µV/°C)
Temperature (°C)
Figure 10. Input bias current vs. temperature at Figure 11. Input bias current vs. temperature at
low V
high V
ICM
ICM
20
15
10
5
20
15
10
5
Vcc=3.3V
Vcc=5V
Vicm=0V
Vcc=1.8V
0
0
-5
-5
Vcc=1.8V
Vicm=Vcc
Vcc=3.3V
Vcc=5V
-10
-15
-20
-10
-15
-20
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
Temperature (°C)
Temperature (°C)
Figure 12. Output characteristics at 1.8 V
supply voltage
Figure 13. Output characteristics at 3.3 V
supply voltage
3.3
3.0
1.8
1.6
Source
2.7
Source
Vid=0.2V
Vid=0.2V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.4
T=25°C
2.1
Vcc=3.3V
T=85°C
Vicm=0.1V
Vcc=1.8V
Vicm=0.1V
T=25°C
1.8
1.5
1.2
T=85°C
0.9
Sink
Vid=-0.2V
Sink
Vid=-0.2V
0.6
0.3
0.0
T=-40°C
T=-40°C
8
0
1
2
3
4
5
6
7
9
10
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Output Current (mA)
Output Current (mA)
12/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Figure 14. Output characteristics at 5 V supply
Figure 15. Output voltage vs. input voltage
close to the rails
voltage
5.0
3300
3275
3250
4.5
Temperature
85°C/65°C/45°C/25°C/-5°C/-40°C
Source
Vid=0.2V
3225
4.0
3200
3175
3150
3125
3100
T=25°C
T=85°C
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Vcc=5V
Vicm=0.1V
175
150
125
Vcc=3.3V
100
Follower configuration
75
T=-40°C
Sink
Vid=-0.2V
50
25
0
0
1
2
3
4
5
6
7
8
9
10
Output Current (mA)
Input voltage (mV)
Figure 16. Output saturation with a sine wave
on input
Figure 17. Desaturation time
3.300
3
3.275
3.250
Gain=+11, 100kΩ/1MΩ, Vin=3Vpp, T=25°C
Vin
2
1
Vout
3.225
3.200
Follower configuration, T=25°C
3.175
Vcc=3.3V, Vin from rail to 300mV from rail
3.150
0
Vrl=Vrail, f=10Hz, Rl=10M
Ω, Cl=16pF
0.125
0.100
0.075
0.050
0.025
0.000
-1
-2
-3
Vout
Vcc=3.3V, Vicm=Vrl=1.65V
Rl=10M
Ω
, Cl=16pF
Vin
-5
0
5
10 15 20 25 30 35 40 45 50 55 60
0
1
2
3
4
5
Time (ms)
Time (ms)
Figure 18. Phase reversal free
Figure 19. Slew rate vs. supply voltage
4.0
3.5
3.0
2.5
2.0
1.5
2
1
T=-40°C
Vicm=Vrl=Vcc/2
Rl=1M , Cl=60pF
Vin from 0.5V to Vcc-0.5V
1.0
0.5
0.0
Follower configuration, T=25°C
Vcc=3.3V, Vicm=Vrl=1.65V
Ω
0
Rl=10M
Ω
, Cl=16pF
SR calculated from 10% to 90%
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
T=25°C
-1
-2
T=85°C
4.5
0
25
50
75
100
125
150
1.5
2.0
2.5
3.0
3.5
Vcc (V)
4.0
5.0
5.5
Time (ms)
DocID024317 Rev 2
13/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 20. Output swing vs. input signal
Figure 21. Triangulation of a sine wave
frequency
4.0
3
Follower configuration, Vin=3Vpp, F=1kHz
2
3.5
3.0
2.5
1
0
2.0
Follower configuration
Vcc=3.3V, Vin=3.3Vpp
Vicm=Vrl=1.65V
1.5
-1
Rl=10MΩ, Cl=16pF
1.0
0.5
0.0
T=25°C
-2
-3
Vcc=3.3V, Vicm=Vrl=1.65V
Rl=10M , Cl=16pF, T=25°C
Ω
10
100
1000
10000
0
1
2
3
4
Frequency (Hz)
Time (ms)
Figure 22. Large signal response at 3.3 V
supply voltage
Figure 23. Small signal response at 3.3 V supply
voltage
35
30
25
20
15
10
5
Follower configuration, T=25°C
2
1
Follower configuration, T=25°C
0
0
-5
-10
-15
-20
-25
-30
-35
-1
-2
Vcc=3.3V
Vicm=Vrl=1.65V
Vcc=3.3V
Vicm=Vrl=1.65V
Rl=10M , Cl=16pF
Rl=10M
Ω
, Cl=16pF
Ω
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0
1
2
3
4
5
6
7
8
9
10
Time (ms)
Time (ms)
Figure 24. Overshoot vs. capacitive load at
3.3 V supply voltage
Figure 25. Phase margin vs. capacitive load at
3.3 V supply voltage
30
70
65
60
55
50
45
40
35
30
28
25
23
20
18
15
13
10
8
Vcc=3.3V, Vicm=Vrl=1.65V
Follower configuration
50mVpp step
Rl=10MΩ, T=25°C
Vcc=3.3V, Vicm=Vrl=1.65V
25
Gain 101 : Rg=10kΩ, Rf=1MΩ
20
15
10
5
Rl=10M
Ω
T=25°C
5
3
0
0
0
50
100
Capacitive load (pF)
150
200
0
50
100
150
200
250
Capacitive load (pF)
14/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Electrical characteristics
Figure 26. Bode diagram for different feedback Figure 27. Bode diagram at 1.8 V supply voltage
values
20
15
10
5
45
180
150
120
90
Feedback : 1M
Ω
Gain
30
T=-40°C
Vcc=3.3V, Vicm=1.65V, T=25°C
Gain=1
Rl=10MΩ, Cl=16pF, Vrl=Vcc/2
15
60
30
0
0
0
T=85°C
-30
-60
-90
-120
-150
-180
Phase
-5
Feedback : 1M
Ω
//47pF
Feedback : 100k
-15
-30
-45
T=25°C
-10
-15
-20
Ω
Vcc=1.8V, Vicm=0.9V
G=101 (10k /1M
Rl=10M , Cl=60pF, Vrl=Vcc/2
Ω
Ω)
Ω
10
100
1000
10000
10
100
1000
10000
Frequency (Hz)
Frequency (Hz)
Figure 28. Bode diagram at 3.3 V supply voltage Figure 29. Bode diagram at 5 V supply voltage
45
180
150
120
90
45
180
150
120
90
Gain
Gain
30
30
T=-40°C
T=-40°C
15
60
15
60
30
30
0
0
T=85°C
0
0
T=85°C
-30
-60
-90
-120
-150
-180
-30
-60
-90
-120
-150
-180
Phase
Phase
-15
-30
-45
T=25°C
-15
-30
-45
T=25°C
Vcc=5V, Vicm=2.5V
G=101 (10kΩ/1MΩ)
Rl=10MΩ, Cl=60pF, Vrl=Vcc/2
Vcc=3.3V, Vicm=1.65V
G=101 (10k /1M
Rl=10M , Cl=60pF, Vrl=Vcc/2
Ω
Ω)
Ω
10
100
1000
10000
10
100
1000
10000
Frequency (Hz)
Frequency (Hz)
Figure 30. Gain bandwidth product vs. input Figure 31. Gain vs. input common mode voltage
common mode voltage
10
9
8
7
6
5
4
3
2
1
0
100
Vcc=3.3V, Vicm=Vrl
Gain 101 : Rg=10kΩ, Rf=1MΩ
Rl=10MΩ, Cl=60pF
T=25°C
Recommended resistor to
place between the output
of the op-amp and the
capacitive load
Vcc=3.3V, Vicm=1.65V
Follower configuration
Measured at 20dB
10
10-2
10-1
100
Capacitive load (nF)
101
102
103
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Vicm (V)
DocID024317 Rev 2
15/33
33
Electrical characteristics
TSU101, TSU102, TSU104
Figure 32. Noise at 1.8 V supply voltage in
follower configuration
Figure 33. Noise at 3.3 V supply voltage in
follower configuration
10000
10000
Vcc=1.8V
Follower configuration
T=25°C
Vcc=3.3V
Follower configuration
T=25°C
1000
1000
Vicm=1.65V
Vicm=0.9V
100
100
Vicm=3V
Vicm=1.5V
10
10
10
10
100
1000
Frequency (Hz)
10000
100000
100
1000
Frequency (Hz)
10000
100000
Figure 34. Noise at 5 V supply voltage in
follower configuration
Figure 35. Noise amplitude on 0.1 to 10 Hz
frequency range
20
10000
15
10
5
Vcc=5V
Follower configuration
T=25°C
1000
Vicm=2.5V
0
-5
100
Vicm=4.7V
-10
-15
-20
Vcc=3V, Vicm=1.65V
Bandpass filter : 0.1Hz to 10Hz
T=25°C
10
10
0
1
2
3
4
5
6
7
8
9
10
100
1000
10000
100000
Time (s)
Frequency (Hz)
Figure 36. Channel separation on TSU102
Figure 37. Channel separation on TSU104
140
140
Ch1 - Ch2
120
100
80
Ch1 - Ch3
Ch1 - Ch4
120
100
80
60
60
Vcc=5V
40
Vcc=5V
40
V
icm=2.5V
Vicm=2.5V
Vin=2Vpp
Vin=2Vpp
T=25°C
20
0
20
0
T=25°C
10
100
Frequency (Hz)
1k
10k
10
100
Frequency (Hz)
1k
10k
16/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Application information
4
Application information
4.1
Operating voltages
The TSU101, TSU102, and TSU104 series of amplifiers can operate from 1.5 V to 5.5 V.
Their parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply voltages and are very
stable in the full V range. Additionally, main specifications are guaranteed on the
CC
industrial temperature range from -40 to +85 ° C.
4.2
4.3
Rail-to-rail input
The TSU101, TSU102, and TSU104 series is built with two complementary PMOS and
NMOS input differential pairs. Thus, these devices have a rail-to-rail input, and the input
common mode range is extended from V
- 0.1 V to V
+ 0.1 V.
CC-
CC+
The devices have been designed to prevent phase reversal behavior.
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed in Equation 1.
Equation 1
ΔVio
Vio(T) – Vio(25° C)
----------- = max
ΔT
--------------------------------------------------
T – 25° C
with T = -40 °C and 85 °C.
The datasheet maximum value is guaranteed by measurements on a representative sample
size ensuring a C (process capability index) greater than 2.
pk
DocID024317 Rev 2
17/33
33
Application information
TSU101, TSU102, TSU104
4.4
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
•
•
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
(VS – VU)
AFV = eβ ⋅
Where:
A
is the voltage acceleration factor
FV
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
V is the stress voltage used for the accelerated test
S
V is the voltage used for the application
U
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.
Equation 3
Ea
------ ⋅ ------ – ------
1
1
⎛
⎞
⎠
⎝
AFT = e k
TU TS
Where:
A
is the temperature acceleration factor
FT
E is the activation energy of the technology based on the failure rate
a
-5
-1
k is the Boltzmann constant (8.6173 x 10 eVk )
T is the temperature of the die when V is used (°K)
U
U
T is the temperature of the die under temperature stress (°K)
S
The final acceleration factor, A , is the multiplication of the voltage acceleration factor and
F
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
A is calculated using the temperature and voltage defined in the mission profile of the
F
product. The A value can then be used in Equation 5 to calculate the number of months of
F
use equivalent to 1000 hours of reliable stress duration.
18/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Equation 5
Application information
Months = AF × 1000 h × 12 months ⁄ (24 h × 365.25 days)
To evaluate the op-amp reliability, a follower stress condition is used where V is defined
CC
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The V drift (in µV) of the product after 1000 h of stress is tracked with parameters at
io
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC ⁄ 2
The long term drift parameter (ΔV ), estimating the reliability performance of the product, is
io
obtained using the ratio of the V (input offset voltage value) drift over the square root of the
io
calculated number of months (Equation 7).
Equation 7
Viodrift
ΔVio = -----------------------------
(months)
where V drift is the measured drift value in the specified test conditions after 1000 h stress
io
duration.
4.5
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU10 series, the impedances must be
maximized so that current consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage. This
leakage may be greater than the current consumption of the op-amp. For this reason,
ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However,
there are three main limitations to be considered when choosing a resistor.
1. When the TSU10x series is used with a sensor: the resistance connected between the
sensor and the input must remain much higher than the impedance of the sensor itself.
nV
-----------
2. Noise generated: a100 kΩresistor generates 40
, a bigger resistor value generates
Hz
even more noise.
3. Leakage on the PCB: leakage can be generated by moisture. This can be improved by
using a specific coating process on the PCB.
DocID024317 Rev 2
19/33
33
Application information
TSU101, TSU102, TSU104
4.6
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU10x
series can be performed with a guarding technique. The technique consists of surrounding
high impedance tracks by a low impedance track (the ring). The ring is at the same electrical
potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current
can flow through them as they are at the same potential (see Figure 38).
Figure 38. Guarding on the PCB
20/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Application information
4.7
Using the TSU10x series with sensors
The TSU10x series has MOS inputs, thus input bias currents can be guaranteed down to
5 pA maximum at ambient temperature. This is an important parameter when the
operational amplifier is used in combination with high impedance sensors.
The TSU101, TSU102, and TSU104 series is perfectly suited for trans-impedance
configuration as shown in Figure 39. This configuration allows a current to be converted into
a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical
gas sensing or photo/UV sensing applications. The TSU10x series, using trans-impedance
configuration, is able to provide a voltage value based on the physical parameter sensed by
the sensor.
Electrochemical gas sensors
The output current of electrochemical gas sensors is generally in the range of tens of nA to
hundreds of μA. As the input bias current of the TSU101, TSU102, and TSU104 is very low
(see Figure 9, Figure 10, and Figure 11) compared to these current values, the TSU10x
series is well adapted for use with the electrochemical sensors of two or three electrodes.
Figure 40 shows a potentiostat (electronic hardware required to control a three electrode
cell) schematic using the TSU101, TSU102, and TSU104. In such a configuration, the
devices minimize leakage in the reference electrode compared to the current being
measured on the working electrode.
Figure 39. Trans-impedance amplifier schematic
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DocID024317 Rev 2
21/33
33
Application information
TSU101, TSU102, TSU104
Figure 40. Potentiostat schematic using the TSU101 (or TSU102)
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4.8
Fast desaturation
When the TSU101, TSU102, and TSU104 operational amplifiers go into saturation mode,
they take a short period of time to recover, typically thirty microseconds. When recovering
after saturation, the TSU10x series does not exhibit any voltage peaks that could generate
issues (such as false alarms) in the application (see Figure 17). This is because the internal
gain of the amplifier decreases smoothly when the output signal gets close to the V
or
CC+
V
supply rails (see Figure 15 and Figure 16).
CC-
Thus, to maintain signal integrity, the user should take care that the output signal stays at
100 mV from the supply rails.
With a trans-impedance schematic, a voltage reference can be used to keep the signal
away from the supply rails.
4.9
Using the TSU10x series in comparator mode
The TSU10x series can be used as a comparator. In this case, the output stage of the
device always operates in saturation mode. In addition, Figure 4 shows the current
consumption is not bigger and even decreases smoothly close to the rails. The TSU101,
TSU102, and TSU104 are obviously operational amplifiers and are therefore optimized to
be used in linear mode. We recommend to use the TS88 series of nanopower comparators
if the primary function is to perform a signal comparison only.
22/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Application information
4.10
ESD structure of TSU10x series
The TSU101, TSU102, and TSU104 are protected against electrostatic discharge (ESD)
with dedicated diodes (see Figure 41). These diodes must be considered at application level
especially when signals applied on the input pins go beyond the power supply rails (V
or
CC+
V
).
CC-
Figure 41. ESD structure
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Current through the diodes must be limited to a maximum of 10 mA as stated in Table 1. A
serial resistor or a Schottky diode can be used on the inputs to improve protection but the
10 mA limit of input current must be strictly observed.
DocID024317 Rev 2
23/33
33
Package information
TSU101, TSU102, TSU104
5
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
24/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Package information
5.1
SC70-5 (or SOT323-5) package mechanical data
Figure 42. SC70-5 (or SOT323-5) package mechanical drawing
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 6. SC70-5 (or SOT323-5) package mechanical data
Dimensions
Ref
Millimeters
Typ
Inches
Typ
Min
Max
Min
Max
A
A1
A2
b
0.80
1.10
0.10
1.00
0.30
0.22
2.20
2.40
1.35
0.315
0.043
0.004
0.039
0.012
0.009
0.087
0.094
0.053
0.80
0.15
0.10
1.80
1.80
1.15
0.90
0.315
0.006
0.004
0.071
0.071
0.045
0.035
c
D
2.00
2.10
1.25
0.65
1.30
0.36
0.079
0.083
0.049
0.025
0.051
0.014
E
E1
e
e1
L
0.26
0 °
0.46
8 °
0.010
0 °
0.018
8 °
<
DocID024317 Rev 2
25/33
33
Package information
TSU101, TSU102, TSU104
5.2
SOT23-5 package mechanical data
Figure 43. SOT23-5 package mechanical drawing
Table 7. SOT23-5 package mechanical data
Dimensions
Ref
Millimeters
Inches
Min
Typ
Max
Min
Typ
Max
A
A1
A2
B
0.90
1.20
1.45
0.15
1.30
0.50
0.20
3.00
0.035
0.047
0.057
0.006
0.051
0.019
0.008
0.118
0.90
0.35
0.09
2.80
1.05
0.40
0.15
2.90
1.90
0.95
2.80
1.60
0.35
0.035
0.013
0.003
0.110
0.041
0.015
0.006
0.114
0.075
0.037
0.110
0.063
0.013
C
D
D1
e
E
2.60
1.50
0.10
0 °
3.00
1.75
0.60
10 °
0.102
0.059
0.004
0 °
0.118
0.069
0.023
10 °
F
L
K
26/33
DocID024317 Rev 2
TSU101, TSU102, TSU104
Package information
5.3
DFN8 2x2 package information
Figure 44. DFN8 2x2 package mechanical drawing
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Table 8. DFN8 2x2 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
b
0.70
0.00
0.15
0.75
0.02
0.20
2.00
2.00
0.50
0.55
0.80
0.05
0.25
0.028
0.000
0.006
0.030
0.001
0.008
0.079
0.079
0.020
0.022
0.031
0.002
0.010
D
E
e
L
0.045
0.65
0.018
0.026
N
8
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33
Package information
TSU101, TSU102, TSU104
5.4
MiniSO8 package information
Figure 45. MiniSO8 package mechanical drawing
Table 9.
Ref.
MiniSO8 package mechanical data
Dimensions
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.1
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
0
0.15
0.95
0.40
0.23
3.20
5.15
3.10
0
0.75
0.22
0.08
2.80
4.65
2.80
0.85
0.030
0.009
0.003
0.11
0.033
c
D
3.00
4.90
3.00
0.65
0.60
0.95
0.25
0.118
0.193
0.118
0.026
0.024
0.037
0.010
E
0.183
0.11
E1
e
L
0.40
0 °
0.80
0.016
0 °
0.031
L1
L2
k
8 °
8 °
ccc
0.10
0.004
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TSU101, TSU102, TSU104
Package information
5.5
QFN16 package information
Figure 46. QFN16 package mechanical drawing
Table 10. QFN16 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A3
b
0.80
0.90
0.02
0.2
1.00
0.05
0.032
0.035
0.001
0.008
0.009
0.118
0.045
0.118
0.045
0.02
0.039
0.002
0.18
1.00
1.00
0.23
3.00
1.15
3.00
1.15
0.5
0.30
1.25
1.25
0.007
0.039
0.039
0.012
0.049
0.049
D
D2
E
E2
e
K
0.2
0.008
0.016
L
0.30
0.09
0.40
0.50
0.012
0.006
0.020
r
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Package information
TSU101, TSU102, TSU104
Figure 47. QFN16 3x3 footprint recommendation
Table 11.
Footprint data
Ref
Millimeters
Inches
A
B
C
D
E
F
4.00
0.158
0.50
0.30
1.00
0.70
0.66
0.020
0.012
0.039
0.028
0.026
G
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TSU101, TSU102, TSU104
Package information
5.6
TSSOP14 package information
Figure 48. TSSOP14 package mechanical drawing
Table 12. TSSOP14 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
5.10
6.60
4.50
0.047
0.006
0.041
0.012
0.0089
0.201
0.260
0.176
0.05
0.80
0.19
0.09
4.90
6.20
4.30
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
0.039
1.00
c
D
5.00
6.40
4.40
0.65
0.60
1.00
0.197
0.252
0.173
0.0256
0.024
0.039
E
E1
e
L
0.45
0 °
0.75
0.018
0 °
0.030
L1
k
8 °
8 °
aaa
0.10
0.004
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Ordering information
TSU101, TSU102, TSU104
6
Ordering information
Table 13. Order codes
Order code
TSU101ICT
Temperature range
Package
Packing
Marking
SC70-5
SOT23-5
SC70-5
K22
K160
K24
TSU101ILT
TSU101RICT
TSU101RILT
TSU102IQ2T
TSU102IST
TSU104IQ4T
TSU104IPT
SOT23-5
DFN8 2x2
MiniSO8
QFN16 3x3
TSSOP14
K169
K24
-40 ° C to +85 ° C
Tape and reel
K160
K160
TSU104I
7
Revision history
Table 14. Document revision history
Date
Revision
Changes
16-Apr-2013
1
Initial release
Added the TSU102 and TSU104 devices and updated
the datasheet accordingly.
Added the silhouettes, pin connections, and package
information for DFN8 2x2, MiniSO8, QFN16 3x3, and
TSSOP14.
02-Jul-2013
2
Added Figure 36 and Figure 37.
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