TSU114 [STMICROELECTRONICS]
纳功率（900 nA）高精度（150 μV）;
| 型号： | TSU114 |
| 厂家： | 
ST |
| 描述： | 纳功率（900 nA）高精度（150 μV） |
| 文件： | 总30页 (文件大小：1842K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSU111
Nanopower (900 nA), high accuracy (150 µV) 5 V CMOS
operational amplifier
Datasheet - production data
Related products
See TSU101, TSU102 and TSU104 for
further power savings
DFN6 1.2x1.3
See TSZ121, TSZ122 and TSZ124 for
increased accuracy
Applications
Gas sensors: CO, O2, and H2S
Alarms: PIR sensors
SC70-5
Signal conditioning for energy harvesting
and wearable products
Ultra long-life battery-powered applications
Battery current sensing
Active RFID tags
Features
Submicro ampere current consumption:
Icc = 900 nA typ at 25 °C
Low offset voltage: 150 µV max at 25 °C,
235 µV max over full temperature range
(-40 to 85 °C)
Low noise over 0.1 to 10 Hz bandwidth:
3.6 µVpp
Low supply voltage: 1.5 V - 5.5 V
Rail-to-rail input and output
Description
The TSU111 operational amplifier (op amp)
offers an ultra low-power consumption of 900 nA
typical and 1.2 µA maximum when supplied by
3.3 V. Combined with a supply voltage range of
1.5 V to 5.5 V, these features allow the TSU111
to be efficiently supplied by a coin type Lithium
battery or a regulated voltage in low-power
applications.
Gain bandwidth product: 11.5 kHz typ
Low input bias current: 10 pA max at 25 °C
High tolerance to ESD: 4 kV HBM
Benefits
The high accuracy of 150 µV max and 11.5 kHz
gain bandwidth make the TSU111 ideal for
sensor signal conditioning, battery supplied, and
portable applications.
More than 25 years of typical equivalent
lifetime supplied by a 220 mA.h CR2032
coin type Lithium battery
High accuracy without calibration
Tolerance to power supply transient drops
November 2016
DocID029790 Rev 2
1/30
www.st.com
This is information on a product in full production.
Contents
TSU111
Contents
1
2
3
4
5
Package pin connections................................................................3
Absolute maximum ratings and operating conditions .................4
Electrical characteristics ................................................................5
Electrical characteristic curves....................................................11
Application information ................................................................16
5.1
Nanopower applications..................................................................16
5.1.1
5.1.2
Schematic optimization aiming for nanopower................................. 17
PCB layout considerations ............................................................... 17
5.2
5.3
5.4
5.5
Rail-to-rail input...............................................................................18
Input offset voltage drift over temperature.......................................18
Long term input offset voltage drift..................................................18
Using the TSU111 with sensors......................................................20
5.5.1
Electrochemical gas sensors............................................................ 20
5.6
5.7
5.8
5.9
Fast desaturation ............................................................................21
Using the TSU111 in comparator mode..........................................21
ESD structure of the TSU111..........................................................22
EMI robustness of nanopower devices ...........................................22
6
Package information .....................................................................23
6.1
6.2
SC70-5 (or SOT323-5) package information...................................24
DFN6 1.2x1.3 package information.................................................25
7
8
Ordering information.....................................................................28
Revision history ............................................................................29
2/30
DocID029790 Rev 2
TSU111
Package pin connections
1
Package pin connections
Figure 1: Pin connections for each package (top view)
OUT
VCC+
VCC-
IN-
NC
IN+
DFN6 1.2x1.3
IN+
VCC-
IN-
1
2
3
5
4
VCC+
OUT
SC70-5
DocID029790 Rev 2
3/30
Absolute maximum ratings and operating
TSU111
conditions
2
Absolute maximum ratings and operating conditions
Table 1: Absolute maximum ratings (AMR)
Symbol
VCC
Vid
Parameter
Value
Unit
Supply voltage (1)
6
Differential input voltage (2)
Input voltage (3)
±VCC
V
Vin
(VCC-) - 0.2 to (VCC+) + 0.2
Input current (4)
10
-65 to 150
150
mA
°C
Iin
Tstg
Tj
Storage temperature
Maximum junction temperature
DFN6 1.2x1.3
SC70-5
232
Thermal resistance
junction-to-ambient (5) (6)
Rthja
°C/W
205
HBM: human body model (7)
CDM: charged device model (8)
Latch-up immunity (9)
4000
1500
200
ESD
V
mA
Notes:
(1)All voltage values, except the differential voltage are with respect to the network ground terminal.
(2)The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
(3)(VCC+) - Vin must not exceed 6 V, Vin - (VCC-) must not exceed 6 V.
(4)The input current must be limited by a resistor in-series with the inputs.
(5)
R
th
are typical values.
(6)Short-circuits can cause excessive heating and destructive dissipation.
(7)Related to ESDA/JEDEC JS-001 Apr. 2010
(8)Related to JEDEC JESD22-C101-E Dec. 2009
(9)Related to JEDEC JESD78C Sep. 2010
Table 2: Operating conditions
Symbol
VCC
Parameter
Value
1.5 to 5.5
Unit
V
Supply voltage
Vicm
Common-mode input voltage range
Operating free-air temperature range
(VCC-) - 0.1 to (VCC+) + 0.1
-40 to 85
Toper
°C
4/30
DocID029790 Rev 2
TSU111
Electrical characteristics
3
Electrical characteristics
Table 3: Electrical characteristics at (VCC+) = 1.8 V with (VCC-) = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 1 MΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min. Typ. Max.
Unit
DC performance
T = 25 °C
150
235
1.4
Vio
Input offset voltage
µV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
ΔVio/ΔT Input offset voltage drift
μV/°C
Long-term input offset voltage
drift
ΔVio
T = 25 °C (1)
TBD
µV/√month
T = 25 °C
1
1
10
50
10
50
Iio
Input offset current (2)
Input bias current (2)
-40 °C < T< 85 °C
T = 25 °C
pA
dB
Iib
-40 °C < T< 85 °C
T = 25 °C
Common mode rejection
ratio, 20 log (ΔVicm/ΔVio),
Vicm = 0 to 1.8 V
76
71
107
CMR
-40 °C < T< 85 °C
RL = 100 kΩ, T = 25 °C
RL = 100 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25°C
RL = 10 kΩ, -40 °C < T< 85 °C
T = 25 °C
95
90
120
10
8
Large signal voltage gain,
Vout = 0.2 V to (VCC+) - 0.2 V
Avd
VOH
VOL
25
40
25
40
High-level output voltage,
(drop from VCC+)
mV
Low-level output voltage
2.8
1.5
2
5
Output sink current,
Vout = VCC , VΙD = -200 mV
-40 °C < T< 85 °C
Iout
mA
nA
T = 25 °C
4
Output source current,
Vout = 0 V, VΙD = 200 mV
-40 °C < T< 85 °C
1.5
T = 25 °C
900 1200
1480
Supply current (per channel),
no load, Vout = VCC/2
ICC
-40 °C < T< 85 °C
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
10
8
kHz
RL = 1 MΩ, CL = 60 pF
Φm
Gm
60
10
degrees
dB
Gain margin
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+) - 0.3 V
SR
en
Slew rate (10 % to 90 %)
2.5
220
3.8
V/ms
nV/√Hz
µVpp
Equivalent input noise voltage f = 100 Hz
Low-frequency,
ʃen
Bandwidth: f = 0.1 to 10 Hz
peak-to-peak input noise
100 mV from rail in comparator,
RL = 100 kΩ, VΙD = ±1 V,
-40 °C < T< 85 °C
trec
Overload recovery time
325
µs
DocID029790 Rev 2
5/30
Electrical characteristics
Notes:
TSU111
(1)Typical value is based on the Vio drift observed after 1000h at 85 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration
(2)Guaranteed by design
6/30
DocID029790 Rev 2
TSU111
Electrical characteristics
Table 4: Electrical characteristics at (VCC+) = 3.3 V with (VCC-) = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 1 MΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min. Typ. Max.
Unit
DC performance
T = 25 °C
150
235
1.4
Vio
Input offset voltage
µV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
ΔVio/ΔT Input offset voltage drift
μV/°C
Long-term input offset voltage
drift
ΔVio
T = 25 °C (1)
TBD
µV/√month
T = 25 °C
1
1
10
50
10
50
Iio
Input offset current (2)
Input bias current (2)
-40 °C < T< 85 °C
T = 25 °C
pA
dB
Iib
-40 °C < T< 85 °C
Common mode rejection ratio, T = 25 °C
81
76
110
CMR
20 log (ΔVicm/ΔVio),
-40 °C < T< 85 °C
Vicm = 0 to 3.3 V
RL = 100 kΩ, T = 25 °C
RL = 100 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25°C
RL = 10 kΩ, -40 °C < T< 85 °C
T = 25 °C
105
105
130
10
7
Large signal voltage gain,
Vout = 0.2 V to (VCC+) - 0.2 V
Avd
VOH
VOL
25
40
25
40
High-level output voltage,
(drop from VCC+)
mV
Low-level output voltage
12
6
22
18
Output sink current,
Vout = VCC , VΙD = -200 mV
-40 °C < T< 85 °C
Iout
mA
nA
T = 25 °C
9
Output source current,
Vout = 0 V, VΙD = 200 mV
-40 °C < T< 85 °C
5
T = 25 °C
900 1200
1480
Supply current (per channel),
no load, Vout = VCC/2
ICC
-40 °C < T< 85 °C
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
11
10
60
7
kHz
RL = 1 MΩ, CL = 60 pF
Φm
Gm
degrees
dB
Gain margin
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+) - 0.3 V
SR
en
Slew rate (10 % to 90 %)
2.5
220
3.7
V/ms
nV/√Hz
µVpp
Equivalent input noise voltage
f = 100 Hz
Low-frequency,
peak-to-peak input noise
ʃen
Bandwidth: f = 0.1 to 10 Hz
100 mV from rail in comparator,
RL = 100 kΩ, VΙD = ±1 V,
-40 °C < T< 85 °C
trec
Overload recovery time
630
µs
Notes:
DocID029790 Rev 2
7/30
Electrical characteristics
TSU111
(1)Typical value is based on the Vio drift observed after 1000h at 85 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration
(2)Guaranteed by design
8/30
DocID029790 Rev 2
TSU111
Electrical characteristics
Table 5: Electrical characteristics at (VCC+) = 5 V with (VCC-) = 0 V, Vicm = VCC/2,
Tamb = 25 °C, and RL = 1 MΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min. Typ. Max.
Unit
DC performance
T = 25 °C
150
235
1.4
Vio
Input offset voltage
µV
-40 °C < T< 85 °C
-40 °C < T< 85 °C
ΔVio/ΔT Input offset voltage drift
μV/°C
Long-term input offset voltage
drift
ΔVio
T = 25 °C (1)
TBD
µV/√month
T = 25 °C
1
1
10
50
10
50
Iio
Input offset current (2)
Input bias current (2)
-40 °C < T< 85 °C
T = 25 °C
pA
Iib
-40 °C < T< 85 °C
T = 25 °C
Common mode rejection ratio,
20 log (ΔVicm/ΔVio),
Vicm = 0 to 4.4 V
90
90
85
80
121
-40 °C < T< 85 °C
T = 25 °C
CMR
Common mode rejection ratio,
20 log (ΔVicm/ΔVio),
Vicm = 0 to 5 V
112
-40 °C < T< 85 °C
dB
T = 25 °C
92
84
116
135
10
7
Supply voltage rejection ratio,
VCC = 1.5 to 5.5 V, Vicm = 0 V
SVR
Avd
-40 °C < T< 85 °C
RL = 100 kΩ, T = 25 °C
RL = 100 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T< 85 °C
RL = 10 kΩ, T = 25°C
RL = 10 kΩ, -40 °C < T< 85 °C
T = 25 °C
105
101
Large signal voltage gain,
Vout = 0.2 V to (VCC+) - 0.2 V
25
40
25
40
High-level output voltage,
(drop from VCC+)
VOH
mV
VOL
Low-level output voltage
30
15
25
18
45
41
Output sink current,
Vout = VCC , VΙD = -200 mV
-40 °C < T< 85 °C
T = 25 °C
Iout
mA
nA
Output source current,
Vout = 0 V, VΙD = 200 mV
-40 °C < T< 85 °C
T = 25 °C
950 1350
1620
Supply current (per channel),
no load, Vout = VCC/2
ICC
-40 °C < T< 85 °C
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
11.5
10
60
7
kHz
RL = 1 MΩ, CL = 60 pF
Φm
Gm
degrees
dB
Gain margin
RL = 1 MΩ, CL = 60 pF,
Vout = 0.3 V to (VCC+) - 0.3 V
SR
en
Slew rate (10 % to 90 %)
2.7
200
3.6
V/ms
nV/√Hz
µVpp
Equivalent input noise voltage
f = 100 Hz
Low-frequency,
peak-to-peak input noise
ʃen
Bandwidth: f = 0.1 to 10 Hz
DocID029790 Rev 2
9/30
Electrical characteristics
TSU111
Unit
Symbol
Parameter
Conditions
Min. Typ. Max.
100 mV from rail in comparator,
RL = 100 kΩ, VΙD = ±1 V,
-40 °C < T< 85 °C
trec
Overload recovery time
940
µs
Vin = -10 dBm, f = 400 MHz
Vin = -10 dBm, f = 900 MHz
Vin = -10 dBm, f = 1.8 GHz
Vin = -10 dBm, f = 2.4 GHz
54
79
65
65
Electromagnetic interference
rejection ratio (3)
EMIRR
dB
Notes:
(1)Typical value is based on the Vio drift observed after 1000h at 85 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration
(2)Guaranteed by design
(3)Based on evaluations performed only in conductive mode
10/30
DocID029790 Rev 2
TSU111
Electrical characteristic curves
4
Electrical characteristic curves
Figure 2: Supply current vs. supply voltage
Figure 3: Supply current vs. input
common-mode voltage
Figure 4: Input offset voltage distribution
Figure 5: Input offset voltage vs. temperature at
3.3 V supply voltage
Figure 6: Input offset voltage temperature coefficient
distribution from -40 °C to 25 °C
Figure 7: Input offset voltage temperature coefficient
distribution from 25 °C to 85 °C
DocID029790 Rev 2
11/30
Electrical characteristic curves
TSU111
Figure 8: Input bias current vs. temperature at mid VICM Figure 9: Input bias current vs. temperature at low VICM
Figure 10: Input bias current vs. temperature at
high VICM
Figure 11: Output characteristics at 1.8 V supply voltage
Figure 12: Output characteristics at 3.3 V supply voltage
Figure 13: Output characteristics at 5 V supply voltage
12/30
DocID029790 Rev 2
TSU111
Figure 14: Output saturation with a sine wave
Electrical characteristic curves
Figure 15: Output saturation with a square wave
on the input
on the input
Figure 16: Phase reversal free
Figure 17: Slew rate vs. supply voltage
Figure 18: Output swing vs. input signal frequency
Figure 19: Triangulation of a sine wave
DocID029790 Rev 2
13/30
Electrical characteristic curves
Figure 20: Large signal response at
TSU111
Figure 21: Small signal response at 3.3 V supply voltage
3.3 V supply voltage
Figure 22: Overshoot vs. capacitive load at
3.3 V supply voltage
Figure 23: Open loop output impedance vs. frequency
Figure 24: Bode diagram at 1.8 V supply voltage
Figure 25: Bode diagram at 3.3 V supply voltage
14/30
DocID029790 Rev 2
TSU111
Figure 26: Bode diagram at 5 V supply voltage
Electrical characteristic curves
Figure 27: Gain bandwidth product vs. input
common-mode voltage
Figure 28: In-series resistor (Riso) vs. capacitive load
Figure 29: Noise vs. frequency for different power
supply voltages
Figure 30: Noise vs. frequency for different
common-mode input voltages
Figure 31: Noise amplitude on a 0.1 Hz to 10 Hz
frequency range
DocID029790 Rev 2
15/30
Application information
TSU111
5
Application information
5.1
Nanopower applications
The TSU111 can operate from 1.5 V to 5.5 V. The parameters are fully specified at 1.8 V,
3.3 V, and 5 V supply voltages and are very stable in the full VCC range. Additionally, the
main specifications are guaranteed on the industrial temperature range from -40 to 85 °C.
The estimated lifetime of the TSU111 exceeds 25 years if supplied by a CR2032 battery
(see Figure 32: "CR2032 battery").
Figure 32: CR2032 battery
16/30
DocID029790 Rev 2
TSU111
Application information
5.1.1
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU111, the impedances must be maximized so
that current consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage.
This leakage may be greater than the current consumption of the op amp. For this reason,
ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However,
there are two main limitations to be considered when choosing a resistor.
1. Noise generated: a 100 kΩ resistor generates 40 nV/√Hz, a bigger resistor value
generates even more noise.
2. Leakage on the PCB: leakage can be generated by moisture. This can be improved by
using a specific coating process on the PCB.
5.1.2
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU111
can be performed with a guarding technique. The technique consists of surrounding high
impedance tracks by a low impedance track (the ring). The ring is at the same electrical
potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current
can flow through them as they are at the same potential (see Figure 33: "Guarding on the
PCB").
Figure 33: Guarding on the PCB
DocID029790 Rev 2
17/30
Application information
TSU111
5.2
5.3
Rail-to-rail input
The TSU111 is built with two complementary PMOS and NMOS input differential pairs.
Thus, the device has a rail-to-rail input, and the input common mode range is extended
from (VCC-) - 0.1 V to (VCC+) + 0.1 V.
The TSU111 has been designed to prevent phase reversal behavior.
Input offset voltage drift over temperature
The maximum input voltage drift variation over temperature is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
∆Vio
∆T
°C
Vio – Vio
T – 25°C
= max
Where T = -40 °C and 85 °C.
The TSU111 datasheet maximum values are guaranteed by measurements on a
representative sample size ensuring a Cpk (process capability index) greater than 1.3.
5.4
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
AFV = eβ .
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in
Equation 3.
18/30
DocID029790 Rev 2
TSU111
Application information
Equation 3
Ea
1
1
.
------
–
AFT = e k
TU TS
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eV.K-1)
TU is the temperature of the die when VU is used (°K)
TS is the temperature of the die under temperature stress (°K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
Equation 5
/
Months = AF × 1000 h × 12 months
To evaluate the op amp reliability, a follower stress condition is used where VCC is defined
as a function of the maximum operating voltage and the absolute maximum rating
(as recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC
The long term drift parameter (ΔVio), estimating the reliability performance of the product,
is obtained using the ratio of the Vio (input offset voltage value) drift over the square root of
the calculated number of months (Equation 7).
Equation 7
Viodrift
∆Vio
=
Where Vio drift is the measured drift value in the specified test conditions after 1000 h
stress duration.
DocID029790 Rev 2
19/30
Application information
TSU111
5.5
Using the TSU111 with sensors
The TSU111 has MOS inputs, thus input bias currents can be guaranteed down to 10 pA
maximum at ambient temperature. This is an important parameter when the operational
amplifier is used in combination with high impedance sensors.
The TSU111 is perfectly suited for trans-impedance configuration. This configuration allows
a current to be converted into a voltage value with a gain set by the user. It is an ideal
choice for portable electrochemical gas sensing or photo/UV sensing applications. The
TSU111, using trans-impedance configuration, is able to provide a voltage value based on
the physical parameter sensed by the sensor.
5.5.1
Electrochemical gas sensors
The output current of electrochemical gas sensors is generally in the range of tens of nA to
hundreds of µA. As the input bias current of the TSU111 is very low (see Figure 8,
Figure 9, and Figure 10) compared to these current values, the TSU111 is well adapted for
use with the electrochemical sensors of two or three electrodes. Figure 35: "Potentiostat
schematic using the TSU111" shows a potentiostat (electronic hardware required to control
a three electrode cell) schematic using the TSU111. In such a configuration, the devices
minimize leakage in the reference electrode compared to the current being measured on
the working electrode.
Another great advantage of TSU111 versus the competition is its low noise for low
frequencies (3.6 µVpp over 0.1 to 10Hz), and low input offset voltage of 150µV max. These
improved parameters for the same power consumption allow a better accuracy.
Figure 34: Trans-impedance amplifier schematic
R
I
-
V
+ RI
TSU111
ref
Sensor:
electrochemical
photodiode/UV
+
V
ref
20/30
DocID029790 Rev 2
TSU111
Application information
Figure 35: Potentiostat schematic using the TSU111
-
TSU111
-
TSU111
+
+
V
ref1
V
ref2
5.6
5.7
Fast desaturation
When the TSU111 goes into saturation mode, it takes a short period of time to recover,
typically 630 µs. When recovering after saturation, the TSU111 does not exhibit any
voltage peaks that could generate issues (such as false alarms) in the application
(see Figure 14).
We can observe that this circuit still exhibits good gain even close to the rails i.e. Avd
greater than 105 dB for Vcc = 3.3 V with Vout varying from 200 mV up to a supply voltage
minus 200 mV. With a trans-impedance schematic, a voltage reference can be used to
keep the signal away from the supply rails.
Using the TSU111 in comparator mode
The TSU111 can be used as a comparator. In this case, the output stage of the device
always operates in saturation mode. In addition, Figure 3 shows that the current
consumption is not higher and even decreases smoothly close to the rails. The TSU111 is
obviously an operational amplifier and is therefore optimized for use in linear mode. We
recommend using the TS88 series of nanopower comparators if the primary function is to
perform a signal comparison only.
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Application information
TSU111
5.8
ESD structure of the TSU111
The TSU111 is protected against electrostatic discharge (ESD) with dedicated diodes
(see Figure 36: "ESD structure"). These diodes must be considered at application level
especially when signals applied on the input pins go beyond the power supply rails (VCC+
or (VCC-).
)
Figure 36: ESD structure
-
TSU111
+
Current through the diodes must be limited to a maximum of 10 mA as stated in Table 1:
"Absolute maximum ratings (AMR)". A serial resistor on the inputs can be used to limit this
current.
5.9
EMI robustness of nanopower devices
Nanopower devices exhibit higher impedance nodes and consequently they are more
sensitive to EMI. To improve the natural robustness of the TSU111 device, we recommend
to add three capacitors of around 22 pF each between the two inputs, and between each
input and ground. These capacitors will lower the impedance of the input at high
frequencies and therefore reduce the impact of the radiation.
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TSU111
Package information
6
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID029790 Rev 2
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Package information
TSU111
6.1
SC70-5 (or SOT323-5) package information
Figure 37: SC70-5 (or SOT323-5) package outline
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
TOP VIEW
Table 6: SC70-5 (or SOT323-5) mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
1.10
0.10
1.00
0.30
0.22
2.20
2.40
1.35
Min.
Typ.
Max.
0.043
0.004
0.039
0.012
0.009
0.087
0.094
0.053
A
A1
A2
b
0.80
0.032
0.80
0.15
0.10
1.80
1.80
1.15
0.90
0.032
0.006
0.004
0.071
0.071
0.045
0.035
c
D
2.00
2.10
1.25
0.65
1.30
0.36
0.079
0.083
0.049
0.025
0.051
0.014
E
E1
e
e1
L
0.26
0°
0.46
8°
0.010
0°
0.018
8°
<
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TSU111
Package information
6.2
DFN6 1.2x1.3 package information
Figure 38: DFN6 1.2x1.3 package outline
BOTTOM VIEW
e
b
PIN#1 ID
L3
L
SIDE VIEW
C
SEATING
PLANE
A1
A
8
0.05 C
TOP VIEW
D
E
PIN 1
DocID029790 Rev 2
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Package information
TSU111
Table 7: DFN6 1.2x1.3 mechanical data
Dimensions
Ref
Millimeters
Inches
Min.
0.31
0.00
0.15
Typ.
0.38
0.02
0.18
0.05
1.20
1.30
0.40
0.525
0.425
Max.
0.40
0.05
0.25
Min.
0.012
0.000
0.006
Typ.
Max.
0.016
0.002
0.010
A
A1
b
0.015
0.001
0.007
0.002
0.047
0.051
0.016
0.021
0.017
c
D
E
e
L
0.475
0.375
0.575
0.475
0.019
0.015
0.023
0.019
L3
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TSU111
Package information
Figure 39: DFN6 1.2x1.3 recommended footprint
0.40
0.25
3
1
1.20
0.475
4
6
Table 8: DFN6 1.2x1.3 recommended footprint data
Dimensions
Ref
A
Millimeters
Inches
4.00
0.158
B
C
0.50
0.30
1.00
0.70
0.66
0.020
0.012
0.039
0.028
0.026
D
E
F
G
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Ordering information
TSU111
7
Ordering information
Table 9: Order codes
Order code
TSU111IQ1T
Temperature range
Package (1)
DFΝ6 1.2x1.3
SC70-5
Marking
K8
-40 °C to 85 °C
TSU111ICT
Notes:
(1)All devices are delivered in tape and reel packing
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TSU111
Revision history
8
Revision history
Table 10: Document revision history
Changes
Date
Revision
17-Oct-2016
1
Initial release
Features: added "rail-to-rail input and output".
Description: updated the maximum ultra low-power consumption of
TSU111 op amp.
14-Nov-2016
2
Applications: updated
Table 5: added EMIRR typ values
Added Section 5.9: "EMI robustness of nanopower devices"
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TSU111
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improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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DocID029790 Rev 2
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