TSX56X [STMICROELECTRONICS]
Micropower, wide bandwidth (900 kHz), 16 V CMOS operational amplifiers;
| 型号： | TSX56X |
| 厂家： | 
ST |
| 描述： | Micropower, wide bandwidth (900 kHz), 16 V CMOS operational amplifiers |
| 文件： | 总28页 (文件大小：1410K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSX56x, TSX56xA
Micropower, wide bandwidth (900 kHz), 16 V CMOS operational
amplifiers
Datasheet - production data
Easy interfacing with high impedance
sensors
Related topics
SOT23-5 (single)
DFN8 2x2 (dual)
See TSX63x series for reduced power
consumption (45 mA, 200 kHz)
See TSX92x series for higher gain
bandwidth products (10 MHz)
MiniSO8 (dual)
Applications
Industrial and automotive signal conditioning
Active filtering
Medical instrumentation
High impedance sensors
Description
The TSX56x, TSX56xA series of operational
amplifiers benefit from STMicroelectronics® 16 V
CMOS technology to offer state-of-the-art
QFN16 3x3 (quad)
TSSOP14 (quad)
accuracy and performance in the smallest
industrial packages. The TSX56x, TSX56xA have
pinouts compatible with industrial standards and
offer an outstanding speed/power consumption
ratio, 900 kHz gain bandwidth product while
consuming only 250 µA at 16 V. Such features
make the TSX56x, TSX56xA ideal for sensor
interfaces and industrial signal conditioning. The
wide temperature range and high ESD tolerance
ease use in harsh automotive applications.
Features
Low power consumption: 235 µA typ. at 5 V
Supply voltage: 3 V to 16 V
Gain bandwidth product: 900 kHz typ.
Low offset voltage
“A” version: 600 µV max.
Standard version: 1 mV max.
Low input bias current: 1 pA typ.
High tolerance to ESD: 4 kV
Table 1: Device summary
Wide temperature range: -40 to 125 °C
Automotive qualification
Tiny packages available: SOT23-5,
DFN8 2 mm x 2 mm, MiniSO8,
QFN16 3 mm x 3 mm, and TSSOP14
Standard VIO
TSX561
Enhanced VIO
TSX561A
Version
Single
Dual
TSX562
TSX562A
TSX564
TSX564A
Quad
Benefits
Power savings in power-conscious
applications
February 2017
DocID023274 Rev 5
1/28
www.st.com
This is information on a product in full production.
Contents
TSX56x, TSX56xA
Contents
1
2
3
4
5
Pinout information...........................................................................3
Absolute maximum ratings and operating conditions .................4
Electrical characteristics ................................................................6
Electrical characteristic curves....................................................12
Application information ................................................................16
5.1
5.2
5.3
5.4
5.5
5.6
Operating voltages..........................................................................16
Rail-to-rail input...............................................................................16
Input offset voltage drift over temperature.......................................16
Long term input offset voltage drift..................................................17
PCB layouts ....................................................................................18
Macromodel ....................................................................................18
6
Package information .....................................................................19
6.1
6.2
6.3
6.4
6.5
SOT23-5 package information ........................................................20
DFN8 2x2 package information.......................................................21
MiniSO8 package information .........................................................22
QFN16 3x3 package information.....................................................23
TSSOP14 package information.......................................................25
7
8
Ordering information.....................................................................26
Revision history ............................................................................27
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TSX56x, TSX56xA
Pinout information
1
Pinout information
Figure 1: Pin connections for each package (top view)
Single
SOT23-5 (TSX561)
Dual
DFN8 2x2 (TSX562)
MiniSO8 (TSX562)
Quad
QFN16 3x3 (TSX564)
TSSOP14 (TSX564)
DocID023274 Rev 5
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Absolute maximum ratings and operating
TSX56x, TSX56xA
conditions
2
Absolute maximum ratings and operating conditions
Table 2: Absolute maximum ratings (AMR)
Symbol
VCC
Vid
Parameter
Value
Unit
Supply voltage (1)
18
Differential input voltage (2)
Input voltage (3)
±VCC
V
Vin
(VCC-) - 0.2 to (VCC+) + 0.2
Iin
Input current (4)
10
-65 to 150
150
250
120
190
80
mA
°C
Tstg
Tj
Storage temperature
Maximum junction temperature
SOT23-5
DFN8 2x2
MiniSO8
Thermal resistance
Rthja
junction-to-ambient (5) (6)
QFN16 3x3
TSSOP14
DFN8 2x2
QFN16 3x3
°C/W
100
33
Thermal resistance
junction-to-case
Rthjc
30
HBM: human body model (7)
4
kV
V
MM: machine model for TSX561 (8)
200
100
1.5
ESD
MM: machine model for TSX562 and TSX564 (8)
CDM: charged device model (9)
Latch-up immunity
kV
200
mA
Notes:
(1)All voltage values, except the differential voltage are with respect to the network ground terminal.
(2)The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
(3)
V
- Vin must not exceed 18 V, Vin must not exceed 18 V
cc
(4)Input current must be limited by a resistor in series with the inputs.
(5)
R
th
are typical values.
(6)Short-circuits can cause excessive heating and destructive dissipation.
(7)Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all
couples of pin combinations with other pins floating.
(8)Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of
the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with
other pins floating.
(9)Charged device model: all pins plus package are charged together to the specified voltage and then discharged
directly to ground.
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TSX56x, TSX56xA
Absolute maximum ratings and operating
conditions
Table 3: Operating conditions
Parameter
Symbol
Value
3 to 16
Unit
V
VCC
Vicm
Toper
Supply voltage
Common-mode input voltage range
Operating free-air temperature range
(VCC-) - 0.1 to (VCC+) + 0.1
-40 to 125
°C
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Electrical characteristics
TSX56x, TSX56xA
3
Electrical characteristics
Table 4: Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
DC performance
TSX56xA, T = 25 °C
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C (1)
T = 25 °C
Min.
Typ.
Max.
Unit
600
1800
1
μV
Vio
Offset voltage
mV
2.2
ΔVio/ΔT
Input offset voltage drift
2
1
12
µV/°C
100 (2)
200 (2)
100 (2)
200 (2)
Input bias current,
Vout = VCC/2
Iib
-40 °C < T < 125 °C
T = 25 °C
1
pA
1
Input offset current,
Vout = VCC/2
Iio
-40 °C < T < 125 °C
T = 25 °C
1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
63
59
47
45
80
CMR1
-40 °C < T < 125 °C
T = 25 °C
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
66
dB
CMR2
Avd
-40 °C < T < 125 °C
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
T = 25 °C
85
83
-40 °C < T < 125 °C
T = 25 °C
-40 °C < T < 125 °C
T = 25 °C
70
100
70
High-level output voltage,
VOH = VCC - Vout
VOH
mV
VOL
Low-level output voltage
Isink, Vout = VCC
-40 °C < T < 125 °C
T = 25 °C
100
4.3
2.5
3.3
2.5
5.3
4.3
-40 °C < T < 125 °C
T = 25 °C
Iout
mA
μA
Isource, Vout = 0 V
-40 °C < T < 125 °C
T = 25 °C
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
220
300
350
ICC
-40 °C < T < 125 °C
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
600
800
690
55
kHz
RL = 10 kΩ, CL = 100 pF
ɸm
Gm
Degrees
dB
Gain margin
9
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TSX56x, TSX56xA
Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
SR
Slew rate
1
V/μs
f = 1 kHz
55
29
Equivalent input noise
voltage density
en
nV/√Hz
f = 10 kHz
Low-frequency peak-to-
peak input noise
∫en
Bandwidth, f = 0.1 to 10 Hz
16
µVpp
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 1 Vpp
Total harmonic distortion +
noise
THD+N
0.004
%
Notes:
(1)See Section 5.3: "Input offset voltage drift over temperature"
(2)Guaranteed by design
DocID023274 Rev 5
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Electrical characteristics
TSX56x, TSX56xA
Table 5: Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
DC performance
Min.
Typ.
Max.
Unit
TSX56xA, T = 25 °C
600
1800
1
μV
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
Vio
Offset voltage
mV
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C (1)
2.2
12
ΔVio/ΔT
ΔVio
Input offset voltage drift
2
5
µV/°C
Long-term input offset
voltage drift
nV/
√month
T = 25 °C (2)
T = 25 °C
-40 °C < T < 125 °C
T = 25 °C
1
1
100 (3)
200 (3)
100 (3)
200 (3)
Input bias current,
Vout = VCC/2
Iib
pA
1
Input offset current,
Vout = VCC/2
Iio
-40 °C < T < 125 °C
T = 25 °C
1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
66
63
50
47
84
CMR1
-40 °C < T < 125 °C
T = 25 °C
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
69
dB
CMR2
Avd
-40 °C < T < 125 °C
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
T = 25 °C
85
83
-40 °C < T < 125 °C
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T < 125 °C
RL = 10 kΩ, T = 25 °C
70
100
70
High-level output voltage,
VOH = VCC - Vout
VOH
mV
VOL
Low-level output voltage
RL = 10 kΩ, -40 °C < T < 125 °C
Vout = VCC, T = 25 °C
100
11
8
14
12
Isink
Vout = VCC, -40 °C < T < 125 °C
Vout = 0 V, T = 25 °C
Iout
mA
μA
9
Isource
Vout = 0 V, -40 °C < T < 125 °C
T = 25 °C
7
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
235
350
400
ICC
-40 °C < T < 125 °C
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
700
850
730
55
kHz
RL = 10 kΩ, CL = 100 pF
ɸm
Gm
Degrees
dB
Gain margin
9
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TSX56x, TSX56xA
Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
SR
Slew rate
1.1
V/μs
f = 1 kHz
55
29
Equivalent input noise
voltage density
en
nV/√Hz
f = 10 kHz
Low-frequency peak-to-
peak input noise
∫en
Bandwidth, f = 0.1 to 10 Hz
15
µVpp
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 2 Vpp
Total harmonic distortion +
noise
THD+N
0.002
%
Notes:
(1)See Section 5.3: "Input offset voltage drift over temperature"
(2)Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
(3)Guaranteed by design
DocID023274 Rev 5
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Electrical characteristics
TSX56x, TSX56xA
Table 6: Electrical characteristics at VCC+ = 16 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
DC performance
Min.
Typ.
Max.
Unit
TSX56xA, T = 25 °C
600
1800
1
μV
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
Vio
Offset voltage
mV
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C (1)
2.2
12
ΔVio/ΔT
ΔVio
Input offset voltage drift
2
µV/°C
Long-term input offset
voltage drift
nV/
√month
T = 25 °C (2)
1.6
T = 25 °C
-40 °C < T < 125 °C
T = 25 °C
1
1
100 (3)
200 (3)
100 (3)
200 (3)
Input bias current,
Vout = VCC/2
Iib
pA
1
Input offset current,
Vout = VCC/2
Iio
-40 °C < T < 125 °C
T = 25 °C
1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
76
72
60
56
95
CMR1
CMR2
-40 °C < T < 125 °C
T = 25 °C
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
78
90
-40 °C < T < 125 °C
dB
Common mode rejection
ratio, 20 log (ΔVCC/ΔVio),
VCC = 3 V to 16 V,
T = 25 °C
76
72
SVR
Avd
-40 °C < T < 125 °C
Vout = Vicm = VCC/2
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
T = 25 °C
85
83
-40 °C < T < 125 °C
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T < 125 °C
RL = 10 kΩ, T = 25 °C
70
100
70
High-level output voltage,
VOH = VCC - Vout
VOH
mV
VOL
Low-level output voltage
RL = 10 kΩ, -40 °C < T < 125 °C
Vout = VCC, T = 25 °C
100
40
35
30
25
92
90
Isink
Vout = VCC, -40 °C < T < 125 °C
Vout = 0 V, T = 25 °C
Iout
mA
Isource
Vout = 0 V, -40 °C < T < 125 °C
T = 25 °C
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
250
360
400
ICC
μA
-40 °C < T < 125 °C
10/28
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TSX56x, TSX56xA
Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
750
900
750
55
kHz
RL = 10 kΩ, CL = 100 pF
ɸm
Gm
Degrees
dB
Gain margin
9
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
SR
en
Slew rate
1.1
V/μs
nV/√Hz
µVpp
f = 1 kHz
48
27
Equivalent input noise
voltage density
f = 10 kHz
Low-frequency peak-to-
peak input noise
∫en
Bandwidth, f = 0.1 to 10 Hz
15
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 5 Vpp
Total harmonic distortion +
noise
0.000
5
THD+N
%
Notes:
(1)See Section 5.3: "Input offset voltage drift over temperature"
(2)Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
(3)Guaranteed by design
DocID023274 Rev 5
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Electrical characteristic curves
TSX56x, TSX56xA
4
Electrical characteristic curves
Figure 2: Supply current vs. supply voltage at
Vicm = VCC/2
Figure 3: Input offset voltage distribution at
VCC = 16 V and Vicm = 8 V
Figure 4: Input offset voltage temperature coefficient
distribution at VCC = 16 V, Vicm = 8 V
Figure 5: Input offset voltage vs. input common-mode
voltage at VCC = 12 V
Figure 6: Input offset voltage vs. temperature at VCC = 16 V
2500
2000
1500
1000
500
Limit forTSX56xA
Limit forTSX56x
0
-500
-1000
-1500
-2000
-2500
V
= 16V,V
= 8V
CC
icm
-40
-20
0
20
40
60
80
100
120
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TSX56x, TSX56xA
Figure 7: Output current vs. output voltage at
Electrical characteristic curves
Figure 8: Output current vs. output voltage at VCC = 5 V
VCC = 3.3 V
Figure 9: Output current vs. output voltage at
VCC = 16 V
Figure 10: Bode diagram at VCC = 3.3 V
Figure 11: Bode diagram at VCC = 5 V
Figure 12: Bode diagram at VCC = 16 V
DocID023274 Rev 5
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Electrical characteristic curves
TSX56x, TSX56xA
Figure 13: Phase margin vs. capacitive load at
VCC = 12 V
Figure 14: GBP vs. input common-mode voltage at
VCC = 12 V
Figure 15: Avd vs. input common-mode voltage at
VCC = 12 V
Figure 16: Slew rate vs. supply voltage
Figure 17: Noise vs. frequency at VCC = 3.3 V
Figure 18: Noise vs. frequency at VCC = 5 V
14/28
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TSX56x, TSX56xA
Figure 19: Noise vs. frequency at VCC = 16 V
Electrical characteristic curves
Figure 20: Distortion and noise vs. output voltage
amplitude
Figure 21: Distortion and noise vs. amplitude at
Vicm = VCC/2 and VCC = 12 V
Figure 22: Distortion and noise vs. frequency
DocID023274 Rev 5
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Application information
TSX56x, TSX56xA
5
Application information
5.1
Operating voltages
The amplifiers of the TSX56x and TSX56xA series can operate from 3 V to 16 V. Their
parameters are fully specified at 3.3 V, 5 V, and 16 V power supplies. However, the
parameters are very stable in the full VCC range. Additionally, the main specifications are
guaranteed in extended temperature ranges from -40 to 125 ° C.
5.2
Rail-to-rail input
The TSX56x and TSX56xA devices are built with two complementary PMOS and NMOS
input differential pairs. The devices have a rail-to-rail input, and the input common mode
range is extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V.
However, the performance of these devices is clearly optimized for the PMOS differential
pairs (which means from (VCC-) - 0.1 V to (VCC+) - 1.5 V).
Beyond (VCC+) - 1.5 V, the operational amplifiers are still functional but with degraded
performance, as can be observed in the electrical characteristics section of this datasheet
(mainly Vio and GBP). These performances are suitable for a number of applications that
need to be rail-to-rail.
The devices are designed to prevent phase reversal.
5.3
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
∆Vio
∆T
°C
Vio – Vio
T – 25°C
= max
Where T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by measurements on a representative
sample size ensuring a Cpk (process capability index) greater than 2.
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TSX56x, TSX56xA
Application information
5.4
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
AFV = eβ .
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in
Equation 3.
Equation 3
Ea
1
1
.
------
–
AFT = e k
TU TS
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eV.K-1)
TU is the temperature of the die when VU is used (K)
TS is the temperature of the die under temperature stress (K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
Equation 5
/
Months = AF × 1000 h × 12 months
DocID023274 Rev 5
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Application information
TSX56x, TSX56xA
To evaluate the op amp reliability, a follower stress condition is used where VCC is defined
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC
The long term drift parameter (ΔVio), estimating the reliability performance of the product, is
obtained using the ratio of the Vio (input offset voltage value) drift over the square root of
the calculated number of months (Equation 7).
Equation 7
Viodrift
∆Vio
=
Where Vio drift is the measured drift value in the specified test conditions after 1000 h
stress duration.
5.5
5.6
PCB layouts
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
Macromodel
Accurate macromodels of the TSX56x, TSX56xA devices are available on the
STMicroelectronics’ website at: www.st.com. These models are a trade-off between
accuracy and complexity (that is, time simulation) of the TSX56x and TSX56xA operational
amplifiers. They emulate the nominal performance of a typical device within the specified
operating conditions mentioned in the datasheet. They also help to validate a design
approach and to select the right operational amplifier, but they do not replace on-board
measurements.
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TSX56x, TSX56xA
Package information
6
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID023274 Rev 5
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Package information
TSX56x, TSX56xA
6.1
SOT23-5 package information
Figure 23: SOT23-5 package outline
Table 7: SOT23-5 mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
1.45
0.15
1.30
0.50
0.20
3.00
Min.
Typ.
Max.
0.057
0.006
0.051
0.020
0.008
0.118
A
A1
A2
B
0.90
1.20
0.035
0.047
0.90
0.35
0.09
2.80
1.05
0.40
0.15
2.90
1.90
0.95
2.80
1.60
0.35
0.035
0.014
0.004
0.110
0.041
0.016
0.006
0.114
0.075
0.037
0.110
0.063
0.014
C
D
D1
e
E
2.60
1.50
3.00
1.75
0.102
0.059
0.118
0.069
F
L
0.10
0.60
0.004
0.024
K
0 degrees
10 degrees
0 degrees
10 degrees
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Package information
6.2
DFN8 2x2 package information
Figure 24: DFN8 2x2 package outline
Table 8: DFN8 2x2 mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
0.70
0.00
0.15
Max.
0.80
0.05
0.25
Min.
0.028
0.000
0.006
Typ.
0.030
0.001
0.008
0.079
0.079
0.020
0.022
Max.
0.031
0.002
0.010
A
A1
b
0.75
0.02
0.20
2.00
2.00
0.50
0.55
D
E
e
L
0.045
0.65
0.018
0.026
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Package information
TSX56x, TSX56xA
6.3
MiniSO8 package information
Figure 25: MiniSO8 package outline
Table 9: MiniSO8 mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
1.1
Min.
Typ.
Max.
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
A
A1
A2
b
0
0.15
0.95
0.40
0.23
3.20
5.15
3.10
0
0.75
0.22
0.08
2.80
4.65
2.80
0.85
0.030
0.009
0.003
0.11
0.033
c
D
3.00
4.90
3.00
0.65
0.60
0.95
0.25
0.118
0.193
0.118
0.026
0.024
0.037
0.010
E
0.183
0.11
E1
e
L
0.40
0°
0.80
0.016
0°
0.031
L1
L2
k
8°
8°
ccc
0.10
0.004
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Package information
6.4
QFN16 3x3 package information
Figure 26: QFN16 3x3 package outline
D
B
INDEX AREA
(D/ 2xE/ 2)
aaa
C 2x
TOP VIEW
ccc
C
C
SEATING
PLANE
SIDEVIEW
e
eee
C
L
b
bbb
bbb
C
C
A B
5
8
4
1
9
12
16
13
Pin#1 ID
R0.11
BOTTOM VIEW
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Package information
TSX56x, TSX56xA
Table 10: QFN16 3x3 mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
0.50
0
Max.
0.65
0.05
0.30
Min.
0.020
0
Typ.
Max.
0.026
0.002
0.012
A
A1
b
0.18
0.25
3.00
3.00
0.50
0.007
0.010
0.118
0.118
0.020
D
E
e
L
0.30
0.50
0.15
0.10
0.10
0.05
0.08
0.012
0.020
0.006
0.004
0.004
0.002
0.003
aaa
bbb
ccc
ddd
eee
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Package information
6.5
TSSOP14 package information
Figure 27: TSSOP14 package outline
aaa
Table 11: TSSOP14 mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
1.20
0.15
1.05
0.30
0.20
5.10
6.60
4.50
Min.
Typ.
Max.
0.047
0.006
0.041
0.012
0.0089
0.201
0.260
0.176
A
A1
A2
b
0.05
0.80
0.19
0.09
4.90
6.20
4.30
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
0.039
1.00
c
D
5.00
6.40
4.40
0.65
0.60
1.00
0.197
0.252
0.173
0.0256
0.024
0.039
E
E1
e
L
0.45
0°
0.75
0.018
0°
0.030
L1
k
8°
8°
aaa
0.10
0.004
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Ordering information
TSX56x, TSX56xA
7
Ordering information
Table 12: Order codes
Temperature
range
Channel
number
Order code
Package
Packaging
Marking
1
TSX561ILT
TSX562IQ2T
TSX562IST
SΟΤ23-5
DFN8 2x2
MiniSO8
K23
2
4
-40 to 125 °C
TSX564IQ4T
TSX564IPT
QFN16 3x3
TSSOP14
SΟΤ23-5
MiniSO8
TSX5641
K116
TSX561IYLT (1)
TSX562IYST (1)
1
2
4
1
2
4
1
2
4
-40 to 125 °C
automotive grade
Tape and
reel
TSX564IYPT (1)
TSX561AILT
TSSOP14
SΟΤ23-5
MiniSO8
TSSOP14
SΟΤ23-5
MiniSO8
TSSOP14
TSX5641Y
K117
TSX562AIST
-40 to 125 °C
TSX564AIPT
TSX564AI
K118
TSX561AIYLT (1)
TSX562AIYST (1)
TSX564AIYPT (1)
-40 to 125 °C
automotive grade
TSX564AIY
Notes:
(1)Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to
AEC Q001 & Q 002 or equivalent
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Revision history
8
Revision history
Table 13: Document revision history
Changes
Date
Revision
06-Aug-2012
1
Initial release.
Added TSX562, TSX564, TSX562A, and TSX564A devices.
Updated Features, Description, Figure 1, Table 1 (added DFN8, MiniSO8, QFN16,
and TSSOP14 package).
18-Sep-2012
Updated Table 1 (updated ESD MM values).
2
Updated Table 4 and Table 5 (added footnotes), Section 5 (added Figure 24 to
Figure 28 and Table 8 to Table 12), Table 13 (added dual and quad devices).
Minor corrections throughout document.
Replaced the silhouette, pinout, package diagram, and mechanical data of the DFN8
2x2 and QFN16 3x3 packages.
Added Benefits and Related products.
23-May-2013
09-Aug-2013
07-Feb-2017
Table 1: updated Rthja values and added Rthjc values for DFN8 2x2 and QFN16 3x3.
Updated Section 4.3, Section 4.4, and Section 4.6
3
4
5
Replaced Figure 23: SOT23-5 package mechanical drawing and Table 7: SOT23-5
package mechanical data.
Added SO8 package for dual version TSX562 and TSX562A.
Table 2: updated for SO8 package
Table 13: added order codes TSX562IDT, TSX562IYDT, TSX562AIDT,
TSX562AIYDT; updated automotive grade status.
Removed SO8 package
Table 8: "DFN8 2x2 mechanical data": removed "N"
Table 11: "TSSOP14 mechanical data": added "L" and " L1" in inches; updated "aaa"
in inches.
Table 12: "Order codes": removed TSX562IDT, TSX562IYDT, TSX562AIDT,
TSX562AIYDT.
Updated terminology
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TSX56x, TSX56xA
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