VD6725SW [STMICROELECTRONICS]
2 megapixel, 1/5 inch system-on-chip imaging sensor; 200万像素1/5英寸的系统级芯片成像传感器
| 型号： | VD6725SW |
| 厂家： | 
ST |
| 描述： | 2 megapixel, 1/5 inch system-on-chip imaging sensor |
| 文件： | 总4页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VD6725
2 megapixel, 1/5 inch system-on-chip imaging sensor
Data Brief
Features
■ UXGA (2 megapixel) sensor array
■ 1/5” optical format, 1.75 µm pixel size
■ SNR max > 36 dB
■ 10-bit continuous-time single-end ADC
■ Selectable 8-bit parallel or CSI2 serial output
■ Integrated high-performance image signal
processor and camera controller
– 4-channel radial anti-vignetting
– dynamic singlet/couplet correction
– adaptive noise reduction
Applications
– high-quality scaler: any size scaling down
from SXGA
■ Mobile phones
■ PDAs
– electronic zoom
■ PC cameras and peripherals
■ Gaming platforms
■ 15 frames per second (fps) at full resolution,
30 fps in VGA with fast context switching
feature for quicker still image capture
■ Programmable I2C chip address
Description
■ Low power consumption and ultra-low standby
VD6725 is an ultra-small, ultra-competitive and
ultra-smart 2 megapixel 1/5” SOC imaging sensor
with a high-performance image signal processor.
current
■ 1 Kbit OTP memory fully available to user
■ Integrated 1.2 V regulator
VD6725 imaging sensor allows design of ultra-low
height camera modules, thanks to ST’s pixel ultra-
low optical stack height that provides high
quantum efficiency, better light sensitivity and
improved relative illumination.
■ TSV wafer level package option
Benefits
■ Compatible with camera modules with Z height
below 4 mm
This cost competitive solution resulting from an
ultra-small sensor die size is based on ST’s
innovative sensor architecture and ST’s latest
imaging patents, combined to our new imaging
process.
■ Compatible with camera modules < 6 x 6 mm2
■ Flexible applications (//ITU, MIPI) using the
same die
■ Creative special effects
ST’s new high performance imaging process
provides 1.75 µm pixel size, very high logic
density, excellent SNR and low light performance.
It is qualified in our 8” and 12” world-leading
manufacturing infrastructures.
■ Qualified for reflowable camera modules
January 2008
Rev 2
1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Overview
VD6725
1
Overview
Figure 1.
VD6725 block diagram
Wafer level package: TSV (through-silicon via)
The wafer-level package, TSV (through-silicon via) technology, is used to design smaller
camera modules, improve the assembly yield and lower costs. The VD6725 is available in
ST’s revolutionary TSV package:
●
●
●
●
●
Ultra-scaled down camera module size
No wire bonding inside the camera module: save up to 1.6 mm in X and Y
No substrate in the module: directly reflowable, on phone mother board or flex-attach
Up to 400 µm saved in module Z height
No leads on the package sides for an increased reliability and ESD protection
2
Ordering information
Table 1.
Ordering information
Order code
VD6725/SW
Description
Tested, sawn dice on reconstructed wafer.
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VD6725
Revision history
3
Revision history
Table 2.
Date
Document revision history
Revision
Changes
25-Jan-2008
31-Jan-2008
1
2
Initial release.
Clarified the feature on OTP memory in the Features.
3/4
VD6725
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