VG8640CB1M/1 [STMICROELECTRONICS]
CMOS Sensor, 60fps, Surface Mount;
| 型号： | VG8640CB1M/1 |
| 厂家： | 
ST |
| 描述： | CMOS Sensor, 60fps, Surface Mount 传感器 换能器 |
| 文件： | 总7页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VG5640, VG6640, VG8640,
VD5640, VD6640, VD8640
1.3 megapixel high dynamic range image sensor
Data brief
• Automotive Safety Integrity Level (ASIL) data
included as part of each frame
• Automotive qualification: AEC-Q100 grade 2
• Operating junction temperature: -40oC to
+125oC
Description
This is a high performance, high dynamic range
1.3 megapixel image sensor. Designed for
automotive, security and other demanding
outdoor applications, the device offers supreme
low light performance and numerous safety
integrity features.
An embedded Bayer data pre-processor
integrates a wide range of image enhancement
functions, designed to ensure high image quality.
Features
• 1.3 megapixel resolution sensor (1304 x 980)
in 1/2.7 inch optical format
An advanced synchronization facility allows multi-
camera systems to work with minimal latency and
motion temporal mismatch artifacts.
• High dynamic range (HDR) pixel architecture,
up to 132 dB dynamic range
• Best in class FSI high pixel sensitivity with
This sensor targets the market for mono and
stereo forward facing, mirror replacement, multi
purpose cameras in cars, parking assist and all
round view camera systems and is a good match
for the needs of HD security applications.
3.75 µm pixel size
• 45 frames per second at full resolution,
60 frames per second at 720p resolution
• Small physical size of 9.0 mm x 9.3 mm in
automotive qualified package Im2BGA
• Synchronization for multiple cameras
• Highly configurable HDR image pre-processing
Table 1. Device variants
• Motion and flicker tolerant HDR options
including flicker flag to denote affected pixels
Device
Color filter
Package
• Comprehensive inline pixel defect correction
VG5640
VG6640
VG8640
VD5640
VD6640
VD8640
CCCC
RGB Bayer
RCCC
Im2BGA
Im2BGA
2
• Fast+ I C control interface
(a)
• MIPI CSI-2 version 1.01 serial and/or 12-bit
Im2BGA
parallel video data interface
CCCC
None(bare die)
None(bare die)
None(bare die)
RGB Bayer
RCCC
a. Copyright© 2005-2010 MIPI Alliance, Inc. Standard
for Camera Serial Interface 2 (CSI-2) version 1.01,
limited to 1 Gbps per lane
October 2015
DocID026813 Rev 3
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For further information contact your local STMicroelectronics sales office.
www.st.com
Technical specifications
VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
Technical specifications
Table 2. Technical specifications
Detail
Feature
Pixel resolution
1304 x 980
Sensor technology
Pixel size
65 nm, CMOS imager process
3.75 µm x 3.75 µm
3 integration times with real-time data merging
+13 dB (x5) maximum
+12 dB (maximum)
72 dB
HDR characteristics
Pixel gain
Analog gain
Dynamic range (linear mode)
Dynamic range (in scene)
132 dB
Peak signal to noise ratio (on pixel)
Minimum illumination (on pixel)
Pixel sensitivity (without colour filter)
Power consumption
42 dB @ 12 lux
1.0 mlux @ SNR 1 (no color filter, 30ms Integration)
>=32V/lxsec @3200K
400 mW @ 30 fps
-40°C to +125°C functional
Junction Temperature range (Tj)
(-40°C to +105°C for acceptable images)
Shutter
Electrical rolling
Peak quantum efficiency
NIR cut-off wavelength
Fixed pattern noise (FPN)
Temporal read noise
Image lag
>60% @ 520 nm
>=10% QE @ <900 nm
<0.01% @ 20°C
<0.025% @ full swing
<0.1%
Package option
Exposed glass BGA 9.0 mm x 9.3 mm
45 fps
Frame rate at full resolution
Frame rate at HD video (720p) resolution 60 fps
Parallel interface data rate
66 Mpixel/s (12 bits per pixel)
CSI-2 serial interface data rate
2 x 550 Mbit/s
2.8V analog supply
Supply voltages
1.8V or 2.8V digital I/O supply
1.2V digital core supply (on-board regulator available)
Temperature sensor accuracy
External clock frequency range
Oscillator frequency range
±3°C over the operating range
12-50 MHz, AC or DC coupled
12-27 MHz, quartz crystal
±1 line through an I2C command or through dedicated
signal
Frame synchronization
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VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
Technical specifications
Functional description
The VG6640 block diagram is shown in Figure 1. The main blocks are as follows:
•
Master controller
–
–
–
–
–
–
clock and reset management
I2C bus control interface and transaction routing
safe control of system state changes from Standby to Streaming
device reinitialization to default mode (software Reset)
management of integration times across the three captures
Non Volatile Memory (NVM) management
•
•
•
Custom Analog Block (CAB)
Video timing block
HDR video pipe
–
responsible for real time image data processing at pixel clock rate, Processes the
RAW pixel data from the ADCs in the CAB. The HDR video pipe contains a set of
defect correction and data coding blocks.
•
Image data interfaces
–
video data coders and transmitters for the serial (MIPI CSI-2) and parallel
interfaces
•
•
On chip regulators
–
to supply the analog block and, optionally, the digital core
Clock and PLL
–
to provide all the clocks required for data capture through to output interfaces from
a single frequency source
Non volatile memory (NVM)
to store production and part to part variance data
Temperature sensors
•
•
–
–
to allow the host application to monitor sensor temperature
Figure 1. Block Diagram
External sync.
Power supply
Image sensor
Video timing
1V2
reg.
Temp. Charge
sensor pumps
Custom analog block
(CAB)
MIPI
HDR
video pipe
1304 x 980
HDR pixels
CSI-2 &
parallel
I/O
Companion
device
Master
controller
Clock &
PLL
2
NVM
I C
External clock
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Technical specifications
Interfaces
VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
The VGx640 is ready to connect via one of two interfacing options. The sensor supports a
12bit (ITU) parallel interface with frame and line sync signals and a pixel clock, or a dual
lane MIPI CSI-2 serial interface. Before transmission the 22bit HDR image data is
compressed down to 12bits using a piece wise linear (PWL) compression algorithm to
minimize perceptible losses.
The 12bit ITU parallel interface is capable of 66Mpixel/s.
The dual lane MIPI CSI-2 serial interface supports 1.1Gbit/s and is the industry standard for
low EMI and excellent EMC high speed interfacing.
The sensor is configured and controlled via a I2C (Inter Integrated Circuit) interface
operating in either Fast (up to 400KHz) or Fast+(up to 1MHz) modes.
Power supplies
Power supplies required by the sensor are:
• 2.8V for the analogue blocks
• 2.8V or 1.8V for the digital I/Os
• The digital core operates at 1.2V. This can be supplied via an internal regulator or from
an external 1.2V supply.
Clock
An input clock is required which can be supplied from an external clock in the range of
12MHz to 50MHz or from a quartz crystal of between 12MHz to 27MHz.
Image enhancement, status and test features
The device contains an embedded video processor and delivers uncolored images up to 60
frames/s at 720p resolution, or 45 frames/s at 1304x980 resolution. The video processor
integrates a wide range of image enhancements, designed to ensure a high image quality.
These enhancements include:
•
•
•
•
•
•
•
•
•
•
External frame synchronization
Windowing/image cropping
Subsampling
Dark calibration
Fixed pattern noise correction
Frame cropping
Defective pixel correction
Test pattern generation
Statistics generation
Embedded sensor data
HDR Merge modes
The on chip video processor implements and manages one of five different merge schemes
with each of the key parameters user configurable by the host to give a fully flexible HDR
scheme to maximise in scene dynamic range and maximise SNR. There are also IP blocks
included to manage and minimise ‘flicker’, such as indicators and PWM controlled lighting,
and ‘ghosting’, caused by motion of sensor or in scene movement at the maximum frame
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VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
Ordering Information
rates. Many of the configuration parameters for the HDR image capture are duplicated in a
second register bank. These two banks can be toggled at the maximum frame rates to
provide images from two distinct configurations to, for example, optimise for machine vision
and for driver display.
External frame synchronization
The external frame synchronization offers two methods for control synchronization of the
frame start of multiple cameras.
•
•
A common Frame Sync signal from the host or a ‘principal’ camera.
An I2C bus command sent by the host to set an offset to the current frame start.
Using one of these techniques each camera sync can be corrected to an accuracy of less
than 1 line period.
Safety integrity
A set of self diagnostic features allow the device to support the automotive safety integrity
level (ASIL) system requirements. These include the following:
•
Cyclic redundancy checking (CRC) on image data through the parallel or serial
interface
•
•
•
•
•
Error correction codes (ECC) for sensor critical memories
Analog in line test information
Digital in line test information
Two temperature sensors
Access to diagnostic information via embedded data lines in the image
Ordering Information
Table 3. Ordering information
Ordering code(1)
Color filter
Device package
Packing
Tape & reel(2)
VG5640xB1M/1
VG6640xB1M/1
VG8640xB1M/1
VG5640xB1M
CCCC
RGB Bayer
RCCC
Im2BGA
Im2BGA
Tape & reel(2)
Tape & reel(2)
Tray(3)
Im2BGA
CCCC
Im2BGA
VG6640xB1M
RGB Bayer
RCCC
Im2BGA
Tray(3)
VG8640xB1M
Im2BGA
Tray(3)
VD5640xzSB/RW
VD6640xzSB/RW
VD8640xzSB/RW
CCCC
None (bare die)
None (bare die)
None (bare die)
Reconstructed wafer
Reconstructed wafer
Reconstructed wafer
RGB Bayer
RCCC
1. Substitute x with A for automotive grade; C for industrial grade parts. For bare die substitute z for wafer
thickness.
2. For volume orders.
3. For sample orders.
DocID026813 Rev 3
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®
ECOPACK
VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
®
ECOPACK
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark
Revision history
Table 4. Document revision history
Date
Revision
Changes
20-Aug-2014
06-Nov-2014
01-Oct-2015
1
2
3
Initial version
Update Features and Functional description sections
Updated to align with v7 of the datasheet
6/7
DocID026813 Rev 3
®
VG5640, VG6640, VG8640, VD5640, VD6640, VD8640
ECOPACK
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DocID026813 Rev 3
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