VNB20N07(8957) [STMICROELECTRONICS]

VNB20N07(8957);
VNB20N07(8957)
型号: VNB20N07(8957)
厂家: ST    ST
描述:

VNB20N07(8957)

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VNP20N07FI  
VNB20N07/VNV20N07  
®
"OMNIFET":  
FULLY AUTOPROTECTED POWER MOSFET  
TYPE  
Vclamp  
RDS(on)  
Ilim  
VNP20N07FI  
VNB20N07  
VNV20N07  
70 V  
70 V  
70 V  
0.05 Ω  
0.05 Ω  
0.05 Ω  
20 A  
20 A  
20 A  
LINEAR CURRENT LIMITATION  
THERMAL SHUT DOWN  
SHORT CIRCUIT PROTECTION  
INTEGRATED CLAMP  
LOW CURRENT DRAWN FROM INPUT PIN  
DIAGNOSTIC FEEDBACK THROUGH INPUT  
PIN  
ISOWATT220  
3
2
1
ESD PROTECTION  
DIRECT ACCESS TO THE GATE OF THE  
POWER MOSFET (ANALOG DRIVING)  
COMPATIBLE WITH STANDARD POWER  
MOSFET  
10  
3
1
1
D2PAK  
TO-263  
PowerSO-10  
DESCRIPTION  
The VNP20N07FI, VNB20N07 and VNV20N07  
are  
monolithic  
devices  
made  
using  
STMicroelectronics VlPower M0 Technology,  
intended for replacement of standard power  
MOSFETS in DC to 50 KHz applications. Built-in  
thermal shut-down, linear current limitation and  
overvoltage clamp protect the chip in harsh  
enviroments.  
Fault feedback can be detected by monitoring the  
voltage at the input pin.  
BLOCK DIAGRAM ( )  
( ) PowerSO-10 Pin Configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB  
June 1998  
1/13  
VNP20N07FI-VNB20N07-VNV20N07  
ABSOLUTE MAXIMUM RATING  
Symbol  
Parameter  
Value  
Unit  
PowerSO-10  
D2PAK  
ISOWATT220  
VDS  
Vin  
ID  
Drain-source Voltage (Vin = 0)  
Input Voltage  
Internally Clamped  
V
V
18  
Internally Limited  
-28  
Drain Current  
A
IR  
Reverse DC Output Current  
Electrostatic Discharge (C= 100 pF, R=1.5 K)  
A
Vesd  
Ptot  
Tj  
2000  
V
o
Total Dissipation at Tc = 25 C  
83  
34  
W
oC  
oC  
oC  
Operating Junction Temperature  
Case Operating Temperature  
Storage Temperature  
Internally Limited  
Internally Limited  
-55 to 150  
Tc  
Tstg  
THERMAL DATA  
ISOWATT220 PowerSO-10  
D2PAK  
Rthj-case Thermal Resistance Junction-case  
Rthj-amb Thermal Resistance Junction-ambient Max  
Max  
3.75  
62.5  
1.5  
50  
1.5  
62.5  
oC/W  
oC/W  
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)  
OFF  
Symbol  
Parameter  
Test Conditions  
ID = 200 mA Vin = 0  
Min.  
Typ.  
Max.  
Unit  
VCLAMP Drain-source Clamp  
Voltage  
60  
70  
80  
V
VCLTH  
VINCL  
IDSS  
Drain-source Clamp  
Threshold Voltage  
ID = 2 mA Vin = 0  
Iin = -1 mA  
55  
-1  
V
V
Input-Source Reverse  
Clamp Voltage  
-0.3  
Zero Input Voltage  
Drain Current (Vin = 0) VDS = 25 V Vin = 0  
VDS = 13 V Vin = 0  
50  
200  
µA  
µA  
IISS  
Supply Current from  
Input Pin  
VDS = 0 V Vin = 10 V  
250  
500  
µA  
ON ( )  
Symbol  
Parameter  
Test Conditions  
VDS = Vin ID + Iin = 1 mA  
Min.  
Typ.  
Max.  
Unit  
VIN(th)  
Input Threshold  
Voltage  
0.8  
3
V
RDS(on)  
Static Drain-source On Vin = 10 V ID = 10 A  
0.05  
0.07  
Resistance  
V
in = 5 V  
ID = 10 A  
DYNAMIC  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
gfs ( )  
Forward  
VDS = 13 V  
ID = 10 A  
13  
17  
S
Transconductance  
Coss  
2/13  
Output Capacitance  
VDS = 13 V f = 1 MHz Vin = 0  
500  
800  
pF  
VNP20N07FI-VNB20N07-VNV20N07  
ELECTRICAL CHARACTERISTICS (continued)  
SWITCHING ( )  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
td(on)  
tr  
td(off)  
tf  
Turn-on Delay Time  
Rise Time  
Turn-off Delay Time  
Fall Time  
V
V
DD = 15 V  
gen = 10 V  
Id = 10 A  
Rgen = 10 Ω  
90  
180  
400  
800  
300  
ns  
ns  
ns  
ns  
240  
430  
150  
(see figure 3)  
td(on)  
tr  
td(off)  
tf  
Turn-on Delay Time  
Rise Time  
Turn-off Delay Time  
Fall Time  
V
V
DD = 15 V  
gen = 10 V  
Id = 10 A  
Rgen = 1000 Ω  
800  
1.5  
6
1200  
2.2  
10  
ns  
µs  
µs  
µs  
(see figure 3)  
3.5  
5.5  
(di/dt)on Turn-on Current Slope VDD = 15 V  
Vin = 10 V  
ID = 10 A  
Rgen = 10 Ω  
60  
A/µs  
Qi  
Total Input Charge  
VDD = 12 V ID = 10 A Vin = 10 V  
60  
nC  
SOURCE DRAIN DIODE  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
VSD ( ) Forward On Voltage  
ISD = 10 A Vin = 0  
1.6  
trr(  
Qrr(  
IRRM  
)
Reverse Recovery  
Time  
Reverse Recovery  
Charge  
Reverse Recovery  
Current  
I
SD = 10 A  
di/dt = 100 A/µs  
Tj = 25 C  
165  
0.55  
6.5  
ns  
o
VDD = 30 V  
(see test circuit, figure 5)  
)
µC  
(
)
A
PROTECTION  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
Ilim  
Drain Current Limit  
Vin = 10 V VDS = 13 V  
14  
14  
20  
20  
28  
28  
A
A
Vin = 5 V  
VDS = 13 V  
tdlim  
Tjsh  
(
(
)
)
Step Response  
Current Limit  
Vin = 10 V  
Vin = 5 V  
29  
70  
60  
140  
µs  
µs  
oC  
Overtemperature  
Shutdown  
150  
135  
Tjrs  
(
)
Overtemperature Reset  
Fault Sink Current  
oC  
Igf(  
)
Vin = 10 V  
Vin = 5 V  
50  
20  
mA  
mA  
o
Eas  
(
)
Single Pulse  
starting Tj = 25 C  
VDD = 20 V  
0.95  
J
Avalanche Energy  
Vin = 10 V Rgen = 1 KL = 10 mH  
( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %  
) Parameters guaranteed by design/characterization  
(
3/13  
VNP20N07FI-VNB20N07-VNV20N07  
PROTECTION FEATURES  
During normal operation, the Input pin is  
electrically connected to the gate of the internal  
power MOSFET. The device then behaves like a  
standard power MOSFET and can be used as a  
switch from DC to 50 KHz. The only difference  
from the user’s standpoint is that a small DC  
current (Iiss) flows into the Input pin in order to  
supply the internal circuitry.  
- OVERTEMPERATURE AND SHORT CIRCUIT  
PROTECTION: these are based on sensing  
the chip temperature and are not dependent on  
the input voltage. The location of the sensing  
element on the chip in the power stage area  
ensures fast, accurate detection of the junction  
temperature. Overtemperature cutout occurs at  
minimum 150oC. The device is automatically  
restarted when the chip temperature falls  
below 135oC.  
The device integrates:  
- OVERVOLTAGE  
CLAMP  
PROTECTION:  
internally set at 70V, along with the rugged  
avalanche characteristics of the Power  
MOSFET stage give this device unrivalled  
ruggedness and energy handling capability.  
This feature is mainly important when driving  
inductive loads.  
- STATUS FEEDBACK: In the case of an  
overtemperature fault condition,  
a Status  
Feedback is provided through the Input pin.  
The internal protection circuit disconnects the  
input from the gate and connects it instead to  
ground via an equivalent resistance of 100 .  
The failure can be detected by monitoring the  
voltage at the Input pin, which will be close to  
ground potential.  
- LINEAR CURRENT LIMITER CIRCUIT: limits  
the drain current Id to Ilim whatever the Input  
pin voltage. When the current limiter is active,  
the device operates in the linear region, so  
power dissipation may exceed the capability of  
the heatsink. Both case and junction  
temperatures increase, and if this phase lasts  
long enough, junction temperature may reach  
the overtemperature threshold Tjsh.  
Additional features of this device are ESD  
protection according to the Human Body model  
and the ability to be driven from a TTL Logic  
circuit (with a small increase in RDS(on)).  
4/13  
VNP20N07FI-VNB20N07-VNV20N07  
Thermal Impedance For ISOWATT220  
Thermal Impedance For D2PAK / PowerSO-10  
Derating Curve  
Output Characteristics  
Transconductance  
Static Drain-Source On Resistance vs Input  
Voltage  
5/13  
VNP20N07FI-VNB20N07-VNV20N07  
Static Drain-Source On Resistance  
Static Drain-Source On Resistance  
Input Charge vs Input Voltage  
Capacitance Variations  
Normalized Input Threshold Voltage vs  
Temperature  
Normalized On Resistance vs Temperature  
6/13  
VNP20N07FI-VNB20N07-VNV20N07  
Normalized On Resistance vs Temperature  
Turn-on Current Slope  
Turn-on Current Slope  
Turn-off Drain-Source Voltage Slope  
Turn-off Drain-Source Voltage Slope  
Switching Time Resistive Load  
7/13  
VNP20N07FI-VNB20N07-VNV20N07  
Switching Time Resistive Load  
Switching Time Resistive Load  
Current Limit vs Junction Temperature  
Step Response Current Limit  
Source Drain Diode Forward Characteristics  
8/13  
VNP20N07FI-VNB20N07-VNV20N07  
Fig. 1: Unclamped Inductive Load Test Circuits  
Fig. 2: Unclamped Inductive Waveforms  
Fig. 3: Switching Times Test Circuits For  
Fig. 4: Input Charge Test Circuit  
Resistive Load  
Fig. 5: Test Circuit For Inductive Load Switching  
Fig. 6: Waveforms  
And Diode Recovery Times  
9/13  
VNP20N07FI-VNB20N07-VNV20N07  
ISOWATT220 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
4.4  
TYP.  
MAX.  
4.6  
2.7  
2.75  
0.7  
1
MIN.  
0.173  
0.098  
0.098  
0.015  
0.030  
0.045  
0.045  
0.195  
0.094  
0.393  
MAX.  
0.181  
0.106  
0.108  
0.027  
0.039  
0.067  
0.067  
0.204  
0.106  
0.409  
A
B
2.5  
D
2.5  
E
0.4  
F
0.75  
1.15  
1.15  
4.95  
2.4  
F1  
F2  
G
1.7  
1.7  
5.2  
2.7  
10.4  
G1  
H
10  
L2  
L3  
L4  
L6  
L7  
Ø
16  
0.630  
28.6  
9.8  
15.9  
9
30.6  
10.6  
16.4  
9.3  
1.126  
0.385  
0.626  
0.354  
0.118  
1.204  
0.417  
0.645  
0.366  
0.126  
3
3.2  
L3  
L6  
L7  
¯
1 2 3  
L4  
L2  
P011G  
10/13  
VNP20N07FI-VNB20N07-VNV20N07  
TO-263 (D2PAK) MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
4.3  
TYP.  
MAX.  
4.6  
MIN.  
0.169  
0.098  
0.027  
0.049  
0.017  
0.047  
0.352  
0.393  
0.192  
0.590  
0.050  
0.055  
MAX.  
0.181  
0.106  
0.036  
0.055  
0.023  
0.053  
0.368  
0.404  
0.208  
0.624  
0.055  
0.068  
A
A1  
B
2.49  
0.7  
2.69  
0.93  
1.4  
B2  
C
1.25  
0.45  
1.21  
8.95  
10  
0.6  
C2  
D
1.36  
9.35  
10.28  
5.28  
15.85  
1.4  
E
G
4.88  
15  
L
L2  
L3  
1.27  
1.4  
1.75  
E
A
C2  
L2  
D
L
L3  
A1  
B2  
B
C
G
P011P6/C  
11/13  
VNP20N07FI-VNB20N07-VNV20N07  
PowerSO-10 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
3.35  
0.00  
0.40  
0.35  
9.40  
7.40  
9.30  
7.20  
7.20  
6.10  
5.90  
TYP.  
MAX.  
3.65  
0.10  
0.60  
0.55  
9.60  
7.60  
9.50  
7.40  
7.60  
6.35  
6.10  
MIN.  
0.132  
0.000  
0.016  
0.013  
0.370  
0.291  
0.366  
0.283  
0.283  
0.240  
0.232  
MAX.  
0.144  
0.004  
0.024  
0.022  
0.378  
0.300  
0.374  
0.291  
0.300  
0.250  
0.240  
A
A1  
B
c
D
D1  
E
E1  
E2  
E3  
E4  
e
1.27  
0.050  
F
1.25  
1.35  
0.049  
0.543  
0.053  
0.567  
H
13.80  
14.40  
h
0.50  
1.70  
0.002  
0.067  
L
1.20  
0o  
1.80  
8o  
0.047  
0.071  
q
α
B
0.10  
A
B
10  
6
H
E
E3 E1  
E2  
E4  
1
5
SEATING  
PLANE  
DETAIL "A"  
e
B
A
C
M
0.25  
Q
D
=
=
=
=
h
D1  
SEATING  
PLANE  
A
F
A1  
L
A1  
DETAIL "A"  
α
0068039-C  
12/13  
VNP20N07FI-VNB20N07-VNV20N07  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is  
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are  
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products  
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a trademark of STMicroelectronics  
© 1998 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -  
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.  
.
13/13  

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