VND920TR-E [STMICROELECTRONICS]
2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO28, SO-28;
| 型号： | VND920TR-E |
| 厂家： | 
ST |
| 描述： | 2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO28, SO-28 外围驱动器 驱动程序和接口 接口集成电路 继电器 固态继电器 光电二极管 |
| 文件： | 总18页 (文件大小：326K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VND920
®
DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY
TYPE
R
I
V
CC
DS(on)
OUT
VND920
16mΩ
35 A (*)
36 V
(*) Per channel with all the output pins connected to the PCB.
■ CMOS COMPATIBLE INPUT
■ PROPORTIONAL LOAD CURRENT SENSE
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ OVERVOLTAGE CLAMP
SO-28 (DOUBLE ISLAND)
ORDER CODES
■ THERMAL SHUTDOWN
■ CURRENT LIMITATION
PACKAGE
TUBE
T&R
■ PROTECTION AGAINST LOSS OF GROUND
SO-28
VND920
VND92013TR
AND LOSS OF VCC
■ VERY LOW STAND-BY POWER DISSIPATION
■ REVERSE BATTERY PROTECTION (*)
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart protect the device against overload. Built-
in analog current sense output delivers a current
proportional to the load current. Device
automatically turns off in case of ground pin
disconnection.
DESCRIPTION
The VND920 is a double chip device made by
using
STMicroelectronics
VIPower
M0-3
Technology, intended for driving any kind of load
with one side connected to ground. Active VCC pin
CONNECTION DIAGRAM (TOP VIEW)
V
1
V
1
CC
28
1
CC
GND 1
OUTPUT 1
OUTPUT 1
OUTPUT 1
INPUT 1
CURRENT SENSE 1
NC
NC
OUTPUT 1
OUTPUT 1
OUTPUT 1
V
1
CC
V
2
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
OUTPUT 2
CC
GND 2
INPUT 2
CURRENT SENSE 2
NC
NC
V
2
V
2
14
15
CC
CC
(*) See application schematic at page 10
October 2002
1/18
1
VND920
BLOCK DIAGRAM
V
1
CC
OVERVOLTAGE
DETECTION
V
CC
CLAMP
UNDERVOLTAGE
DETECTION
GND 1
Power CLAMP
DRIVER
OUTPUT 1
LOGIC
INPUT 1
CURRENT LIMITER
LIMITER
V
DS
I
OUT
CURRENT
SENSE 1
K
OVERTEMPERATURE
DETECTION
V
2
CC
OVERVOLTAGE
DETECTION
V
CC
CLAMP
UNDERVOLTAGE
DETECTION
GND 2
Power CLAMP
DRIVER
OUTPUT 2
LOGIC
INPUT 2
CURRENT LIMITER
V
LIMITER
DS
I
OUT
CURRENT
SENSE 2
K
OVERTEMPERATURE
DETECTION
2/18
VND920
ABSOLUTE MAXIMUM RATING (Per each channel)
Symbol
Parameter
Value
Unit
V
V
DC Supply Voltage
41
CC
- V
Reverse DC Supply Voltage
- 0.3
V
CC
GND
OUT
- I
DC Reverse Ground Pin Current
DC Output Current
- 200
mA
A
I
Internally Limited
- I
Reverse DC Output Current
DC Input Current
- 21
+/- 10
-3
A
OUT
I
mA
V
IN
Current Sense Maximum Voltage
V
CSENSE
+15
V
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
4000
2000
5000
5000
V
V
V
V
V
- CURRENT SENSE
- OUTPUT
ESD
- V
CC
Maximum Switching Energy
(L=0.25mH; R =0Ω; V =13.5V; T
E
355
mJ
MAX
=150ºC; I =45A)
L
bat
jstart
L
P
Power Dissipation T ≤25°C
6.25 (**)
Internally limited
- 40 to 150
W
°C
°C
°C
tot
l
T
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
j
T
c
T
- 55 to 150
STG
(**) Per island
CURRENT AND VOLTAGE CONVENTIONS
I
I
S2
S1
V
V
CC2
CC1
V
V
CC2
CC1
I
OUT1
I
IN1
OUTPUT1
INPUT1
V
OUT1
I
V
SENSE1
IN1
CURRENT SENSE 1
OUTPUT2
V
SENSE1
I
I
OUT2
I
IN2
V
INPUT2
OUT2
V
SENSE2
IN2
CURRENT SENSE 2
V
SENSE2
GROUND2
GROUND1
I
I
GND2
GND1
3/18
VND920
THERMAL DATA (Per island)
Symbol
Parameter
Value
20
Unit
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance Junction-lead
thj-lead
thj-amb
thj-amb
Thermal Resistance Junction-ambient (one chip ON)
Thermal Resistance Junction-ambient (two chips ON)
55 (*)
42 (*)
2
(*) When mounted on a standard single-sided FR-4 board with 1cm of Cu (at least 35µm thick) connected to all V pins.
CC
Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
(Per island)
POWER
Symbol
Parameter
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
Unit
V
V
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
CC
V
5.5
V
USD
V
36
V
OV
I
I
I
I
=10A; T =25°C
16
32
55
55
25
mΩ
mΩ
mΩ
V
OUT
OUT
OUT
j
On State Resistance
R
=10A
=3A; V =6V
ON
CC
V
Clamp Voltage
=20mA (See note 1)
CC
41
48
10
clamp
µA
Off State; V =13V; V =V
=0V
CC
IN
OUT
Off State; V =13V; V =V
=0V;
CC
IN
OUT
Supply Current
I
10
20
µA
T =25°C
S
j
On State; V =13V; V =5V; I =0A;
OUT
CC
IN
R
=3.9KΩ
5
50
0
mA
µA
µA
µA
µA
SENSE
I
I
I
I
Off State Output Current V =V =0V
OUT
0
L(off1)
L(off2)
L(off3)
L(off4)
IN
Off State Output Current V =0V; V
=3.5V
-75
IN
OUT
Off State Output Current V =V
=0V; V =13V; T =125°C
5
IN
OUT
OUT
CC
j
Off State Output Current V =V
=0V; V =13V; T =25°C
3
IN
CC
j
SWITCHING (VCC=13V)
Symbol
Parameter
Test Conditions
R =1.3Ω (see figure 2)
Min
Typ
50
Max
Unit
µs
t
t
Turn-on Delay Time
Turn-off Delay Time
d(on)
d(off)
L
R =1.3Ω (see figure 2)
50
µs
L
See
dV
dV
/dt
Turn-on Voltage Slope
Turn-off Voltage Slope
R =1.3Ω (see figure 2)
relative
diagram
V/µs
V/µs
OUT (on)
L
See
relative
diagram
/dt
R =1.3Ω (see figure 2)
OUT (off)
L
LOGIC INPUT
Symbol
Parameter
Input Low Level
Test Conditions
Min
Typ
Max
Unit
V
V
1.25
IL
I
Low Level Input Current V =1.25V
1
µA
V
IL
IN
V
Input High Level
3.25
IH
IH
I
High Level Input Current V =3.25V
10
8
µA
V
IN
V
Input Hysteresis Voltage
0.5
6
I(hyst)
I =1mA
6.8
V
IN
V
Input Clamp Voltage
ICL
I =-1mA
-0.7
V
IN
Note 1: V
4/18
and V are correlated. Typical difference is 5V.
clamp
OV
1
VND920
ELECTRICAL CHARACTERISTICS (continued)
CURRENT SENSE (9V ≤ VCC ≤ 16V) (See Fig.1)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
I
=1A; V
=0.5V;
SENSE
OUT
K
I
/I
OUT SENSE
3300
4400
6000
1
T = -40°C...150°C
j
I
=1A; V
=0.5V;
SENSE
OUT
dK1/K1
Current Sense Ratio Drift
I /I
OUT SENSE
-10
+10
%
T = -40°C...+150°C
j
I
=10A; V
=4V; T =-40°C
4200
4400
4900
4900
6000
5750
OUT
SENSE
j
K
2
T =25°C...150°C
j
I
=10A; V
=4V;
OUT
SENSE
dK2/K2
Current Sense Ratio Drift
I /I
OUT SENSE
-8
+8
%
T =-40°C...+150°C
j
I
=30A; V
=4V; T =-40°C
4200
4400
4900
4900
5500
5250
OUT
SENSE
j
K
3
T =25°C...150°C
j
I
=30A; V
=4V;
OUT
SENSE
dK3/K3
Current Sense Ratio Drift
-6
+6
%
T =-40°C...+150°C
j
V
=6...16V; I
=0A;V
=0V;
Analog Sense Leakage
Current
CC
OUT
SENSE
I
0
10
µA
SENSEO
T =-40°C...+150°C
j
V
V
=5.5V; I
=5A; R =10KΩ
SENSE
2
4
V
V
Max Analog Sense Output
Voltage
CC
OUT
V
SENSE
>8V; I
=10A; R
=10KΩ
CC
OUT
SENSE
Sense Voltage in
Overtemperature
conditions
V
V
=13V; R =3.9KΩ
SENSE
5.5
V
SENSEH
CC
Analog Sense Output
Impedance in
Overtemperature
Condition
R
V
=13V; T >T ; All channels open
TSD
400
Ω
VSENSEH
CC
j
Current sense delay
response
t
to 90% I
(see note 2)
SENSE
500
µs
DSENSE
PROTECTIONS
Symbol
Parameter
Test Conditions
Min
150
135
7
Typ
Max
Unit
°C
°C
°C
A
T
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
175
200
TSD
T
R
T
15
45
hyst
V
=13V
30
75
75
CC
I
DC Short Circuit Current
lim
5V<V <36V
A
CC
Turn-off Output Clamp
Voltage
V
I
I
=2A; V =0V; L=6mH
V
-41 V -48 V -55
V
demag
OUT
IN
CC
CC
CC
Output Voltage Drop
Limitation
V
=1A; T =-40°C....+150°C
50
mV
ON
OUT
j
Note 2: current sense signal delay after positive input slope
Note: Sense pin doesn’t have to be left floating.
5/18
2
VND920
Figure 1: I
/I
versus I
OUT SENSE OUT
6500
I
/I
OUT SENSE
6000
max.Tj=-40°C
5500
5000
4500
4000
3500
3000
max.Tj=25...150°C
min.Tj=25...150°C
typical value
min.Tj=-40°C
0
2
4
6
8
10
12
14
(A)
16
18
20
22
24
26
28
30
32
I
OUT
Figure 2: Switching Characteristics (Resistive load RL=1.3Ω)
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tf
tr
t
ISENSE
90%
t
t
DSENSE
INPUT
td(on)
td(off)
t
6/18
VND920
Switching time Waveforms
V
OUT
90%
80%
dV /dt
OUT (off)
dV
/dt
OUT (on)
t
t
f
r
10%
t
V
IN
t
d(on)
t
d(off)
t
TRUTH TABLE (Per each channel)
CONDITIONS
INPUT
OUTPUT
CURRENT SENSE
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
0
Normal operation
Overtemperature
Undervoltage
Nominal
0
H
L
V
SENSEH
0
H
L
0
0
0
0
Overvoltage
H
L
Short circuit to GND
H
H
L
(T <T
) 0
) V
0
j
TSD
TSD
(T >T
j
SENSEH
Short circuit to V
CC
H
L
< Nominal
0
Negative output voltage clamp
7/18
VND920
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
TEST LEVELS
III
I
II
IV
Delays and
Impedance
Test Pulse
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
Test Pulse
TEST LEVELS RESULTS
I
II
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
1
2
C
C
C
C
C
C
C
C
C
C
C
E
3a
3b
4
5
CLASS
CONTENTS
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
8/18
VND920
Figure 3: Waveforms
NORMAL OPERATION
INPUTn
LOAD CURRENTn
SENSEn
UNDERVOLTAGE
V
CCn
V
USDhyst
V
USD
INPUTn
LOAD CURRENTn
SENSEn
OVERVOLTAGE
V
OV
V
CCn
V
V
> V
USD
OVhyst
CC
INPUTn
LOAD CURRENTn
SENSEn
SHORT TO GROUND
INPUTn
LOAD CURRENTn
LOAD VOLTAGEn
SENSEn
SHORT TO V
CC
INPUTn
LOAD VOLTAGEn
LOAD CURRENTn
SENSEn
<Nominal
<Nominal
OVERTEMPERATURE
T
TSD
T
j
T
R
INPUTn
LOAD CURRENTn
SENSEn
V
R
SENSEH
I
=
SENSE
SENSE
9/18
VND920
APPLICATION SCHEMATIC
+5V
R
prot
INPUT1
V
V
CC1
CC2
D
ld
R
R
OUTPUT1
prot
C. SENSE 1
INPUT2
prot
µC
OUTPUT2
R
prot
C. SENSE 2
GND2
GND1
R
SENSE1,2
R
GND
D
GND
V
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
1) R
2) R
where -I
≤ 600mV / (I
).
S(on)max
LOAD DUMP PROTECTION
GND
GND
≥ (−V ) / (-I
)
CC
GND
D
is necessary (Voltage Transient Suppressor) if the
ld
is the DC reverse ground pin current and can
load dump peak voltage exceeds V max DC rating. The
GND
CC
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
battery situations) is:
same applies if the device will be subject to transients on
the V
line that are greater than the ones shown in the
CC
ISO T/R 7637/1 table.
(when V <0: during reverse
CC
GND
µC I/Os PROTECTION:
2
P = (-V ) /R
D
CC
GND
If a ground protection network is used and negative
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
transients are present on the V line, the control pins will
CC
be pulled negative. ST suggests to insert a resistor (R
)
prot
calculated with formula (1) where I
becomes the
in line to prevent the µC I/Os pins to latch-up.
S(on)max
sum of the maximum on-state currents of the different
devices.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
Please note that if the microprocessor ground is not
common with the device ground then the R
will
GND
produce a shift (I
* R
) in the input thresholds
S(on)max
GND
-V
/I
≤ R
≤ (V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND
IHmax
and the status output values. This shift will vary
depending on how many devices are ON in the case of
Calculation example:
several high side drivers sharing the same R
.
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
GND
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
5kΩ ≤ R
≤ 65kΩ.
prot
Recommended R
value is 10kΩ.
prot
Solution 2: A diode (D
) in the ground line.
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
10/18
1
VND920
High Level Input Current
Off State Output Current
IL(off1) (uA)
Iih (uA)
9
5
4.5
8
7
6
5
4
3
2
1
0
Vin=3.25V
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Input Clamp Voltage
Input High Level
Vih (V)
Vicl (V)
3.6
8
7.8
3.4
3.2
3
Iin=1mA
7.6
7.4
7.2
7
2.8
2.6
2.4
2.2
2
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
1.5
2.6
1.4
1.3
1.2
1.1
1
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
11/18
VND920
ILIM Vs Tcase
Overvoltage Shutdown
Vov (V)
Ilim (A)
100
50
90
48
46
44
42
40
38
36
34
32
30
Vcc=13V
80
70
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (°C)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(off) (V/ms)
dVout/dt(on) (V/ms)
550
700
500
650
Vcc=13V
Rl=1.3Ohm
450
Vcc=13V
Rl=1.3Ohm
600
400
550
350
300
250
200
150
100
50
500
450
400
350
300
250
0
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (°C)
Tc (ºC)
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
50
50
45
45
40
35
30
25
20
15
10
5
Iout=10A
Vcc=8V; 36V
40
35
Tc= 150ºC
30
25
20
15
10
5
Tc= 25ºC
Tc= - 40ºC
0
0
-50
-25
0
25
50
75
100
125
150
175
5
10
15
20
25
30
35
40
Tc (ºC)
Vcc (V)
12/18
VND920
Maximum turn off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.01
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/18
VND920
SO-28 DOUBLE ISLAND THERMAL DATA
SO-28 Double island PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
2
2
Cu thickness=35µm, Copper areas: 0.5cm , 3cm , 6cm ).
Thermal calculation according to the PCB heatsink area
Chip 1 Chip 2
T
T
Note
jchip1
jchip2
ON
OFF
ON
OFF
ON
ON
ON
R
R
R
x P
x P
+ T
+ T
R
R
R
x P
x P
+ T
+ T
thA
thC
thB
dchip1
amb
thC
thA
thB
dchip1
amb
dchip2
amb
dchip2
amb
x (P
+ P
) + T
x (P
+ P
) + T
P
P
=P
dchip1 dchip2
dchip1
dchip1
dchip2
amb
dchip1
dchip2
dchip2
amb
ON
(R x P
) + R
x P
+ T
(R x P
) + R x P
+ T
≠P
dchip1 dchip2
thA
thC
dchip2
amb
thA
thC
dchip1
amb
R
R
R
= Thermal resistance Junction to Ambient with one chip ON
= Thermal resistance Junction to Ambient with both chips ON and P
= Mutual thermal resistance
thA
thB
thC
=P
dchip2
dchip1
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_am b
(°C/W)
70
60
50
40
30
20
10
RthA
RthB
RthC
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)/island
14/18
VND920
SO-28 Thermal Impedance Junction Ambient Single Pulse
Zth(°C/W)
100
0,5 cm ^2/island
3 cm ^2/island
6 cm ^2/island
10
1
One channel ON
Tw o channels ON
0.1
0.01
0.0001
0.001
0.01
0.1
time(s)
1
10
100
1000
Thermal fitting model of a two channels HSD in
SO-28
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
R1= (°C/W)
0.5
0.02
0.1
6
13
8
Tj_1
C1
R1
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R2= (°C/W)
R3= (°C/W)
R4= (°C/W)
R5= (°C/W)
R6= (°C/W)
C1= (W.s/°C)
C2= (W.s/°C)
C3= (W.s/°C)
C4= (W.s/°C)
C5= (W.s/°C)
C6= (W.s/°C)
Pd1
2.2
C2
11
Tj_2
15
R2
30
Pd2
0.0015
7.00E-03
1.50E-02
0.2
T_amb
1.5
5
15/18
VND920
SO-28 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
2.65
0.30
0.49
0.32
MIN.
MAX.
0.104
0.012
0.019
0.012
A
a1
b
0.10
0.35
0.23
0.004
0.013
0.009
b1
C
c1
D
E
0.50
0.020
45 (typ.)
17.7
18.1
0.697
0.393
0.713
0.419
10.00
10.65
e
1.27
0.050
0.650
e3
F
16.51
7.40
0.40
7.60
1.27
0.291
0.016
0.299
0.050
L
S
8 (max.)
16/18
VND920
SO-28 TUBE SHIPMENT (no suffix)
Base Q.ty
28
700
532
3.5
Bulk Q.ty
Tube length (± 0.5)
C
B
A
B
13.8
0.6
C (± 0.1)
All dimensions are in mm.
A
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
1000
1000
330
1.5
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
13
20.2
16.4
60
G (+ 2 / -0)
N (min)
T (max)
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
16
4
Tape Hole Spacing
Component Spacing
Hole Diameter
12
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
7.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
17/18
VND920
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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18/18
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