VNL5050S5TR-E [STMICROELECTRONICS]
OMNIFET III fully protected low-side driver;
| 型号： | VNL5050S5TR-E |
| 厂家： | 
ST |
| 描述： | OMNIFET III fully protected low-side driver 光电二极管 |
| 文件： | 总33页 (文件大小：585K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VNL5050N3-E
VNL5050S5-E
OMNIFET III
fully protected low-side driver
Datasheet
-
production data
Description
2
The VNL5050N3-E and VNL5050S5-E are
monolithic devices made using
STMicroelectronics VIPower® Technology,
intended for driving resistive or inductive loads
with one side connected to the battery.
3
2
1
SO-8
SOT-223
Built-in thermal shutdown protects the chip from
overtemperature and short-circuit. Output current
limitation protects the devices in an overload
condition. In case of long duration overload, the
devices limit the dissipated power to a safe level
up to thermal shutdown intervention.Thermal
shutdown, with automatic restart, allows the
devices to recover normal operation as soon as a
fault condition disappears. Fast demagnetization
of inductive loads is achieved at turn-off.
Features
Type
Vclamp
RDS(on)
ID
VNL5050N3-E
VNL5050S5-E
41 V
50 mΩ
19 A
• Automotive qualified
• Drain current: 19 A
• ESD protection
• Overvoltage clamp
• Thermal shutdown
• Current and power limitation
• Very low standby current
• Very low electromagnetic susceptibility
• Compliant with European directive 2002/95/EC
• Open drain status output (VNL5050S5-E only)
Table 1. Devices summary
Order codes
Package
Tube
Tape and reel
SOT-223
SO-8
VNL5050N3-E
VNL5050S5-E
VNL5050N3TR-E
VNL5050S5TR-E
December 2013
DocID15917 Rev 6
1/33
This is information on a product in full production.
www.st.com
Contents
VNL5050N3-E, VNL5050S5-E
Contents
1
2
Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
4
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1
3.2
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1
4.2
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
®
5.1
5.2
5.3
5.4
5.5
ECOPACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/33
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VNL5050N3-E, VNL5050S5-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Suggested connections for unused and n.c. pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power MOS section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Input section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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3
List of figures
VNL5050N3-E, VNL5050S5-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
VNL5050N3-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VNL5050S5-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VNL5050N3-E current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
VNL5050S5-E current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Source diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain source on-resistance vs. drain current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain source on-resistance vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain source on-resistance vs. drain current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Transfer characteristics (inside view for VIN = 2 V to 3 V) . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Output characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. Normalized on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Normalized input threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. VNL5050N3-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. VNL5050S5-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Maximum demagnetization energy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. SOT-223 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Thermal fitting model of a LSD in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. Thermal fitting model of a LSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 28. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 29. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 30. SO-8 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 31. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Block diagrams and pins configurations
1
Block diagrams and pins configurations
Figure 1. VNL5050N3-E block diagram
Drain
LOGIC
Control & Diagnostic
Current
Limitation
Power
Clamp
IN
DRIVER
OVERTEMPERATURE
PROTECTION
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Drain
Figure 2. VNL5050S5-E block diagram
SUPPLY
SUPPLY
LOGIC
Control & Diagnostic
OFF State
Open load
Current
Limitation
Power
Clamp
IN
DRIVER
OVERTEMPERATURE
ST
PROTECTION
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
DocID15917 Rev 6
5/33
32
Block diagrams and pins configurations
VNL5050N3-E, VNL5050S5-E
Table 2. Pin function
Function
Name
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state(1)
INPUT
DRAIN
Power MOS drain
SOURCE
Power MOS source and ground reference for the control section
SUPPLY
VOLTAGE
Supply voltage connected to the signal part (5 V)
Open drain digital diagnostic pin(2)
STATUS
1. Internally connected to V
in the VNL5050N3-E
supply
2. Valid for VNL5050S5-E only.
Figure 3. VNL5050N3-E current and voltage conventions
*
%
7%4
%3"*/
*
*/
*/165
7*/
4063$&
("1(ꢀꢁꢀꢂꢀꢁꢀꢃꢀꢀ$'5
Figure 4. VNL5050S5-E current and voltage conventions
*
%
7%4
%3"*/
*
*/
*/165
7*/
*
45"5
45"564
*
745"5
4
4611-:
4063$&
70-5"(&
7TVQQMZ
("1(ꢀꢁꢀꢂꢀꢁꢀꢄꢀꢁ$'5
6/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Block diagrams and pins configurations
Figure 5. Configuration diagrams (top view)
ꢃ
ꢇ
%3"*/
/ꢉ$ꢉ
ꢁ
ꢂ
4063$&
%3"*/
ꢄ
ꢅ
ꢁ
ꢂ
4063$&
4063$&
45"564
*/165
%3"*/
ꢂ
ꢀ
*/165
ꢆ
ꢀ
%3"*/
4611-:ꢈ70-5"(&
405ꢊꢂꢂꢁ
40ꢊꢆ
("1(ꢀꢄꢀꢂꢀꢁꢋꢄꢃꢋ$'5
Table 3. Suggested connections for unused and n.c. pins
Connection / pin
STATUS
N.C.
INPUT
Floating
X
X
X
X
To ground
Not allowed
Through 10 kΩ resistor
DocID15917 Rev 6
7/33
32
Absolute maximum rating
VNL5050N3-E, VNL5050S5-E
2
Absolute maximum rating
Stressing the device above the rating listed in the Table 4 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
2.1
Absolute maximum ratings
Table 4. Absolute maximum ratings
Value
Symbol
Parameter
Unit
SOT-223
SO-8
VDS
ID
Drain-source voltage (VIN = 0 V)
DC drain current
Internally clamped
V
A
Internally limited
4
-ID
Reverse DC drain current
DC supply current
A
IS
-
-
-1 to 10
mA
mA
mA
IIN
DC input current
-1 to 10
ISTAT
DC status current
-1 to 10
Electrostatic discharge
(R = 1.5 kΩ; C = 100 pF)
– DRAIN
VESD1
V
5000
4000
– SUPPLY, INPUT, STATUS
Electrostatic discharge on output pin only
(R = 330 Ω, C = 150 pF)
VESD2
2000
V
Tj
Junction operating temperature
Storage temperature
-40 to 150
-55 to 150
°C
°C
Tstg
Single pulse avalanche energy
EAS
93
mJ
(L = 1.1 mH, TJ = 150 °C, RL = 0, IOUT = IlimL
)
2.2
Thermal data
Table 5. Thermal data
Maximum value
Symbol
Parameter
Unit
SOT-223
SO-8
Rthj-amb Thermal resistance junction-ambient
108.3(1)
87
°C/W
2
1. When mounted on a standard single-sided FR4 board with 0.5 cm of Cu (at least 35 µm thick) connected
to all DRAIN pins
8/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Electrical characteristics
3
Electrical characteristics
Values specified in this section are for Vsupply = VIN = 4.5 V to 5.5 V, -40 °C < Tj < 150 °C,
unless otherwise stated.
Table 6. Power MOS section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Vsupply Operating supply voltage
-
3.5
5
5.5
V
ID = 2 A; Tj = 25 °C,
Vsupply = VIN = 5 V
50
RON
ON-state resistance
mΩ
ID = 2 A; Tj = 150 °C,
Vsupply = VIN = 5 V
100
52
VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 2 A
Drain-source clamp
41
36
46
V
V
VCLTH
VIN = 0 V; ID = 2 mA
threshold voltage
VIN = 0 V; VDS = 13 V;
Tj = 25 °C
0
0
3
5
IDSS
OFF-state output current
µA
VIN = 0 V; VDS = 13 V;
Tj = 125 °C
Table 7. Source drain diode
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VSD
Forward on voltage
ID = 2 A; VIN = 0 V
-
0.8
-
V
Table 8. Input section(1)
Test conditions
.
Symbol
Parameter
Min. Typ. Max. Unit
ON-state: Vsupply = VIN = 5 V;
IISS
Supply current from input pin
30
65
7
µA
V
DS = 0 V
IS = 1 mA
5.5
1
VICL
Input clamp voltage
V
V
IS = -1 mA
-0.7
VINTH Input threshold voltage
VDS = VIN; ID = 1 mA
3.5
1. Valid for VNL5050N3-E option (input and supply pins connected together)
Table 9. Status pin(1)
Symbol
Parameter
Test conditions
ISTAT = 1 mA
Min.
Typ.
Max.
Unit
VSTAT Status low output voltage
ILSTAT Status leakage current
0.5
10
V
Normal operation;
VSTAT = 5 V
µA
pF
Normal operation;
VSTAT = 5 V
CSTAT Status pin input capacitance
100
DocID15917 Rev 6
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32
Electrical characteristics
Symbol
VNL5050N3-E, VNL5050S5-E
Table 9. Status pin(1) (continued)
Parameter
Test conditions
STAT = 1 mA
Min.
Typ.
Max.
Unit
I
5.5
7
VSTCL Status clamp voltage
1. Valid for VNL5050S5-E option
V
ISTAT = -1 mA
-0.7
Table 10. Logic input(1)
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
VIL
IIL
Low-level input voltage
Low-level input current
High-level input voltage
High-level input current
—
0.9
V
µA
V
VIN = 0.9 V
—
1
VIH
IIH
2.1
VIN = 2.1 V
—
10
7
µA
V
VI(hyst) Input hysteresis voltage
0.13
5.5
IIN = 1 mA
IIN = -1 mA
VICL Input clamp voltage
V
-0.7
1. Valid for VNL5050S5-E option
Table 11. Openload detection(1)
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
Openload OFF-state voltage
detection threshold
VOl
VIN = 0 V
0.6
45
1.2
1.7
V
Delay between INPUT falling
td(oloff) edge and STATUS falling edge
in openload condition
I
OUT = 0 A
425 1100
µs
1. Valid for VNL5050S5-E option
Table 12. Supply section(1)
Test conditions
Symbol
Parameter
Min. Typ. Max. Unit
OFF-state: Tj = 25 °C;
10
25
25
V
IN = VDRAIN = 0 V;
IS
Supply current
µA
V
ON-state: Tj = 25 °C;
VIN = 5 V; VDS = 0 V
65
7
I
SCL = 1 mA
5.5
VSCL Supply clamp voltage
1. Valid for VNL5050S5-E option
ISCL = -1 mA
-0.7
10/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Electrical characteristics
Table 13. Switching characteristics(1)
SOT-223(2)
SO-8
Unit
Symbol
Parameter
Test conditions
Min. Typ. Max Min. Typ. Max.
Turn-on delay
time
RL = 6.5 Ω,
CC = 13 V(3)
td(ON)
td(OFF)
tr
—
—
—
—
—
—
6
—
—
—
—
—
—
—
—
—
—
—
—
6
—
—
—
—
—
—
µs
µs
µs
µs
mJ
mJ
V
Turn-off delay
time
RL = 6.5 Ω,
VCC = 13 V
20
20
RL = 6.5 Ω,
VCC = 13 V
Rise time
Fall time
10
10
RL = 6.5 Ω,
tf
10
10
VCC = 13 V
Switching energy RL = 6.5 Ω,
losses at turn-on VCC = 13 V
WON
WOFF
0.04
0.06
0.04
0.06
Switching energy RL = 6.5 Ω,
losses at turn-off VCC = 13 V
1. see Figure 16: VNL5050N3-E application schematic and Figure 17: VNL5050S5-E application schematic
2. 3.5 V ≤ V = V ≤ 5.5 V
supply
IN
3. See Figure 15: Switching characteristics
Table 14. Protection and diagnostics
Symbol
Parameter
Test conditions(1)
Min.
Typ.
Max.
Unit
VDS = 13 V;
supply = VIN = 5 V
IlimH
DC short-circuit current
19
27
38
A
V
Short-circuit current
during thermal cycling
VDS = 13 V; TR < Tj < TTSD;
Vsupply = VIN = 5 V
IlimL
11
A
Step response current
limit
tdlimL
VDS = 13 V; Vinput = 5 V
44
µs
TTSD Shutdown temperature
—
—
150
175
200
°C
°C
(2)
TR
Reset temperature
TRS + 1 TRS + 5
135
Thermal reset of
STATUS
(3)
TRS
—
—
°C
°C
Thermal hysteresis
(TTSD - TR)
THYST
7
1. Vsupply = Vinput in VNL5050N3-E version
2. Valid for VNL5050S5-E option
DocID15917 Rev 6
11/33
32
Electrical characteristics
VNL5050N3-E, VNL5050S5-E
3.1
Electrical characteristics curves
Figure 6. Source diode forward characteristics Figure 7. Static drain source on-resistance vs.
drain current
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input voltage
drain current
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12/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Electrical characteristics
Figure 10. Transfer characteristics
Figure 11. Transfer characteristics (inside view
for VIN = 2 V to 3 V)
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Figure 12. Output characteristics
Figure 13. Normalized on-resistance vs.
temperature
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DocID15917 Rev 6
13/33
32
Electrical characteristics
VNL5050N3-E, VNL5050S5-E
Figure 14. Normalized input threshold vs.
temperature
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Table 15. Truth table(1)
INPUT
Conditions
Normal operation
DRAIN
STATUS
L
H
H
H
H
L
L
H
X
H
H
Current limitation
Overtemperature
Undervoltage
H
L
H
H
H
L
H
L
H
H
X
X
H
L
L
L
L
Output voltage < VOL
H
H
1. Valid for VNL5050S5-E option
14/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Electrical characteristics
Figure 15. Switching characteristics
*
%
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DocID15917 Rev 6
15/33
32
Electrical characteristics
VNL5050N3-E, VNL5050S5-E
Figure 17. VNL5050S5-E application schematic
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16/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Electrical characteristics
3.2
MCU I/O protection
ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from
latching up(a). The value of these resistors is a compromise between the leakage current of
microcontroller and the current required by the LSD I/Os (input levels compatibility) with the
latch-up limit of microcontroller I/Os:
Equation 1
VOH μ C − VIH
IIH max
0.7
≤ R prot
≤
Ilatchup
Let:
•
•
•
I
latchup > 20 mA
OHµC > 4.5 V
35 Ω ≤ Rprot ≤ 100 KΩ
V
Then, the recommended value is Rprot = 1 KΩ
Figure 18 shows the turn-off current drawn during the demagnetization.
a. In case of negative transient on the drain pin
DocID15917 Rev 6
17/33
32
Electrical characteristics
VNL5050N3-E, VNL5050S5-E
Figure 18. Maximum demagnetization energy
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1. The voltage supply is V = 13.5 V
CC
18/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
SOT-223 thermal data
Figure 19. SOT-223 PC board
1. Layout condition of R and Z measurements (PCB FR4 area = 30 mm x 58 mm, PCB thickness = 2 mm,
th
th
2
Cu thickness = 35 µm, copper areas: from minimum pad lay-out to 0.8 cm ).
Figure 20.
R
vs. PCB copper area in open box free air condition
thj-amb
RTHjamb (°C/W)
150
footprint
140
130
120
110
100
90
80
70
60
0
0.5
1
1.5
2
2.5
PCB Cu heatsink area (cm2)
DocID15917 Rev 6
19/33
32
Package and PC board thermal data
VNL5050N3-E, VNL5050S5-E
Figure 21. SOT-223 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Cu footprint
Cu=2 cm2
100
10
1
0.1
0.0001
0.001
0.01
0.1
Time (s)
1
10
100
1000
Equation 2: pulse calculation formula
Z
= R
Þ δ + Z
(1 – δ)
THδ
TH
THtp
where δ = tP/T
Figure 22. Thermal fitting model of a LSD in SOT-223
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
20/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and PC board thermal data
Table 16. Thermal parameters
Area/island (cm2)
Footprint
2
45
2
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.4
0.8
4.5
24
0.1
115
0.00006
0.0005
0.03
0.16
1000
0.4
DocID15917 Rev 6
21/33
32
Package and PC board thermal data
VNL5050N3-E, VNL5050S5-E
4.2
SO-8 thermal data
Figure 23. SO-8 PC board
1. Layout condition of R and Z measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm,
th
th
2
Cu thickness = 35 µm (front and back side), Copper areas: from minimum pad lay-out to 2 cm ).
Figure 24.
R
vs. PCB copper area in open box free air condition
thj-amb
RTHjamb (°C/W)
105
95
85
75
65
footprint
0
0.5
1
1.5
2
2.5
PCB Cu heatsink area (cm2)
22/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and PC board thermal data
Figure 25. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Cu=footprint
Cu=2 cm2
100
10
1
0.1
0.0001
0.001
0.01
0.1
Time (s)
1
10
100
1000
Equation 3: pulse calculation formula
Z
= R
Þ δ + Z
(1 – δ)
THδ
TH
THtp
where δ = tP/T
Figure 26. Thermal fitting model of a LSD in SO-8
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
DocID15917 Rev 6
23/33
32
Package and PC board thermal data
VNL5050N3-E, VNL5050S5-E
Table 17. Thermal parameters
Area/island (cm2)
Footprint
0.4
2
28
2
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
2.4
3.5
21
16
58
0.00008
0.0016
0.0075
0.045
0.35
1.05
24/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and packing information
5
Package and packing information
®
5.1
ECOPACK
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
SOT-223 mechanical data
Figure 27. SOT-223 package dimensions
0046067
DocID15917 Rev 6
25/33
32
Package and packing information
VNL5050N3-E, VNL5050S5-E
Table 18. SOT-223 mechanical data
mm.
Typ.
inch
Typ.
DIM.
Min.
Max.
Min.
Max.
A
1.8
0.85
3.15
0.35
6.7
0.071
0.033
0.124
0.014
0.264
B
B1
c
0.6
2.9
0.7
3
0.024
0.114
0.009
0.248
0.027
0.118
0.01
0.24
6.3
0.26
6.5
2.3
4.6
3.5
7
D
0.256
0.09
e
e1
E
0.181
0.138
0.276
3.3
6.7
3.7
7.3
0.13
0.146
0.287
H
0.264
V
10 (max)
0.0008
A1
0.02
0.1
0.004
26/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and packing information
5.3
SO-8 mechanical data
Figure 28. SO-8 package dimensions
DocID15917 Rev 6
27/33
32
Package and packing information
VNL5050N3-E, VNL5050S5-E
Table 19. SO-8 mechanical data
Millimeters
Typ.
Symbol
Min.
Max.
1.75
0.25
A
A1
A2
b
0.10
1.25
0.28
0.17
4.80
5.80
3.80
0.48
0.23
5.00
6.20
4.00
c
D(1)
E
4.90
6.00
3.90
1.27
E1(2)
e
h
0.25
0.40
0.50
1.27
L
L1
k
1.04
0°
8°
ccc
0.10
1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
28/33
DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Package and packing information
5.4
SOT-223 packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Devices
summary on page 1 ).
Figure 29. SOT-223 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
1000
1000
330
1.5
13
20.2
12.4
60
G (+ 2 / -0)
N (min)
T (max)
18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (+ 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
5.5
4.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
DocID15917 Rev 6
29/33
32
Package and packing information
VNL5050N3-E, VNL5050S5-E
5.5
SO-8 packing information
Figure 30. SO-8 tube shipment (no suffix)
Base q.ty
100
2000
532
3.2
B
C
A
Bulk q.ty
Tube length (± 0.5)
A
B
6
C (± 0.1)
0.6
All dimensions are in mm.
Figure 31. SO-8 tape and reel shipment (suffix “TR”)
Reel dimensions
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
2500
2500
330
1.5
13
20.2
12.4
60
G (+ 2 / -0)
N (min)
T (max)
18.4
All dimensions are in mm.
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
12
4
Tape hole spacing
Component spacing
Hole diameter
8
D (+ 0.1/-0) 1.5
Hole diameter
D1 (min)
F (± 0.05)
K (max)
1.5
5.5
4.5
2
Hole position
Compartment depth
Hole spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
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DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
Revision history
6
Revision history
Table 20. Document revision history
Changes
Date
Revision
9-Jan-2008
1
Initial release.
Updated corporate template from V2 to V3
Table 3: Suggested connections for unused and n.c. pins
– VESD1: updated parameter and value
– VESD2: changed value
Table 4: Absolute maximum ratings
– Rthj-case: deleted max value for SO-8
– Rthj-amb: added max value for both SOT-223 and SO-8
Table 7: Source drain diode
– VSD: added typ value
Table 8: Input section.
– VICL: added min/max value for IS = 1 mA
– VINTH: added min/max value
Table 9: Status pin
– VSTCL: added max value for ISTAT = 1 mA
Table 10: Logic input
– VICL: added max value for IN = 1 mA
Table 12: Supply section
– IS: changed unit of measurement for ON-state.
– VVSL: added max value for ISTAT = 1 mA
Table 13: Switching characteristics
25-Jun-2009
2
– td(OFF): changed typ value both for SOT-223 and SO-8
– WON: added typ value for SO-8
– WOFF: added typ value for SO-8
– Added all typ column for SOT-223
Table 14: Protection and diagnostics
– IlimL: changed typ value
– tdlimL: changed typ value
– Deleted row TR valid for VNL5050N3-E option
Added Figure 6: Source diode forward characteristics
Added Figure 7: Static drain source on-resistance vs. drain current
Added Figure 8: Static drain source on-resistance vs. input voltage
Added Figure 9: Static drain source on-resistance vs. drain current
Added Figure 10: Transfer characteristics
Added Figure 11: Transfer characteristics (inside view for VIN = 2 V
to 3 V)
Added Figure 12: Output characteristics
Added Figure 13: Normalized on-resistance vs. temperature
Added Chapter 4: Package and PC board thermal data
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32
Revision history
VNL5050N3-E, VNL5050S5-E
Table 20. Document revision history (continued)
Date
Revision
Changes
Deleted table 25: SOT-223 mechanical data & package outline
Added Figure 27: SOT-223 package dimensions
Added Table 18: SOT-223 mechanical data
2
25-Jun-2009
19-Aug-2009
(continued)
Deleted table 26: SO-8 mechanical data & package outline
Added Figure 28: SO-8 package dimensions
Added Table 19: SO-8 mechanical data
Updated corporate template from V3 to V3-1
3
Deleted row for Rthj-case in Table 5: Thermal data
Changed the document title
Took the first line off the bullet list for Features on cover page
Table 4: Absolute maximum ratings
– EAS: added new row
Table 6: Power MOS section
– Vsupply: added new row
– RON: updated test conditions
Table 8: Input section.
– ISS: updated test conditions
– Updated the table footnote
Table 13: Switching characteristics
– Moved footnote 2 and changed its text
– WON: changed typ value
20-Nov-2009
4
– WOFF: changed typ value
Table 14: Protection and diagnostics
– IlimH: updated test conditions
– IlimL: updated test conditions
– tdlimL: changed typ value
Updated Figure 7: Static drain source on-resistance vs. drain current
Updated Figure 8: Static drain source on-resistance vs. input voltage
Updated Figure 9: Static drain source on-resistance vs. drain current
Updated Figure 10: Transfer characteristics
Added Figure 11: Transfer characteristics (inside view for VIN = 2 V
to 3 V)
Updated Figure 14: Normalized input threshold vs. temperature
Added Section 3.2: MCU I/O protection
19-Sep-2013
17-Dec-2013
5
6
Updated Disclaimer.
Table 4: Absolute maximum ratings:
– -ID: updated value
Table 8: Input section.:
– IISS: updated value
Table 12: Supply section:
– IS: updated value
Updated Figure 16: VNL5050N3-E application schematic and
Figure 17: VNL5050S5-E application schematic
Updated Section 3.2: MCU I/O protection
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DocID15917 Rev 6
VNL5050N3-E, VNL5050S5-E
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