VNP35N07TR-E
更新时间:2024-09-18 13:01:56
描述:35 A BUF OR INV BASED PRPHL DRVR, SFM3, ROHS COMPLIANT, TO-220, 3 PIN
VNP35N07TR-E 概述
35 A BUF OR INV BASED PRPHL DRVR, SFM3, ROHS COMPLIANT, TO-220, 3 PIN 外围驱动器
VNP35N07TR-E 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 零件包装代码: | SFM |
包装说明: | , | 针数: | 3 |
Reach Compliance Code: | compliant | 风险等级: | 5.74 |
内置保护: | TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL | 接口集成电路类型: | BUFFER OR INVERTER BASED PERIPHERAL DRIVER |
JESD-30 代码: | R-XSFM-T3 | JESD-609代码: | e3 |
功能数量: | 1 | 端子数量: | 3 |
输出电流流向: | SINK | 标称输出峰值电流: | 35 A |
封装主体材料: | UNSPECIFIED | 封装形状: | RECTANGULAR |
封装形式: | FLANGE MOUNT | 峰值回流温度(摄氏度): | NOT SPECIFIED |
表面贴装: | NO | 端子面层: | MATTE TIN |
端子形式: | THROUGH-HOLE | 端子位置: | SINGLE |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 断开时间: | 16 µs |
接通时间: | 800 µs | Base Number Matches: | 1 |
VNP35N07TR-E 数据手册
通过下载VNP35N07TR-E数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载VNP35N07
”OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE
Vclamp
RDS(on)
Ilim
VNP35N07
70 V
0.028 Ω
35 A
■
■
■
■
■
■
LINEAR CURRENT LIMITATION
THERMAL SHUT DOWN
SHORT CIRCUIT PROTECTION
INTEGRATED CLAMP
LOW CURRENT DRAWN FROM INPUT PIN
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
3
2
1
■
■
ESD PROTECTION
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
COMPATIBLE WITH STANDARD POWER
MOSFET
TO-220
■
■
STANDARD TO-220 PACKAGE
DESCRIPTION
current limitation and overvoltage clamp protect
the chip in harsh enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
The VNP35N07 is a monolithic device made
using SGS-THOMSON Vertical Intelligent Power
M0 Technology, intended for replacement of
standard power MOSFETS in DC to 50 KHz
applications. Built-in thermal shut-down, linear
BLOCK DIAGRAM
1/11
April 1996
VNP35N07
ABSOLUTE MAXIMUM RATING
Symbol
VDS
Vin
Parameter
Value
Internally Clamped
18
Unit
V
Drain-source Voltage (Vin = 0)
Input Voltage
V
ID
Drain Current
Internally Limited
-50
A
IR
Reverse DC Output Current
Electrostatic Discharge (C= 100 pF, R=1.5 KΩ)
Total Dissipation at Tc = 25 oC
Operating Junction Temperature
Case Operating Temperature
Storage Temperature
A
Vesd
Ptot
Tj
2000
V
125
W
oC
oC
oC
Internally Limited
Internally Limited
-55 to 150
Tc
Tst g
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Rthj-amb Thermal Resistance Junction-ambient
Max
Max
1
62.5
oC/W
oC/W
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbol
Parameter
Test Conditions
ID = 200 mA Vin = 0
Min.
Typ.
Max.
Unit
VCLAMP
Drain-source Clamp
Voltage
60
70
80
V
VCLTH
VINCL
IDSS
Drain-source Clamp
Threshold Voltage
ID = 2 mA Vin = 0
Iin = -1 mA
55
-1
V
V
Input-Source Reverse
Clamp Voltage
-0.3
Zero Input Voltage
Drain Current (Vin = 0) VDS = 25 V Vin = 0
VDS = 13 V Vin = 0
50
200
µA
µA
IISS
Supply Current from
Input Pin
VDS = 0 V Vin = 10 V
250
500
µA
ON ( )
Symbol
Parameter
Test Conditions
VDS = Vin ID + Iin = 1 mA
Min.
Typ.
Max.
Unit
VIN(th)
Input Threshold
Voltage
0.8
3
V
RDS(on)
Static Drain-source On Vin = 10 V ID = 18 A
0.028
0.035
Ω
Ω
Resistance
Vin = 5 V
ID = 18 A
DYNAMIC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
gfs ( )
Forward
VDS = 13 V
ID = 18 A
20
25
S
Transconductance
Coss
Output Capacitance
VDS = 13 V f = 1 MHz Vin = 0
980
1400
pF
2/11
VNP35N07
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING (
)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
VDD = 28 V
Vgen = 10 V
(see figure 3)
Id = 18 A
Rgen = 10 Ω
100
350
650
200
200
600
1000
350
ns
ns
ns
ns
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
VDD = 28 V
Vgen = 10 V
(see figure 3)
Id = 18 A
Rgen = 1000 Ω
500
2.7
10
800
4.2
16
ns
µs
µs
µs
4.3
6.5
(di/dt)on Turn-on Current Slope VDD = 28 V
Vin = 10 V
ID = 18 A
Rgen = 10 Ω
60
A/µs
Qi
Total Input Charge
VDD = 12 V ID = 18 A Vin = 10 V
100
nC
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
VSD ( ) Forward On Voltage
ISD = 18 A Vin = 0
1.6
trr(
Qrr(
IRRM
)
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 18 A
VDD = 30 V
(see test circuit, figure 5)
di/dt = 100 A/µs
250
1
ns
Tj = 25 oC
)
µC
(
)
8
A
PROTECTION
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Ilim
tdlim
Tjsh
Tjrs
Drain Current Limit
Vin = 10 V VDS = 13 V
25
25
35
35
45
45
A
A
Vin = 5 V
VDS = 13 V
(
)
)
Step Response
Current Limit
Vin = 10 V
Vin = 5 V
35
70
60
140
µs
µs
oC
(
Overtemperature
Shutdown
150
135
(
)
Overtemperature Reset
Fault Sink Current
oC
Igf
(
)
Vin = 10 V VDS = 13 V
Vin = 5 V VDS = 13 V
50
20
mA
mA
Eas
(
)
Single Pulse
Avalanche Energy
starting Tj = 25 oC
VDD = 20 V
Vin = 10 V Rgen = 1 KΩ L = 10 mH
2.5
J
( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
) Parameters guaranteed by design/characterization
(
3/11
VNP35N07
PROTECTION FEATURES
During normal operation, the Input pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user’s standpoint is that a small DC
current (Iiss) flows into the Input pin in order to
supply the internal circuitry.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing
the chip temperatureand are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperature cutout occurs at
minimum 150oC. The device is automatically
restarted when the chip temperature falls
below 135oC.
The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 70V, along with the rugged
avalanche characteristics of the Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductiveloads.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition,
a Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capability of
the heatsink. Both case and junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (with a small increase in RDS(on)).
the overtemperaturethreshold Tjsh
.
4/11
VNP35N07
Thermal Impedance
Derating Curve
Output Characteristics
Transconductance
Static Drain-Source On Resistance vs Input
Voltage
Static Drain-Source On Resistance
5/11
VNP35N07
Static Drain-Source On Resistance
Input Charge vs Input Voltage
Capacitance Variations
Normalized Input Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Normalized On Resistance vs Temperature
6/11
VNP35N07
Turn-on Current Slope
Turn-on Current Slope
Turn-off Drain-Source Voltage Slope
Turn-off Drain-Source Voltage Slope
Switching Time Resistive Load
Switching Time Resistive Load
7/11
VNP35N07
Switching Time Resistive Load
Current Limit vs Junction Temperature
Step Response Current Limit
Source Drain Diode Forward Characteristics
8/11
VNP35N07
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Fig. 4: Input Charge Test Circuit
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
Fig. 6: Waveforms
And Diode Recovery Times
9/11
VNP35N07
TO-220 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
4.40
1.23
2.40
TYP.
MAX.
4.60
1.32
2.72
MIN.
0.173
0.048
0.094
MAX.
0.181
0.051
0.107
A
C
D
D1
E
1.27
0.050
0.49
0.61
1.14
1.14
4.95
2.4
0.70
0.88
1.70
1.70
5.15
2.7
0.019
0.024
0.044
0.044
0.194
0.094
0.393
0.027
0.034
0.067
0.067
0.203
0.106
0.409
F
F1
F2
G
G1
H2
L2
L4
L5
L6
L7
L9
DIA.
10.0
10.40
16.4
0.645
13.0
2.65
15.25
6.2
14.0
2.95
15.75
6.6
0.511
0.104
0.600
0.244
0.137
0.147
0.551
0.116
0.620
0.260
0.154
0.151
3.5
3.93
3.85
3.75
L2
Dia.
L5
L9
L7
L6
L4
P011C
10/11
VNP35N07
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise underany patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics productsare notauthorized for use as criticalcomponents in life supportdevices or systems withoutexpress
written approval of SGS-THOMSON Microelectonics.
1996 SGS-THOMSON Microelectronics - Printedin Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia- Brazil - Canada - China - France - Germany - Hong Kong - Italy- Japan- Korea - Malaysia- Malta- Morocco - TheNetherlands -
Singapore - Spain- Sweden- Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
.
11/11
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