VNQ660SPTR-E [STMICROELECTRONICS]
Quad channel high side solid state relay; 四通道高侧固态继电器
| 型号： | VNQ660SPTR-E |
| 厂家： | 
ST |
| 描述： | Quad channel high side solid state relay |
| 文件： | 总26页 (文件大小：408K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VNQ660SP
Quad channel high side solid state relay
Features
Type
RDS(on)
IOUT
VCC
10
(1)
VNQ660SP
50mΩ
6A
36V
1. Per each channel.
1
PowerSO-10
■ CMOS compatible inputs
■ Off state open load detection
■ Undervoltage and overvoltage shutdown
■ Overvoltage clamp
Description
The VNQ660SP is a monolithic device made by
using| STMicroelectronics VIPower M0-3
Technology, intended for driving resistive or
inductive loads with one side connected to
ground.
■ Thermal shutdown
■ Current limitation
■ Very low standby power dissipation
■ Protection against loss of ground and loss of
This device has four independent channels. Built-
in thermal shutdown and output current limitation
protect the chip from over temperature and short
circuit.
V
CC
(a)
■ Reverse battery protection
a. See Application schematic on page 16
Table 1.
Device summary
Package
Order codes
Tape and reel
Tube
VNQ660SP
PowerSO-10
VNQ660SP13TR
December 2008
Rev 5
1/26
www.st.com
26
Contents
VNQ660SP
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
2.3
2.4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1
3.1.2
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
Solution 2: a diode (D ) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.2
3.3
3.4
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 18
4
5
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
5.2
5.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
VNQ660SP
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
V
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Switching (V = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CC
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3/26
List of figures
VNQ660SP
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14. On state resistance vs V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Openload Off state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 25. PowerSO-10 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. Thermal fitting model of a quad channel HSD in PowerSO-10. . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. PowerSO-10 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4/26
VNQ660SP
Block diagram and pin description
1
Block diagram and pin description
Figure 1.
Block diagram
VCC
OVERVOLTAGE
UNDERVOLTAGE
DEMAG 1
DRIVER 1
OUTPUT 1
ILIM1
INPUT 1
DEMAG 2
INPUT 2
INPUT 3
DRIVER 2
DRIVER 3
OUTPUT 2
OUTPUT 3
ILIM2
LOGIC
DEMAG 3
INPUT 4
STATUS
ILIM3
DEMAG 4
ILIM4
STATUS
DRIVER 4
OUTPUT 4
OVERTEMP. 1
OVERTEMP. 2
OPEN LOAD
OFF-STATE
OVERTEMP. 3
OVERTEMP. 4
GND
Figure 2.
Configuration diagram (top view)
5
4
3
GND
6
7
8
9
STATUS
INPUT 4
INPUT 3
INPUT 2
INPUT 1
OUTPUT 4
OUTPUT 3
OUTPUT 2
OUTPUT 1
2
1
10
11
V
CC
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
Through 10KΩ
To ground
X
resistor
5/26
Electrical specifications
VNQ660SP
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VCC
- VCC
IOUT
IR
Supply voltage
41
- 0.3
V
V
Reverse DC supply voltage
DC output current, per each channel
Reverse DC output current, per each channel
Input current
Internally limited
- 15
A
A
IIN
+/- 10
mA
mA
mA
ISTAT
IGND
Status current
+/- 10
DC ground current at TC < 25°C
-200
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
- INPUT
- STATUS
- OUTPUT
- VCC
4000
4000
5000
5000
V
V
V
V
VESD
Maximum switching energy
EMAX
101
mJ
(L = 0.38mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 14A)
Ptot
Tj
Power dissipation at TC = 25°C
Junction operating temperature
Storage temperature
114
W
°C
°C
mJ
- 40 to 150
- 65 to 150
150
Tstg
EC
Non repetitive clamping energy at TC = 25°C
2.2
Thermal data
Table 4.
Symbol
Thermal data (per island)
Parameter
Value
Unit
Rthj-case Thermal resistance junction-case
1.1(1)
52(2)
33(2)
°C/W
°C/W
Rthj-amb Thermal resistance junction-ambient (one chip ON)
51.1(1)
1. When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35 µm thick).
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick).
6/26
VNQ660SP
Electrical specifications
2.3
Electrical characteristics
Values specified in this section are for 6V < V < 24V; -40°C < T < 150°C, unless
CC
j
otherwise stated.
Figure 3.
Current and voltage conventions
I
S
V
(*)
F1
V
I
CC
IN1
I
OUT1
V
CC
INPUT 1
INPUT 2
OUTPUT 1
OUTPUT 2
I
I
V
OUT1
OUT2
IN2
V
IN1
V
OUT2
I
V
I
OUT3
IN3
IN4
IN2
INPUT 3
OUTPUT 3
V
OUT4
OUT3
I
V
I
IN3
INPUT 4
STATUS
OUTPUT 4
GND
V
V
OUT4
IN4
V
I
STAT
I
STAT
GND
Note:
V
= V
- V
during reverse battery condition.
Fn
CCn
OUTn
Table 5.
Symbol
Power
Parameter
Test conditions
Min. Typ. Max. Unit
Operating supply
voltage
(1)
VCC
6
13
36
6
V
V
V
(1)
VUSD
Undervoltage shutdown
3.5
0.2
4.6
Undervoltage
hysteresis
(1)
VUVhyst
1
(1)
VOV
Overvoltage shutdown
Overvoltage hysteresis
36
V
V
(1)
VOVhyst
0.25
I
OUT = 1A; Tj = 25°C
9V < VCC < 18V
OUT = 1A;Tj = 150°C
40
85
50
mΩ
RON
On state resistance
I
100 mΩ
130 mΩ
9V < VCC < 18V
IOUT = 1A; VCC = 6V
Off State; VCC = 13.5V;
VIN = VOUT = 0V
12
40
µA
Off State; VCC = 13.5V;
VIN = VOUT = 0V;
Tj = 25°C
(1)
IS
Supply current
12
6
25
12
µA
On State; VCC = 13V; VIN = 3.25V;
9V < VCC < 18V
mA
7/26
Electrical specifications
VNQ660SP
Table 5.
Symbol
Power (continued)
Parameter
Test conditions
Min. Typ. Max. Unit
IL(off1)
IL(off2)
Off state output current VIN = VOUT = 0V
0
50
0
µA
µA
Off state output current VIN = 0V; VOUT = 3.5V
-75
VIN = VOUT = 0V; VCC = 13V;
Off state output current
IL(off3)
5
3
µA
µA
Tj = 125°C
VIN = VOUT = 0V; VCC = 13V;
IL(off4)
Off state output current
Tj =25°C
1. Per device.
Table 6.
Symbol
Protections
Parameter
Test conditions
Min. Typ. Max. Unit
TTSD
TR
Shutdown temperature
Reset temperature
Thermal hysteresis
150
135
7
170
200
°C
°C
°C
Thyst
15
10
25
9V < VCC < 36V
6V < VCC < 36V
6
18
18
A
A
Ilim
DC short circuit current
IOUT = 2A;
VIN = 0V;
L = 6mH
Turn-off output clamp
voltage
VCC - VCC - VCC
-
Vdemag
V
41
48
55
VSTAT Status low output voltage
ILSTAT Status leakage current
ISTAT=1.6mA
0.5
10
V
Normal operation;
VSTAT=5V
µA
Normal operation;
CSTAT Status pin input capacitance
25
8
pF
V
STAT=5V
STAT=1mA
ISTAT=-1mA
I
6
6.8
V
V
VSCL
Status clamp voltage
- 0.7
Note:
To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 7.
Symbol
V
- output diode
Parameter
CC
Test conditions
Min. Typ. Max. Unit
0.6
VF
Forward on voltage
- IOUT = 1.6A; Tj = 150°C
V
8/26
VNQ660SP
Electrical specifications
Table 8.
Symbol
Switching (V = 13V; T = 25°C)
CC j
Parameter
Test conditions
Min.
Typ.
Max. Unit
RL = 13Ω channels 1,2,3,4
(see Figure 5)
td(on)
td(off)
Turn-on delay time
Turn-off delay time
40
70
µs
µs
RL = 13Ω channels 1,2,3,4
(see Figure 5)
40
140
RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 10
dVOUT/dt(on) Turn-on voltage slope
dVOUT/dt(off) Turn-off voltage slope
V/µs
V/µs
RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 12
Table 9.
Symbol
Logic inputs
Parameter
Test conditions
Min.
Typ.
Max. Unit
VIL
IIL
Input low level voltage
Input low level current
Input high level voltage
Input high level current
1.25
V
µA
V
VIN = 1.25V
VIN = 3.25V
1
VIH
IIH
3.25
10
µA
V
VI(hyst) Input hysteresis voltage
0.5
6
CIN
Input capacitance
40
8
pF
I
IN = 1mA
6.8
V
V
VICL
Input clamp voltage
IIN = -1mA
- 0.7
Table 10. Openload detection
Symbol
Parameter
Test conditions Min. Typ. Max. Unit
tSDL
VOL
Status delay
See Figure 4
20
µs
V
Openload voltage detection threshold
Openload detection delay at turn-off
VIN = 0V
1.5
2.5
3.5
VCC = 18V
tDOL
300
µs
(see Figure 4)
Figure 4.
Status timings
OPENLOAD STATUS TIMING
OVERTEMP STATUS TIMING
VIN
VIN
VSTAT
VSTAT
tSDL
tSDL
tSDL
tDOL
9/26
Electrical specifications
Figure 5.
VNQ660SP
Switching characteristics
VOUT
90%
tf
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
t
ISENSE
90%
t
t
DSENSE
INPUT
td(on)
td(off)
t
Table 11. Truth table
Conditions
Input
Output
Status
L
L
H
H
Normal operation
Current limitation
H
H
L
H
H
L
X
X
H
(TJ < TTSD) H
(TJ > TTSD) L
L
L
L
H
L
Overtemperature
Undervoltage
H
L
L
L
X
X
H
L
L
L
H
H
Overvoltage
H
L
H
H
L
Output voltage > VOL
Output current < IOL
H
H
L
L
H
L
H
H
10/26
VNQ660SP
Electrical specifications
Delays and impedance
Table 12. Electrical transient requirements
ISO T/R
7637/1
Test level
I
II
III
IV
Test pulse
1
2
- 25V
+ 25V
- 25V
- 50V
+ 50V
- 50V
- 75V
+ 75V
- 100V
+ 75V
- 6V
- 100V
+ 100V
- 150V
+ 100V
- 7V
2ms, 10Ω
0.2ms, 10Ω
0.1µs, 50Ω
0.1µs, 50Ω
100ms, 0.01Ω
400ms, 2Ω
3a
3b
4
+ 25V
- 4V
+ 50V
- 5V
5
+ 26.5V
+ 46.5V
+ 66.5V
+ 86.5V
ISO T/R
7637/1
Test level
I
II
III
IV
Test pulse
1
2
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
3a
3b
4
5
Class
Contents
All functions of the device are performed as designed after exposure to
disturbance.
C
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
E
11/26
Electrical specifications
Figure 6.
VNQ660SP
Waveforms
NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
LOAD VOLTAGEn
STATUSn
undefined
OVERVOLTAGE
VCC>VOV
VCC<VOV
VCC
INPUTn
LOAD VOLTAGEn
STATUSn
OPENLOAD with external pull-up
INPUTn
LOAD VOLTAGEn
STATUSn
VOL
tDOL
tDOL
OVERTEMPERATURE
TTSD
TR
Tj
INPUTn
LOAD CURRENTn
STATUSn
12/26
VNQ660SP
2.4
Electrical specifications
Electrical characteristics curves
Figure 7.
Off state output current
Figure 8.
High level input current
IL(off1) (µA)
Iih (µA)
10
7
6
5
4
3
2
9
Off state
Vcc=24V
Vout=0V
8
Vin=3.25V
7
6
5
4
3
2
1
1
0
0
-50
-25
0
25
50
75
100
125
150
175
175
175
-50
-25
0
25
50
75
100
125
150
150
150
175
175
175
Tc (ºC )
Tc (ºC )
Figure 9.
Input clamp voltage
Figure 10. Turn-on voltage slope
Vicl (V)
8
dVout/dt(on) (V/ms)
500
450
7.75
7.5
Vcc=13V
Rl=13Ohm
Ii n=1mA
400
350
7.25
7
300
250
200
150
100
50
6.75
6.5
6.25
6
0
-50
-25
0
25
50
75
100 125 150
-50
-25
0
25
50
75
100 125
Tc (ºC )
Tc (ºC )
Figure 11. Overvoltage shutdown
Figure 12. Turn-off voltage slope
Vov (V)
54
dVout/dt(off) (V/ms)
700
52
50
48
46
44
42
40
38
36
34
600
Vcc=13V
Rl=13Ohm
500
400
300
200
100
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100 125
Tc (ºC )
Tc (ºC )
13/26
Electrical specifications
VNQ660SP
Figure 13. I
vs T
Figure 14. On state resistance vs V
CC
LIM
case
Vih (V)
4
RDS(on) (mOhm)
100
90
3.75
3.5
Io ut=1A
Tc=150ºC
80
70
60
50
40
30
20
10
0
3.25
3
Tc=25ºC
2.75
2.5
Tc=- 40ºC
2.25
2
-50
-25
0
25
50
75
100 125 150
175
8
9
10 11 12 13 14 15 16 17 18 19 20
Vcc (V)
Tc (ºC )
Figure 15. Input high level
Figure 16. Input hysteresis voltage
Vih (V)
4
Vihyst (V)
1.4
1.3
1.2
1.1
1
3.75
3.5
3.25
3
0.9
0.8
0.7
0.6
0.5
2.75
2.5
2.25
2
-50
-25
0
25
50
75
100 125 150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC )
Tc (ºC )
Figure 17. On state resistance vs Tcase
Figure 18. Input low level
RDS(on) (mOhm)
100
Vil (V)
2.6
90
2.4
2.2
2
Io ut=1A
80
Vcc=9V; 13V; 18V
70
60
50
40
30
20
10
0
1.8
1.6
1.4
1.2
1
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC )
Tc (ºC )
14/26
VNQ660SP
Electrical specifications
Figure 19. Status leakage current
Figure 20. Status low output voltage
Ilstat (µA)
0.05
Vstat (V)
0.6
0.045
0.525
0.45
Vstat=5V
Istat=1.6mA
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
0
0.375
0.3
0.225
0.15
0.075
0
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100 125 150 175
Tc (ºC )
Tc (ºC )
Figure 21. Status clamp voltage
Figure 22. Openload Off state detection
threshold
Vscl (V)
7.4
Vol (V)
5
4.5
7.3
Vin=0V
Is tat=1mA
4
7.2
3.5
3
7.1
7
2.5
2
6.9
6.8
6.7
6.6
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC )
Tc (ºC )
15/26
Application information
VNQ660SP
3
Application information
Figure 23. Application schematic
+5V
+5V
V
CC
R
prot
STATUS
INPUT1
D
ld
R
prot
OUTPUT1
OUTPUT2
µC
R
INPUT2
prot
R
prot
INPUT3
INPUT4
OUTPUT3
OUTPUT4
R
prot
GND
R
GND
D
V
GND
GND
.
Note:
Channels 3 & 4 have the same internal circuit as channel 1 & 2.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: a resistor in the ground line (R
only)
GND
This can be used with any type of load.
The following show how to dimension the R
resistor:
GND
1.
2.
R
R
≤600mV / 2 (I
)
GND
GND
S(on)max
≥ ( - V ) / ( - I
)
CC
GND
where - I
is the DC reverse ground pin current and can be found in the absolute
GND
maximum rating section of the device datasheet.
Power dissipation in R
(when V < 0 during reverse battery situations) is:
CC
GND
2
P = ( - V ) / R
D
CC
GND
16/26
VNQ660SP
Application information
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
becomes the sum of the
S(on)max
Please note that, if the microprocessor ground is not shared by the device ground, then the
will produce a shift (I * R ) in the input thresholds and the status output
R
GND
S(on)max
GND
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
.
GND
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: a diode (D
) in the ground line
GND
A resistor (R
= 1kΩ) should be inserted in parallel to D if the device will be driving
GND
GND
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2
3.3
Load dump protection
D is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
ld
V
maximum DC rating. The same applies if the device is subject to transients on the V
CC
CC
line that are greater than those shown in the ISO T/R 7637/1 table.
MCU I/O protection
If a ground protection network is used and negative transients are present on the V line,
CC
the control pins will be pulled negative. ST suggests to insert a resistor (R ) in line to
prot
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- V
/ I
≤R
≤(V
- V - V
) / I
CCpeak latchup
prot
OHµC
IH
GND IHmax
Example
For the following conditions:
V
I
= - 100V
CCpeak
≥ 20mA
≥ 4.5V
latchup
V
OHµC
5kΩ ≤R
≤65kΩ.
prot
Recommended values are:
= 10kΩ
R
prot
17/26
Application information
VNQ660SP
3.4
Maximum demagnetization energy (VCC = 13.5V)
Figure 24. Maximum turn-off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.01
0.1
1
10
100
L(mH)
A = single pulse at T
= 150ºC
Jstart
B= repetitive pulse at T
= 100ºC
Jstart
Jstart
C= repetitive pulse at T
= 125ºC
V , I
IN
L
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with R = 0Ω.
L
In case of repetitive pulses, T
(at beginning of each demagnetization) of every pulse
jstart
must not exceed the temperature specified above for curves B and C.
18/26
VNQ660SP
Package and PCB thermal data
4
Package and PCB thermal data
4.1
PowerSO-10 thermal data
Figure 25. PowerSO-10 PC board
Note:
Layout condition of R and Z measurements (PCB FR4 area = 58mm x 58mm, PCB
th th
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad lay-out to 8 cm ).
2
Figure 26. R
Vs PCB copper area in open box free air condition
thj-amb
RTHjamb (ºC/W)
55
50
45
40
35
30
25
20
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
19/26
Package and PCB thermal data
Figure 27. Thermal impedance junction ambient single pulse
VNQ660SP
ZTH (°C /W)
1000
0.5 cm2
2 cm2
4 cm2
8 cm2
100
10
1
0.1
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Equation 1: pulse calculation formula
ZTHδ = RTH ⋅ δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Figure 28. Thermal fitting model of a quad channel HSD in PowerSO-10
20/26
VNQ660SP
Package and PCB thermal data
Table 13. Thermal parameters
Area / island (cm2)
0.5
2
4
8
R1 = R7 = R9 = R11 (°C/W)
R2 = R8 = R10 = R12 (°C/W)
R3 (°C/W)
0.15
0.5
0.4
R4 (°C/W)
10
R5 (°C/W)
15
R6 (°C/W)
26
14.5
10
6
C1 = C7 = C9 = C11 (W.s/°C)
C2 = C8 = C10 = C12 (W.s/°C)
C3 (W.s/°C)
0.0006
0.0021
0.02
0.5
C4 (W.s/°C)
C5 (W.s/°C)
1.5
C6 (W.s/°C)
5
10
14
18
21/26
Package and packing information
VNQ660SP
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
PowerSO-10 mechanical data
Figure 29. PowerSO-10 package dimensions
B
0.10
E
A B
10
H
E
E2
E4
1
SEATING
PLANE
DETAIL "A"
e
B
A
C
0.25
D
=
=
=
=
h
D1
SEATING
PLANE
A
F
A1
L
A1
DETAIL "A"
α
22/26
VNQ660SP
Package and packing information
Table 14. PowerSO-10 mechanical data
mm
Dim.
Min.
Typ.
Max.
3.65
3.6
A
A(1)
A1
B
3.35
3.4
0
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
B(1)
C
C(1)
D
D1
E
E2
E2(1)
E4
E4(1)
e
1.27
F
1.25
1.20
1.35
1.40
F(1)
H
13.80
13.85
14.40
14.35
H(1)
h
0.50
L
1.20
0.80
0°
1.80
1.10
8°
L(1)
α
(1)
α
2°
8°
1. Muar only POA P013P.
23/26
Package and packing information
VNQ660SP
5.3
PowerSO-10 packing information
Figure 30. PowerSO-10 suggested Figure 31. PowerSO-10 tube shipment
pad layout
(no suffix)
14.6- 14.9
CASABLANCA
MUAR
C
B
10.8 - 11
6.30
C
A
A
0.67 - 0.73
0.54 - 0.6
B
1
2
3
10
9
All dimensions are in mm.
Base Q.ty Bulk Q.ty
8
9.5
Tube length (
0.5)
C (
B
7
4
5
1.27
A
0.1)
6
Casablanca
Muar
50
50
1000
1000
532
532
10.4 16.4
4.9 17.2
0.8
0.8
Figure 32. SO-28 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 ( 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
24
D ( 0.1/-0) 1.5
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
D1 (min)
F ( 0.05)
K (max)
1.5
11.5
6.5
2
P1 ( 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
24/26
VNQ660SP
Revision history
6
Revision history
Table 15. Document revision history
Date
Revision
Changes
22-Jun-2004
14-Jul-2004
1
2
Initial release.
New revision.
Minor changes.
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and not connected pins insertion (page 3).
24-Jul-2004
3
6 cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 3).
Protections note insertion (page 4)
Revision history table insertion (page 18).
28-Jul-2004
03-Dec-2008
4
5
Disclaimers Update (page 19).
Document reformatted and restructured.
Added contents, list of tables and figures.
Added ECOPACK® packages information.
25/26
VNQ660SP
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
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UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
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GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2008 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
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26/26
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