VNQ830TR-E [STMICROELECTRONICS]
9A 4 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO28, SO-28;
| 型号： | VNQ830TR-E |
| 厂家： | 
ST |
| 描述： | 9A 4 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO28, SO-28 外围驱动器 驱动程序和接口 接口集成电路 光电二极管 |
| 文件： | 总20页 (文件大小：310K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
VNQ830
QUAD CHANNEL HIGH SIDE DRIVER
TYPE
R
I
V
CC
DS(on)
OUT
VNQ830
65 mΩ (*)
6 A (*)
36 V
(*) Per each channel
■ CMOS COMPATIBLE INPUTS
■ OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ LOSS OF GROUND PROTECTION
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**)
SO-28 (DOUBLE ISLAND)
ORDER CODES
PACKAGE
TUBE
T&R
VNQ830
VNQ83013TR
SO-28
DESCRIPTION
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart protects the device against overload.
The device detects open load condition both in on
and off state. Output shorted to VCC is detected in
the off state. Device automatically turns off in case
of ground pin disconnection.
The VNQ830 is
a quad HSD formed by
assembling two VND830 chips in the same SO-28
package. The VND830 is a monolithic device
made by using| STMicroelectronics VIPower M0-3
Technology. The VNQ830 is intended for driving
any type of multiple loads with one side connected
to ground.
Active VCC pin voltage clamp protects the device
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
V
V
DC Supply Voltage
41
- 0.3
CC
- V
Reverse DC Supply Voltage
V
CC
GND
OUT
- I
DC Reverse Ground Pin Current
- 200
mA
A
I
DC Output Current
Internally Limited
- 6
- I
Reverse DC Output Current
A
OUT
I
DC Input Current
+/- 10
mA
mA
IN
I
DC Status Current
+/- 10
STAT
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
4000
4000
5000
5000
V
V
V
V
V
- STATUS
- OUTPUT
ESD
- V
CC
Maximum Switching Energy
(L=1.5mH; R =0Ω; V =13.5V; T
E
85
mJ
MAX
=150ºC; I =9A)
L
bat
jstart
L
P
Power dissipation (per island) at T
Junction Operating Temperature
Storage Temperature
=25°C
6.25
W
°C
°C
tot
lead
T
Internally Limited
- 55 to 150
j
T
stg
(**) See application schematic at page 9
January 2003
1/20
VNQ830
BLOCK DIAGRAM
V
CC1,2
V
cc
OVERVOLTAGE
UNDERVOLTAGE
CLAMP
GND1,2
INPUT1
STATUS1
CLAMP 1
OUTPUT1
OUTPUT2
DRIVER 1
CLAMP 2
CURRENT LIMITER 1
OPENLOAD ON 1
DRIVER 2
LOGIC
OVERTEMP. 1
CURRENT LIMITER 2
OPENLOAD ON 2
INPUT2
OPENLOAD OFF 1
STATUS2
OPENLOAD OFF 2
OVERTEMP. 2
V
CC3,4
V
cc
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 3
CLAMP
GND3,4
INPUT3
OUTPUT3
OUTPUT4
DRIVER 3
CLAMP 4
STATUS3
CURRENT LIMITER 3
OPENLOAD ON 3
DRIVER 4
LOGIC
OVERTEMP. 3
CURRENT LIMITER 4
OPENLOAD ON 4
INPUT4
OPENLOAD OFF 3
STATUS4
OPENLOAD OFF 4
OVERTEMP. 4
2/20
VNQ830
CURRENT AND VOLTAGE CONVENTIONS
I
I
S3,4
S1,2
V
V
CC3,4
CC1,2
V
CC1,2
V
CC3,4
I
IN1
INPUT1
I
I
V
OUT1
STAT1
IN1
STATUS1
OUTPUT1
OUTPUT2
OUTPUT3
I
V
IN2
V
STAT1
OUT1
I
INPUT2
OUT2
I
V
STAT2
IN2
STATUS2
I
V
IN3
V
OUT2
STAT2
I
I
OUT3
INPUT3
I
I
I
STAT3
V
IN3
STATUS3
V
OUT3
IN4
V
OUT4
STAT3
INPUT4
OUTPUT4
STAT4
V
IN4
V
STATUS4
OUT4
V
GND
STAT4
1,2
GND
3,4
I
I
GND1,2
GND3,4
CONNECTION DIAGRAM (TOP VIEW)
V
1,2
1
28
CC
V
1,2
CC
GND 1,2
INPUT1
OUTPUT1
OUTPUT1
OUTPUT1
STATUS1
STATUS2
INPUT2
OUTPUT2
OUTPUT2
OUTPUT2
V
1,2
3,4
CC
V
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
CC
GND 3,4
INPUT3
STATUS3
STATUS4
INPUT4
OUTPUT4
OUTPUT4
V
3,4
14
15
V
3,4
CC
CC
3/20
VNQ830
THERMAL DATA (Per island)
Symbol
Parameter
Value
20
Unit
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance Junction-lead per chip
thj-lead
thj-amb
thj-amb
Thermal Resistance Junction-ambient (one chip ON)
Thermal Resistance Junction-ambient (two chips ON)
60 (*)
46 (*)
2
(*) When mounted on a standard single-sided FR-4 board with 0.5cm of Cu per island (at least 35µm thick) connected to all V pins.
CC
Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)
POWER OUTPUT (Per each channel)
Symbol
(**)
Parameter
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
Unit
V
V
Operating Supply Voltage
CC
V
(**) Undervoltage Shut-down
5.5
V
USD
V
(**)
Overvoltage Shut-down
36
V
OV
I
I
=2A; T=25°C
65
130
40
mΩ
mΩ
µA
OUT
OUT
j
R
On State Resistance
on
=2A; V >8V
CC
12
12
5
Off State; V =13V; V =V
=0V
CC
IN
OUT
Off State; V =13V; V =V
=0V;
CC
IN
OUT
I (**)
Supply Current
25
µA
S
T =25°C
j
On State; V =13V; V =5V; I =0A
OUT
CC
IN
7
50
0
mA
µA
µA
µA
µA
I
I
I
I
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
V =V =0V
OUT
0
L(off1)
L(off2)
L(off3)
L(off4)
IN
V =0V; V
=3.5V
-75
IN
OUT
V =V
=0V; V =13V; T =125°C
5
IN
OUT
OUT
CC
j
V =V
=0V; V =13V; T =25°C
3
IN
CC
j
SWITCHING (Per each Channel) (VCC =13V)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
R =6.5Ω from V rising edge to
L
IN
t
t
Turn-on Delay Time
30
µs
d(on)
d(off)
V
=1.3V
OUT
R =6.5Ω from V falling edge to
L
IN
Turn-off Delay Time
30
µs
V
=11.7V
OUT
See
relative
dV
dV
/dt
Turn-on Voltage Slope
R =6.5Ω from V
=1.3V to V =10.4V
OUT
V/µs
OUT (on)
L
OUT
diagram
See
relative
/dt
Turn-off Voltage Slope
R =6.5Ω from V
=11.7V to V =1.3V
OUT
V/µs
OUT (off)
L
OUT
diagram
LOGIC INPUT (Per each channel)
Symbol
Parameter
Input Low Level
Test Conditions
Min
Typ
Max
Unit
V
V
1.25
IL
I
Low Level Input Current
Input High Level
V =1.25V
1
µA
V
IL
IN
V
3.25
IH
IH
I
High Level Input Current V =3.25V
10
8
µA
V
IN
V
Input Hysteresis Voltage
0.5
6
I(hyst)
I =1mA
6.8
V
IN
V
Input Clamp Voltage
ICL
I =-1mA
-0.7
V
IN
(**) Per island
4/20
VNQ830
ELECTRICAL CHARACTERISTICS (continued)
VCC - OUTPUT DIODE
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Forward on Voltage
-I
=2A; T =150°C
0.6
V
F
OUT
j
STATUS PIN (Per each channel)
Symbol
Parameter
Test Conditions
Min
Typ
Max
0.5
10
Unit
V
V
Status Low Output Voltage I
Status Leakage Current
=1.6mA
STAT
STAT
I
Normal Operation; V
=5V
=5V
µA
LSTAT
STAT
Status Pin Input
Capacitance
C
Normal Operation; V
100
8
pF
STAT
STAT
I
=1mA
6
6.8
V
V
STAT
V
Status Clamp Voltage
I
SCL
=-1mA
-0.7
STAT
PROTECTIONS (Per each channel)
Symbol
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Test Conditions
Min
150
135
7
Typ
Max
Unit
°C
T
175
200
TSD
T
°C
R
T
15
9
°C
hyst
Status Delay in Overload
Conditions
t
T >T
20
µs
SDL
j
TSD
6
15
15
A
A
I
Current limitation
lim
5.5V<V <36V
CC
Turn-off Output Clamp
Voltage
V
I
=2A; L=6mH
V
-41 V -48 V -55
V
demag
OUT
CC
CC
CC
OPENLOAD DETECTION (per each channel)
Symbol
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Test Conditions
Min
Typ
Max
Unit
I
V =5V
50
100
200
mA
OL
IN
t
I
=0A
OUT
200
µs
DOL(on)
Openload OFF State
Voltage Detection
Threshold
V
V =0V
1.5
2.5
3.5
V
OL
IN
Openload Detection Delay
at Turn Off
t
1000
µs
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
< I
OVER TEMP STATUS TIMING
T > T
I
V
> V
OL
OUT
OL
OUT
j
TSD
V
INn
V
V
INn
V
STATn
STATn
t
t
SDL
SDL
t
DOL(off)
t
DOL(on)
5/20
VNQ830
Switching time Waveforms
V
OUTn
90%
80%
dV
/dt
dV
/dt
OUT (off)
OUT (on)
10%
t
V
INn
td
(on)
td
(off)
t
TRUTH TABLE
CONDITIONS
INPUT
OUTPUT
STATUS
L
H
L
H
H
H
Normal Operation
L
H
H
L
X
X
H
) H
) L
Current Limitation
(T < T
j
TSD
TSD
(T > T
j
L
H
L
L
H
L
Overtemperature
Undervoltage
Overvoltage
L
H
L
L
X
X
L
H
L
L
H
H
L
H
H
H
L
H
Output Voltage > V
OL
OL
L
H
L
H
H
L
Output Current < I
6/20
VNQ830
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
TEST LEVELS
I
II
III
IV
Delays and
Impedance
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
Test Pulse
TEST LEVELS RESULTS
I
II
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
1
2
C
C
C
C
C
C
C
C
C
C
C
E
3a
3b
4
5
CLASS
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
C
E
One or more functions of the device is not performed as designed after exposure and cannot be returned
to proper operation without replacing the device.
7/20
VNQ830
Figure1: Waveforms
NORMAL OPERATION
UNDERVOLTAGE
INPUT
n
LOAD VOLTAGE
n
STATUS
n
V
V
USDhyst
CC
V
USD
INPUT
n
LOAD VOLTAGE
STATUS
n
undefined
OVERVOLTAGE
V
<V
OV
V
>V
OV
CC
CC
V
CC
INPUT
n
LOAD VOLTAGE
n
STATUS
n
OPEN LOAD with external pull-up
INPUT
n
V
>V
OL
OUT
LOAD VOLTAGE
n
V
OL
STATUS
n
OPEN LOAD without external pull-up
INPUT
n
LOAD VOLTAGE
n
STATUS
n
OVERTEMPERATURE
T
T
TSD
R
T
j
INPUT
n
LOAD CURRENT
n
STATUS
n
8/20
1
VNQ830
APPLICATION SCHEMATIC
+5V
+5V
+5V
V
V
CC3,4
CC1,2
R
prot
STATUS1
R
prot
INPUT1
D
ld
R
prot
STATUS2
OUTPUT1
R
prot
INPUT2
µC
OUTPUT2
OUTPUT3
R
prot
STATUS3
INPUT3
R
prot
R
prot
STATUS4
INPUT4
OUTPUT4
R
prot
GND3,4
GND1,2
R
GND
D
GND
V
+5V
+5V
GND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
2
P = (-V ) /R
GND
D
CC
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
calculated with formula (1) where I
becomes the
GND
S(on)max
sum of the maximum on-state currents of the different
devices.
The following is an indication on how to dimension the
R
GND
1) R
resistor.
Please note that if the microprocessor ground is not
common with the device ground then the R
will
≤ 600mV / 2(I
).
S(on)max
GND
GND
produce a shift (I
* R
) in the input thresholds
S(on)max
GND
2) R
≥ (−V ) / (-I
)
GND
GND
CC
and the status output values. This shift will vary
depending on how many devices are ON in the case of
where -I
is the DC reverse ground pin current and can
GND
be found in the absolute maximum rating section of the
several high side drivers sharing the same R
.
GND
device’s datasheet.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2.
Power Dissipation in R
battery situations) is:
(when V <0: during reverse
CC
GND
9/20
VNQ830
Solution 2: A diode (D
) in the ground line.
µC I/Os PROTECTION:
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
If a ground protection network is used and negative
GND
D
if the device will be driving an inductive load.
transients are present on the V line, the control pins will
CC
be pulled negative. ST suggests to insert a resistor (R
)
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
prot
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-V
/I
≤ R
≤ (V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND IHmax
LOAD DUMP PROTECTION
Calculation example:
D
is necessary (Voltage Transient Suppressor) if the
For V
5kΩ ≤ R
Recommended R
= - 100V and I
≤ 65kΩ.
≥ 20mA; V ≥ 4.5V
OHµC
ld
CCpeak
latchup
load dump peak voltage exceeds V max DC rating. The
CC
prot
same applies if the device will be subject to transients on
value is 10kΩ.
prot
the V line that are greater than the ones shown in the
CC
ISO T/R 7637/1 table.
10/20
VNQ830
OPEN LOAD DETECTION IN OFF STATE
2) no misdetection when load is disconnected: in this
Off state open load detection requires an external pull-up
case the V
has to be higher than V
; this
OLmax
resistor (R ) connected between OUTPUT pin and a
OUT
PU
results in the following condition R <(V
V
)/
positive supply voltage (V ) like the +5V line used to
PU
PU– OLmax
PU
I
.
L(off2)
supply the microprocessor.
Because I
may significantly increase if V is pulled
out
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
s(OFF)
high (up to several mA), the pull-up resistor R
should
PU
be connected to a supply that is switched OFF when the
module is in standby.
in this case we have to avoid V
to be higher than
OUT
V
; this results in the following condition
The values of V
, V
and I
are available in
L(off2)
Olmin
OLmin
OLmax
V
=(V /(R +R ))R <V
PU L PU L Olmin.
the Electrical Characteristics section.
OUT
Open Load detection in off state
PU
V batt.
V
VCC
PU
R
DRIVER
+
L(off2)
I
INPUT
LOGIC
OUT
+
-
R
STATUS
OL
V
L
R
GROUND
11/20
VNQ830
High Level Input Current
Off State Output Current
Iih (uA)
IL(off1) (uA)
5
2.5
4.5
2.25
Off state
Vcc=36V
Vin=3.25V
4
2
Vin=Vout=0V
3.5
3
1.75
1.5
1.25
1
2.5
2
1.5
1
0.75
0.5
0.25
0
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100 125 150
175
Tc (°C)
Tc (°C)
Input Clamp Voltage
Status Leakage Current
Vicl (V)
Ilstat (uA)
8
0.05
7.8
Iin=1mA
7.6
0.04
7.4
7.2
7
Vstat=5V
0.03
6.8
6.6
6.4
6.2
6
0.02
0.01
0
-50
-25
0
25
50
75
100 125 150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Status Low Output Voltage
Status Clamp Voltage
Vscl (V)
Vstat (V)
8
0.8
7.8
0.7
Istat=1mA
Istat=1.6mA
7.6
0.6
7.4
7.2
7
0.5
0.4
0.3
0.2
0.1
0
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
12/20
VNQ830
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
120
160
Tc=150°C
110
100
90
80
70
60
50
40
30
20
10
0
140
Iout=2A
Vcc=8V; 13V & 36V
120
100
80
60
40
20
0
Tc=25°C
Tc= - 40°C
Iout=5A
-50
-25
0
25
50
75
100 125
150
175
5
10
15
20
25
30
35
40
Tc (°C)
Vcc (V)
Openload On State Detection Threshold
Input High Level
Iol (mA)
Vih (V)
150
3.6
140
3.4
3.2
3
Vcc=13V
Vin=5V
130
120
110
100
90
2.8
2.6
2.4
2.2
2
80
70
60
50
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
1.5
2.6
1.4
1.3
1.2
1.1
1
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
13/20
VNQ830
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
Vov (V)
Vol (V)
50
5
48
46
44
42
40
38
36
34
32
30
4.5
Vin=0V
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
800
600
700
550
Vcc=13V
Ri=6.5Ohm
Rl=6.5Ohm
600
500
500
400
300
200
100
0
450
400
350
300
250
200
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (°C)
Tc (ºC)
ILIM Vs Tcase
Ilim (A)
20
18
16
14
12
10
8
Vcc=13V
6
4
2
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
14/20
VNQ830
Maximum turn off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
15/20
VNQ830
SO-28 DOUBLE ISLAND THERMAL DATA
SO-28 Double island PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
2
2
Cu thickness=35µm, Copper areas: 0.5cm , 3cm , 6cm ).
Thermal calculation according to the PCB heatsink area
Chip 1 Chip 2
T
T
Note
jchip1
jchip2
ON
OFF
ON
OFF
ON
ON
ON
R
R
R
x P
x P
+ T
+ T
R
R
R
x P
x P
+ T
+ T
thA
thC
thB
dchip1
amb
thC
thA
thB
dchip1
amb
dchip2
amb
dchip2
amb
x (P
+ P
) + T
x (P
+ P
) + T
P
P
=P
dchip1 dchip2
dchip1
dchip1
dchip2
amb
dchip1
dchip2
dchip2
amb
ON
(R x P
) + R
x P
+ T
(R x P
) + R x P
+ T
≠P
dchip1 dchip2
thA
thC
dchip2
amb
thA
thC
dchip1
amb
R
R
R
= Thermal resistance Junction to Ambient with one chip ON
= Thermal resistance Junction to Ambient with both chips ON and P
= Mutual thermal resistance
thA
thB
thC
=P
dchip2
dchip1
Rthj-amb Vs. PCB copper area in open box free air condition
RTHj_am b
(°C/W)
70
60
50
40
30
20
10
RthA
RthB
RthC
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)/island
16/20
VNQ830
SO-28 Thermal Impedance Junction Ambient Single Pulse
One channel ON
ZTH (°C/W)
Two channels ON
on same chip
1000
100
10
1
2
0.5 cm
2
6 cm
0.1
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a four channels HSD
in SO-28
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
Tj_1
C1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
where
Thermal Parameter
R1
Pd1
2
C13
R13
C14
Area/island (cm )
R1=R7=R13=R15 (°C/W)
R2=R8=R14=R16 (°C/W)
R3=R9 (°C/W)
0.5
6
Tj_2
0.15
0.8
R14
Pd2
R17
R18
4.5
R4=R10 (°C/W)
11
Tj_3
C7
R7
C8
C9
R9
C10
C11
C12
R5=R11 (°C/W)
15
Pd3
R6=R12 (°C/W)
5
13
R8
R10
R11
R12
C1=C7=C13=C15 (W.s/°C)
C2=C8=C14=C16 (W.s/°C)
C3=C9 (W.s/°C)
0.0006
2.10E-03
6.00E-03
0.2
C15
R15
C16
Tj_4
R16
Pd4
C4=C10 (W.s/°C)
C5=C11 (W.s/°C)
1.5
T_amb
C6=C12 (W.s/°C)
5
8
R17=R18 (°C/W)
150
17/20
VNQ830
SO-28 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
2.65
0.30
0.49
0.32
MIN.
MAX.
0.104
0.012
0.019
0.012
A
a1
b
0.10
0.35
0.23
0.004
0.013
0.009
b1
C
c1
D
E
0.50
0.020
45 (typ.)
17.7
18.1
0.697
0.393
0.713
0.419
10.00
10.65
e
1.27
0.050
0.650
e3
F
16.51
7.40
0.40
7.60
1.27
0.291
0.016
0.299
0.050
L
S
8 (max.)
18/20
VNQ830
SO-28 TUBE SHIPMENT (no suffix)
Base Q.ty
28
700
532
3.5
Bulk Q.ty
Tube length (± 0.5)
C
B
A
B
13.8
0.6
C (± 0.1)
All dimensions are in mm.
A
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
1000
1000
330
1.5
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
13
20.2
16.4
60
G (+ 2 / -0)
N (min)
T (max)
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
16
4
Tape Hole Spacing
Component Spacing
Hole Diameter
12
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
7.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
19/20
VNQ830
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia -
Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
20/20
相关型号：
©2020 ICPDF网 联系我们和版权申明