VNS3NV04DTR-E [STMICROELECTRONICS]
OMNIFET II fully autoprotected Power MOSFET; OMNIFET II完全autoprotected功率MOSFET
| 型号： | VNS3NV04DTR-E |
| 厂家： | 
ST |
| 描述： | OMNIFET II fully autoprotected Power MOSFET |
| 文件： | 总21页 (文件大小：358K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VNS3NV04D-E
OMNIFET II
fully autoprotected Power MOSFET
Features
Max On-State resistance (per ch.)
Current limitation (typ)
RON
ILIMH
120mΩ
3.5A
Drain-Source clamp voltage
VCLAMP
40V
SO-8
■ Linear current limitation
■ Thermal shut down
■ Short circuit protection
■ Integrated clamp
Description
The VNS3NV04D-E is a device formed by two
monolithic OMNIFET II chips housed in a
standard SO-8 package. The OMNIFET II are
designed in STMicroelectronics VIPower M0-3
Technology: they are intended for replacement of
standard Power MOSFETs from DC up to 50KHz
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ Esd protection
■ Direct access to the gate of the power mosfet
(analog driving)
■ Compatible with standard power mosfet
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.
Device summary
Package
Order codes
Tube
Tape and Reel
SO-8
VNS3NV04D-E
VNS3NV04DTR-E
July 2007
Rev 2
1/21
www.st.com
21
Contents
VNS3NV04D-E
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
2.3
2.4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
3.2
3.3
3.4
Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16
Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4
5
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
4.2
4.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SO-8 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
VNS3NV04D-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
On. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Source Drain diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protections (-40°C < Tj < 150°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . 9
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3/21
List of figures
VNS3NV04D-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Source-Drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static Drain-Source On resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static Drain-Source On resistance vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static Drain-Source On resistance Vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static Drain-Source On resistance Vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn On current slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn On current slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage Vs. Input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn off Drain source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn off Drain-Source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized On resistance Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized Input threshold voltage Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit Vs. junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SO-8 package mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 31. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4/21
VNS3NV04D-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1.
Block diagram
DRAIN2
DRAIN1
OVERVOLTAGE
CLAMP
OVERVOLTAGE
CLAMP
INPUT2
GATE
CONTROL
INPUT1
GATE
CONTROL
LINEAR
LINEAR
CURRENT
CURRENT
OVER
TEMPERATURE
OVER
TEMPERATURE
LIMITER
LIMITER
SOURCE2
SOURCE1
Figure 2.
Configuration diagram (top view)
1
DRAIN 1
DRAIN 1
DRAIN 2
DRAIN 2
SOURCE 1
INPUT 1
8
5
SOURCE 2
INPUT 2
4
5/21
Electrical specifications
VNS3NV04D-E
2
Electrical specifications
Figure 3.
Current and voltage conventions
RIN1
I
I
IN1
D1
INPUT 1
INPUT 2
DRAIN 1
I
RIN2
I
IN2
D2
V
V
IN1
DS1
DRAIN 2
V
IN2
V
SOURCE 1
SOURCE 2
DS1
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
program and other relevant quality document.
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDSn
VINn
IINn
Drain-Source Voltage (VINn=0V)
Input voltage
Internally clamped
Internally clamped
+/-20
V
V
Input current
mA
Ω
RIN MINn Minimum input series impedance
220
IDn
IRn
Drain current
Internally limited
-5.5
A
Reverse DC output current
Electrostatic discharge (R=1.5KΩ, C=100pF)
A
VESD1
4000
V
Electrostatic discharge on output pins only (R=330Ω,
C=150pF)
VESD2
16500
V
Ptot
Tj
Total dissipation at Tc=25°C
Operating junction temperature
Case operating temperature
Storage temperature
4
Ω
°C
°C
°C
Internally limited
Internally limited
-55 to 150
Tc
Tstg
6/21
VNS3NV04D-E
Electrical specifications
2.2
Thermal data
Table 3.
Symbol
Thermal data
Parameter
Max value
Unit
Rthj-lead Thermal resistance junction-lead (per channel)
Rthj-amb Thermal resistance junction-ambient
30
°C/W
°C/W
80(1)
1. When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 µm thick) connected
to all DRAIN pins of the relative channel
2.3
Electrical characteristics
Values specified in this section are for -40°C< Tj <150°C, unless otherwise stated.
Table 4.
Symbol
Off
Parameter
Test Conditions
VIN=0V; ID=1.5A
Min
Typ
Max
Unit
Drain-Source clamp
voltage
VCLAMP
VCLTH
VINTH
IISS
40
45
55
V
Drain-Source clamp
threshold voltage
VIN=0V; ID=2mA
VDS=VIN; ID=1mA
36
V
V
Input threshold
voltage
0.5
2.5
Supply current from
input pin
VDS=0V; VIN=5V
100
6.8
150
µA
V
Input-Source clamp
voltage
IIN=1mA
IIN=-1mA
6
8
VINCL
-1.0
-0.3
Zero input voltage
drain current
(VIN=0V)
VDS=13V; VIN=0V; Tj=25°C
VDS=25V; VIN=0V
30
75
IDSS
µA
Table 5.
Symbol
On
Parameter
Test conditions
Min
Typ
Max
Unit
VIN=5V; ID=1.5A; Tj=25°C
VIN=5V; ID=1.5A
120
240
Static Drain-Source
On resistance
RDS(on)
mΩ
7/21
Electrical specifications
VNS3NV04D-E
Electrical characteristics (continued) (T =25°C, unless otherwise specified)
j
Table 6.
Symbol
Dynamic
Parameter
Forward
Test conditions
Min
Typ
Max
Unit
(1)
gfs
VDD=13V; ID=1.5A
5.0
S
transconductance
COSS
Output capacitance
VDS=13V; f=1MHz; VIN=0V
150
pF
Table 7.
Symbol
Switching
Parameter
Test conditions
Min
Typ
Max Unit
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
Turn-on delay time
Rise Time
90
300
750
ns
ns
ns
ns
µs
µs
µs
µs
V
DD=15V; ID=1.5A
250
Vgen=5V; Rgen=RIN MIN=220Ω
(see Figure 4)
Turn-off delay time
Fall time
450 1350
250 750
0.45 1.35
Turn-on delay time
Rise time
VDD=15V; ID=1.5A
Vgen=5V; Rgen=2.2 KΩ
(see Figure 4)
2.5
3.3
2.0
7.5
10.0
6.0
Turn-off delay time
Fall time
V
DD=15V; ID=1.5A
Vgen=5V; Rgen=RIN MIN=220Ω
DD=12V; ID=1.5A; VIN=5V
(dI/dt)on Turn-on current slope
4.7
8.5
A/µs
V
Qi
Total input charge
nC
Igen=2.13mA (see Figure 7)
Table 8.
Symbol
Source Drain diode
Parameter
Test Conditions
Min
Typ
Max Unit
(1)
VSD
Forward On voltage
ISD=1.5A; VIN=0V
0.8
V
trr
Reverse recovery time
107
ns
ISD=1.5A; dI/dt=12A/µs
VDD=30V; L=200µH
(see Figure 5)
Reverse recovery
charge
Qrr
37
µC
Reverse recovery
current
IRRM
0.7
A
1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%
8/21
VNS3NV04D-E
Electrical specifications
Table 9.
Protections (-40°C < T < 150°C, unless otherwise specified)
j
Symbol
Parameter
Test Conditions
Min
Typ
Max Unit
Ilim
Drain current limit
VIN=5V; VDS=13V
VIN=5V; VDS=13V
3.5
5
7
A
Step response current
limit
tdlim
10
µs
Overtemperature
shutdown
Tjsh
150
175
200
20
°C
Tjrs
Igf
Overtemperature reset
Fault sink current
135
10
°C
VIN=5V; VDS=13V; Tj=Tjsh
Starting Tj=25°C; VDD=24V
15
mA
Single pulse
VIN=5V Rgen=RIN MIN=220Ω;
L=24mH
Eas
100
mJ
avalanche energy
(see Figure 6 and Figure 8)
Figure 4.
Switching time test circuit for resistive load
V
D
R
gen
V
gen
I
D
90%
10%
t
t
f
r
t
t
t
d(on)
t
d(off)
V
gen
9/21
Electrical specifications
Figure 5.
VNS3NV04D-E
Test circuit for diode recovery times
A
A
B
D
I
FAST
DIODE
L=100uH
OMNIFET
S
B
220Ω
D
S
VDD
Rgen
I
OMNIFET
Vgen
8.5
Ω
Figure 6.
Unclamped inductive load test circuits
R
GEN
V
IN
P
W
10/21
VNS3NV04D-E
Figure 7.
Electrical specifications
Input charge test circuit
GEN
IN
V
ND8003
Figure 8.
Unclamped inductive waveforms
11/21
Electrical specifications
VNS3NV04D-E
2.4
Electrical characteristics curves
Figure 9.
Source-Drain diode forward Figure 10. Static Drain-Source On
characteristics
resistance
Vsd (mV)
1100
Rds(on) (mohms)
1000
900
800
700
600
500
400
300
200
100
0
Tj=-40ºC
1050
1000
950
900
850
800
750
700
650
Vin=0V
Vin=2.5V
Tj=25ºC
Tj=150ºC
600
0
1
2
3
4
5
6
7
8
9
10 11 12
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55
Id(A)
Id (A)
Figure 11. Derating curve
Figure 12. Static Drain-Source On
resistance vs. Input voltage
Rds(on) (mohms)
300
275
250
225
200
175
150
125
100
75
Tj=150ºC
Id=3.5A
Id=1A
Tj=25ºC
Tj=-40ºC
Id =3.5A
Id =1A
Id=3.5A
Id=1A
50
25
0
3
3.5
4
4.5
Vin(V)
5
5.5
6
6.5
Figure 13. Static Drain-Source On
resistance Vs. Input voltage
Figure 14. Transconductance
Rds(on) (mohms)
250
Gfs (S)
11
225
10
Vds=13V
Id=1.5A
Tj=-40ºC
Tj=25ºC
9
200
8
7
6
5
4
3
2
1
0
175
Tj=150ºC
Tj=150ºC
150
125
100
75
Tj=25ºC
50
Tj=-40ºC
25
0
3
3.5
4
4.5
Vin(V)
5
5.5
6
6.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Id (A)
12/21
VNS3NV04D-E
Electrical specifications
Figure 15. Static Drain-Source On
resistance Vs. Id
Figure 16. Transfer characteristics
Idon (A)
6
Rds(on) (mohms)
250
225
200
175
150
125
100
75
5.5
5
Vds=13.5V
Tj=150ºC
Vin=5V
Tj=150ºC
4.5
4
3.5
3
Tj=-40ºC
Tj=25ºC
2.5
2
1.5
1
Tj=25ºC
50
Tj=- 40ºC
25
0.5
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Id (A)
Vin (V)
Figure 17. Turn On current slope
Figure 18. Turn On current slope
di/dt(A/us)
5
di/dt(A/usec)
1.75
4.5
Vin=5V
1.5
4
3.5
3
Vdd=15V
Id=1.5A
Vin=3.5V
Vdd=15V
Id=1.5A
1.25
1
2.5
2
0.75
0.5
0.25
0
1.5
1
0.5
0
0
250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
0
250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
Figure 19. Input voltage Vs. Input
charge
Figure 20. Turn off Drain source voltage
slope
Vin (V)
9
dv/dt(V/usec)
300
275
8
Vds=1V
Id=1.5A
Vin=5V
Vdd=15V
250
7
225
Id=1.5A
200
175
150
125
100
75
6
5
4
3
2
1
0
50
25
0
0
500
1000
1500
2000
2500
0
1
2
3
4
5
6
7
8
9
10
11
250
750
1250
1750
2250
Qg (nC)
Rg(ohm)
13/21
Electrical specifications
VNS3NV04D-E
Figure 21. Turn off Drain-Source voltage Figure 22. Capacitance variations
slope
dv/dt(V/usec)
300
C(pF)
350
275
250
225
200
175
150
125
100
75
Vin=3.5V
Vdd=15V
Id=1.5A
300
250
200
150
100
50
f=1MHz
Vin=0V
50
25
0
0
500
750
1000
1500
2000
2500
0
5
10
15
20
25
30
35
250
1250
1750
2250
Vds(V)
Rg(ohm)
Figure 23. Switching time resistive load Figure 24. Switching time resistive load
t(usec)
4
t(nsec)
900
800
700
600
500
400
300
200
100
3.5
3
tr
td(off)
Vdd=15V
Id=1.5A
Rg=220ohm
Vdd=15V
Id =1.5A
Vin=5V
tr
tf
2.5
2
td(off)
1.5
1
tf
td(on)
td(on)
0.5
0
0
0
3.25
3.5
3.75
4
4.25
4.5
4.75
5
5.25
500
1000
1500
2000
2500
250
750
1250
1750
2250
Vin(V)
Rg(ohm)
Figure 25. Output characteristics
Figure 26. Normalized On resistance Vs.
temperature
Id (A)
5
Rds(on)(mOhm)
4
Vin=5V
4.5
Vin=4V
3.5
4
Vin=5V
Id=1.5A
3
3.5
Vin=3V
3
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
0.5
-50
-25
0
25
50
75
100 125 150 175
0
1
2
3
4
5
6
7
8
9
10
Tc )ºC)
Vds (V)
14/21
VNS3NV04D-E
Electrical specifications
Figure 27. Normalized Input threshold
Figure 28. Normalized current limit Vs.
junction temperature
voltage Vs. temperature
Vinth (V)
2
Ilim (A)
10
1.8
1.6
1.4
1.2
1
9
Vds=Vin
Id=1mA
Vin=5V
Vds=13V
8
7
6
5
4
3
2
1
0
0.8
0.6
0.4
0.2
0
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100
125 150
175
Tc (ºC)
Tc (ºC )
Figure 29. Step response current limit
Tdlim(usec)
13
12.5
Vin=5V
Rg=220ohm
12
11.5
11
10.5
10
9.5
9
8.5
8
7.5
5
7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vdd(V)
15/21
Protection features
VNS3NV04D-E
3
Protection features
During normal operation, the INPUT pin is electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from
DC up to 50KHz. The only difference from the user’s standpoint is that a small DC current
I
(typ. 100µA) flows into the INPUT pin in order to supply the internal circuitry.
ISS
The device integrates:
3.1
3.2
Overvoltage clamp protection
Internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET
stage give this device unrivalled ruggedness and energy handling capability. This feature is
mainly important when driving inductive loads.
Linear current limiter circuit
Limits the drain current I to I whatever the INPUT pin voltages. When the current limiter
D
lim
is active, the device operates in the linear region, so power dissipation may exceed the
capability of the heatsink. Both case and junction temperatures increase, and if this phase
lasts long enough, junction temperature may reach the overtemperature threshold T
jsh.
3.3
3.4
Overtemperature and short circuit protection
These are based on sensing the chip temperature and are not dependent on the input
voltage. The location of the sensing element on the chip in the power stage area ensures
fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the
range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted
when the chip temperature falls of about 15°C below shut-down temperature.
Status feedback
In the case of an overtemperature fault condition (T > T ), the device tries to sink a
j
jsh
diagnostic current I through the INPUT pin in order to indicate fault condition. If driven from
gf
a low impedance source, this current may be used in order to warn the control circuit of a
device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not
able to supply the current I , the INPUT pin will fall to 0V. This will not however affect the
gf
device operation: no requirement is put on the current capability of the INPUT pin
driver except to be able to supply the normal operation drive current I
.
ISS
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit.
16/21
VNS3NV04D-E
Package and packing information
4
Package and packing information
4.1
ECOPACK® packages
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
17/21
Package and packing information
VNS3NV04D-E
4.2
SO-8 Package mechanical data
Figure 30. SO-8 package mechanical data & package outline
mm
inch
DIM.
OUTLINE AND
MECHANICAL DATA
MIN.
TYP. MAX. MIN.
1.750
TYP. MAX.
0.0689
A
A1
A2
b
0.100
1.250
0.280
0.170
0.250 0.0039
0.0492
0.0098
0.480 0.0110
0.230 0.0067
0.0189
0.0091
c
(1)
D
4.800 4.900 5.000 0.1890 0.1929 0.1969
E
5.800 6.000 6.200 0.2283 0.2362 0.2441
3.800 3.900 4.000 0.1496 0.1535 0.1575
(2)
E1
e
h
1.270
0.0500
0.250
0.400
0.500 0.0098
1.270 0.0157
0.0197
0.0500
L
L1
k
1.040
0.0409
0˚
8˚
0˚
8˚
ccc
0.100
0.0039
Notes: 1. Dimensions D does not include mold flash,
protrusions or gate burrs.
Mold flash, potrusions or gate burrs shall not
exceed 0.15mm in total (both side).
SO-8
2. Dimension “E1” does not include interlead flash
or protrusions. Interlead flash or protrusions shall
not exceed 0.25mm per side.
0016023 D
18/21
VNS3NV04D-E
Package and packing information
4.3
SO-8 Packing information
Figure 31. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
100
2000
C
Tube length ( 0.5)
A
B
532
3.2
6
A
C ( 0.1)
0.6
All dimensions are in mm.
Figure 32. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 ( 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D ( 0.1/-0) 1.5
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
D1 (min)
F ( 0.05)
K (max)
1.5
5.5
4.5
2
P1 ( 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
19/21
Revision history
VNS3NV04D-E
5
Revision history
Table 10. Document revision history
Date
Revision
Changes
28-Oct-2005
1
Initial release.
Document reformatted and converted into new ST template.
02-Jul-2007
2
Table 4: Off - IDSS unit corrected
20/21
VNS3NV04D-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2007 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
21/21
相关型号：
VNS3NV04TR-E
5A 2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO8, LEAD FREE, SOP-8Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
VNS7NV04
“OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFETWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
VNS7NV0413TR
“OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFETWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
VNSC-3-4U
TRI-LOC, SMPTE 304, PLUG PRE-POLISHEDWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
WINCHESTER
VNSC-748U
TRI-LOC, SMPTE 304, RECEPTACLE PRE-POLISHEDWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
WINCHESTER
VNT-A24-024.704M
HCMOS Output Clock Oscillator, 24.704MHz Nom, HERMETIC SEALED, METAL PACKAGE-14/4Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
CONNOR-WINFIE
VNT008A
TRANSISTOR | MOSFET | N-CHANNEL | 650V V(BR)DSS | 5.77A I(D) | TO-204AAWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
VNT008D
TRANSISTOR | MOSFET | N-CHANNEL | 650V V(BR)DSS | 5.77A I(D) | TO-220ABWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
VNT009A
TRANSISTOR | MOSFET | N-CHANNEL | 650V V(BR)DSS | 5A I(D) | TO-204AAWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
VNT009D
TRANSISTOR | MOSFET | N-CHANNEL | 650V V(BR)DSS | 5A I(D) | TO-220ABWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
VNV10N07
”OMNIFET”: FULLY AUTOPROTECTED POWER MOSFETWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
VNV10N0713TR
OMNIFET :FULLY AUTOPROTECTED POWER MOSFETWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
©2020 ICPDF网 联系我们和版权申明