TC7920K6-G [SUPERTEX]

Two Pair, N- and P-Channel Enhancement-Mode MOSFET with Drain-Diodes;


型号：	TC7920K6-G
厂家：	Supertex, Inc
描述：	Two Pair, N- and P-Channel Enhancement-Mode MOSFET with Drain-Diodes 开关光电二极管晶体管
文件：	总5页 (文件大小：579K)
中文：	中文翻译
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Supertex inc.

TC7920

Two Pair, N- and P-Channel

Enhancement-Mode MOSFET with Drain-Diodes

Features

General Description

► High voltage Vertical DMOS technology

► Integrated drain output high voltage diodes

► Integrated gate-to-source resistor

► Integrated gate-to-source Zener diode

► Low threshold, Low on-resistance

► Low input & output capacitance

The Supertex TC7920 consists of two pairs of high voltage, low

threshold N-channel and P-channel MOSFETs in a 12-Lead

DFN package. All MOSFETs have integrated the output drain

high voltage diodes, gate-to-source resistors and gate-to-source

Zener diode clamps which are desired for high voltage pulser

applications. The complimentary, high-speed, high voltage, gate-

clamped N and P-channel MOSFET pairs utilize an advanced

vertical DMOS structure and Supertex’s well-proven silicon-gate

manufacturing process. This combination produces a device with

the power handling capabilities of bipolar transistors and with the

high input impedance and positive temperature coefﬁcient inherent

in MOS devices.

► Fast switching speeds

► Electrically isolated N- and P-MOSFET pairs

Applications

► High voltage pulsers

► Ampliﬁers

► Buffers

Characteristic of all MOS structures, these devices are free from

thermal runaway and thermally induced secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a wide range

of switching and amplifying applications where very low threshold

voltage, high breakdown voltage, high input impedance, low input

and output capacitance, and fast switching speeds are desired.

► Piezoelectric transducer drivers

► General purpose line drivers

► Logic level interfaces

Typical Application Circuit

V_PP

+100V

+10V

0.47µF

1.0µF

0.1µF

VDD

ENAB

OUTA

INA

+PULSE

1.8 to 5.0V

Logic Imputs

V_NN

OUTB

INB

INC

-100V

-PULSE

DAMP

OUTC

OUTD

1.0µF

IND

GND

VSS

Supertex

MD1822

10nF

Supertex

TC7920

Doc.# DSFP-TC7920

B080613

Supertex inc.

www.supertex.com

TC7920

Ordering Information

Product Summary

Part Number

Package Option Packing

BV_DSS/BV_DGS

R_DS(ON)(max)

TC7920K6-G

12-Lead DFN 3000/Reel

N-Channel

P-Channel

N-Channel

P-Channel

200V

-200V

7.0Ω

8.0Ω

Absolute Maximum Ratings

Parameter

Value

BV_DSS

BV_DGS

Pin Conﬁguration

Drain-to-source voltage

GN1

GP1

GN2

SN2

GP2

SP2

SN1

DN1

DP1

SP1

DN2

DP2

Drain-to-gate voltage

Operating and storage temperature

-55°C to +150°C

Thermal

Pad

Absolute Maximum Ratings are those values beyond which damage to the

device may occur. Functional operation under these conditions is not implied.

Continuous operation of the device at the absolute rating level may affect

device reliability. All voltages are referenced to device ground.

Typical Thermal Resistance

12-Lead DFN

Package

θ_ja

(top view)

12-Lead DFN

42^OC/W

Note:

Package Marking

1.0oz, 4-layer, 3”x4” PCB.

Y = Last Digit of Year Sealed

W = Code for Week Sealed

L = Lot Number

7920

YWLL

= “Green” Packaging

Package may or may not include the following marks: Si or

12-Lead DFN

Drain Output Diodes

Sym

Parameter

Min

Typ

Max

Unit

Condition

V_R

Breakdown voltage

Forward voltage

Park forward current

200

I_R= 100µA

I_FM

1.25

3.0

1.0

100

1.0

I_F= 100mA

Pulse width = 1.0μs, D% = 1%, One diode

V_R= 100 V, T_A= 25^OC

V_R= 100 V, T_A= 125^OC

I_F= I_R= 10mA, I_RR= 1.0 mA, R_L= 100Ω

I_R

t_rr

Reverse current

µA

µs

Reverse recovery time

Pin Description

Pin #

Function Description

Pin #

Function Description

GN1

GP1

GN2

SN2

GP2

SP2

Gate of N-MOSFET 1

Gate of P-MOSFET 1

Gate of N-MOSFET 2

DP2

DN2

SP1

DP1

DN1

SN1

Drain of P-MOSFET 2

Drain of N-MOSFET 2

Source of P-MOSFET 1

Drain of P-MOSFET 1

Drain of N-MOSFET 1

Source of N-MOSFET 1

Source of N-MOSFET 2

Gate of P-MOSFET 2

Source of P-MOSFET 2

Thermal Pad

Die attachment substrate, must be grounded externally

Doc.# DSFP-TC7920

B080613

Supertex inc.

www.supertex.com

TC7920

N-Channel Electrical Characteristics (T_A= 25°C unless otherwise speciﬁed)

Sym

BV_DSS

V_GS(th)

Parameter

Min

200

1.0

Typ

Max

Units Conditions

Drain-to-source breakdown voltage

Gate threshold voltage

V_GS= 0V, I_D= 2.0mA

V_GS= V_DS, I_D= 1.0mA

2.4

-4.5

ΔV_GS(th)Change in V_GS(th)with temperature

mV/^OC V_GS= V_DS, I_D= 1.0mA

R_GS

Gate-to-source shunt resistor

Gate-to-source Zener voltage

KΩ

I_GS= 100µA

VZ_GS

13.2

I_GS= 2.0mA

10.0

µA

V_DS= Max rating, V_GS= 0V

I_DSS

Zero gate voltage drain current

On-state drain current

V_DS= 0.8 Max Rating,

V_GS= 0V, T_A= 125^OC

1.0

0.9

V_GS= 5.0V, V_DS= 25V

V_GS= 10V, V_DS= 50V

V_GS= 5.0V, I_D= 150mA

I_D(ON)

2.0

1.0

R_DS(ON)Static drain-to-source on-state resistance

V_GS= 10V, I_D= 1.0A

ΔR_DS(ON)Change in R_DS(ON)with temperature

%/^OC V_GS= 5.0V, I_D=150mA

G_FS

C_ISS

C_OSS

C_RSS

t_d(ON)

t_r

Forward transconductance

Input capacitance

300

6.9

1.3

mmho V_DS= 25V, I_D= 500mA

V_GS= 0V,

V_DS= 25V,

f = 1.0MHz

Common source output capacitance

Reverse transfer capacitance

Turn-on delay time

1.8

V_DD=25V,

I_D= 1.0A,

R_GEN= 25Ω

Rise time

t_d(OFF)

t_f

Turn-off delay time

Fall time

V_SD

Diode forward voltage drop

Reverse recovery time

V_GS= 0V, I_SD= 500mA

t_rr

300

Notes:

1. All D.C. parameters 100% tested at 25^OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2. All A.C. parameters sample tested.

N-Channel Switching Waveforms and Test Circuit

10V

V_DD

90%

INPUT

R_L

10%

Pulse

OUTPUT

Generator

t_(ON)

t_d(ON)

10%

t_(OFF)

t_d(OFF)

R_GEN

t_r

t_f

D.U.T

VDD

OUTPUT

10%

90%

INPUT

90%

Doc.# DSFP-TC7920

B080613

Supertex inc.

www.supertex.com

TC7920

P-Channel Electrical Characteristics (T_A= 25°C unless otherwise speciﬁed)

Sym

BV_DSS

V_GS(th)

Parameter

Min

-200

-1.0

Typ

Max

Units Conditions

Drain-to-source breakdown voltage

Gate threshold voltage

V_GS= 0V, I_D= -2.0mA

V_GS= V_DS, I_D= -1.0mA

-2.4

4.5

ΔV_GS(th)Change in V_GS(th)with temperature

mV/^OC V_GS= V_DS, I_D= -1.0mA

R_GS

Gate-to-source shunt resistor

Gate-to-source Zener voltage

KΩ

I_GS= 100µA

VZ_GS

13.2

I_GS= -2.0mA

-10

µA

V_DS= Max rating, V_GS= 0V

I_DSS

Zero gate voltage drain current

On-state drain current

V_DS= 0.8 Max Rating,

V_GS= 0V, T_A= 125^OC

-1.0

-0.7

V_GS= -5.0V, V_DS= -25V

V_GS= -10V, V_DS= -50V

V_GS= -5.0V, I_D= -150mA

V_GS= -10V, I_D= -1.0A

V_GS= -10V, I_D=-200mA

I_D(ON)

-2.0

1.0

R_DS(ON)Static drain-to-source on-state resistance

ΔR_DS(ON)Change in R_DS(ON)with temperature

%/^OC

G_FS

C_ISS

C_OSS

C_RSS

t_d(ON)

t_r

Forward transconductance

Input capacitance

300

7.5

2.6

mmho V_DS= -25V, I_D= -500mA

V_GS= 0V,

V_DS= -25V,

f = 1.0MHz

Common source output capacitance

Reverse transfer capacitance

Turn-on delay time

-1.8

V_DD= -25V,

I_D= -1.0A,

R_GEN= 25Ω

Rise time

t_d(OFF)

t_f

Turn-off delay time

Fall time

V_SD

Diode forward voltage drop

Reverse recovery time

V_GS= 0V, I_SD= -500mA

t_rr

300

Notes:

1. All D.C. parameters 100% tested at 25^OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2. All A.C. parameters sample tested.

P-Channel Switching Waveforms and Test Circuit

10%

Pulse

Generator

INPUT

-10V

90%

R_GEN

D.U.T

t_(ON)

t_d(ON)

t_(OFF)

t_d(OFF)

90%

Input

t_f

t_r

OUTPUT

VDD

OUTPUT

R_L

90%

10%

V_DD

Doc.# DSFP-TC7920

B080613

Supertex inc.

www.supertex.com

TC7920

12-Lead DFN Package Outline (K6)

4.00x4.00mm body, 1.00mm height (max), 0.50mm pitch

Note 1

(Index Area

D/2 x E/2)

Note 1

(Index Area

D/2 x E/2)

View B

Top View

Side View

Bottom View

Note 3

Seating

Plane

Note 2

View B

Notes:

1. A Pin 1 identiﬁer must be located in the index area indicated. The Pin 1 identiﬁer can be: a molded mark/identiﬁer; an embedded metal marker; or

a printed indicator.

2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.

3. The inner tip of the lead may be either rounded or square.

Symbol

0.00

0^O

MIN

NOM

MAX

0.80

0.90

1.00

0.00

0.02

0.05

0.18

0.25

0.30

3.85

4.00

4.15

3.19

3.34

3.44

3.85

4.00

4.15

2.29

2.44

2.54

0.30

0.40

0.50

Dimension

(mm)

0.20

REF

0.50

BSC

0.15

14^O

Drawings not to scale.

Supertex Doc.#: DSPD-12DFNK64X4P050, Version A030210.

(The package drawing(s) in this data sheet may not reﬂect the most current speciﬁcations. For the latest package outline

information go to http://www.supertex.com/packaging.html.)

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives

an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability

to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and

specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888

www.supertex.com

Doc.# DSFP-TC7920

B080613

TC7920K6-G [SUPERTEX]

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