TN1506 [SUPERTEX]
N-Channel Enhancement-Mode Vertical DMOS FETs; N沟道增强型垂直DMOS场效应管
| 型号： | TN1506 |
| 厂家： | 
Supertex, Inc |
| 描述： | N-Channel Enhancement-Mode Vertical DMOS FETs |
| 文件： | 总2页 (文件大小：29K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TN1506
TN1510
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
Order Number / Package
BVDSS
/
RDS(ON)
ID(ON)
VGS(th)
(max)
BVDGS
(max)
(min)
Die*
60V
3.0Ω
3.0Ω
2A
2A
2.0V
2.0V
TN1506NW
TN1510NW
100V
* Die in wafer form.
Features
Low Threshold DMOS Technology
❏ Low threshold — 2.0V max.
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
❏ High input impedance
❏ Low input capacitance — 50pF typical
❏ Fast switching speeds
❏ Low on resistance
❏ Free from secondary breakdown
❏ Low input and output leakage
❏ Complementary N- and P-channel devices
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, highbreakdownvoltage, highinputimpedance, lowinput
capacitance, and fast switching speeds are desired.
Applications
❏ Logic level interfaces – ideal for TTL and CMOS
❏ Solid state relays
❏ Battery operated systems
❏ Photo voltaic drives
❏ Analog switches
❏ General purpose line drivers
❏ Telecom switches
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
BVDSS
BVDGS
± 20V
Operating and Storage Temperature
-55°C to +150°C
10/03/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
TN1506/TN1510
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
Parameter
Min
100
60
Typ
Max
Unit
Conditions
Drain-to-Source
BVDSS
TN1510
TN1506
V
ID = 1mA, VGS = 0V
Breakdown Voltage
VGS(th)
∆VGS(th)
IGSS
Gate Threshold Voltage
0.6
2.0
-5.0
100
10
V
VGS = VDS, ID = 0.5mA
VGS = VDS, ID = 1.0mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max Rating
Change in VGS(th) with Temperature
Gate Body Leakage
-3.2
mV/°C
nA
IDSS
Zero Gate Voltage Drain Current
500
µA
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON)
ON-State Drain Current
0.75
2.0
1.4
3.4
2.0
1.6
0.6
400
50
VGS = 5V, VDS = 25V
A
V
GS = 10V, VDS = 25V
RDS(ON)
4.5
3.0
1.1
VGS = 4.5V, ID = 250mA
VGS = 10V, ID = 500mA
ID = 0.5A, VGS = 10V
VDS = 25V, ID = 500mA
Static Drain-to-Source
ON-State Resistance
Ω
∆RDS(ON)
GFS
CISS
COSS
CRSS
td(ON)
tr
Change in RDS(ON) with Temperature
Forward Transconductance
Input Capacitance
%/°C
Ω
225
m
60
35
VGS = 0V, VDS = 25V
f = 1 MHz
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
25
pF
4.0
2.0
3.0
6.0
3.0
1.0
400
8.0
5.0
5.0
7.0
6.0
1.5
VDD = 25V
ID = 1.0A
Rise Time
ns
td(OFF)
tf
Turn-OFF Delay Time
Fall Time
RGEN = 25Ω
VSD
trr
Diode Forward Voltage Drop
Reverse Recovery Time
V
ISD = 0.5A, VGS = 0V
ISD = 0.5A, VGS = 0V
ns
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
VDD
RL
10V
90%
PULSE
GENERATOR
INPUT
OUTPUT
10%
0V
Rgen
t(ON)
td(ON)
t(OFF)
td(OFF)
tr
tF
D.U.T.
VDD
0V
INPUT
10%
10%
OUTPUT
90%
90%
10/03//02
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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