ICS-52000 [TDK]

MEMS麦克风(麦克风);
ICS-52000
型号: ICS-52000
厂家: TDK ELECTRONICS    TDK ELECTRONICS
描述:

MEMS麦克风(麦克风)

商用集成电路
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ICS-52000  
Low-Noise Microphone with TDM Digital Output  
GENERAL DESCRIPTION  
APPLICATIONS  
Speech Recognition Arrays  
The ICS-52000 is a digital TDM output bottom port microphone.  
The complete ICS-52000 solution consists of a MEMS sensor, signal  
conditioning, an analog-to-digital converter, decimation and anti-  
aliasing filters, power management, and an industry standard 24-  
bit TDM interface. The TDM interface allows an array of up to 16 of  
the ICS-52000 microphones to connect directly to digital  
processors, such as DSPs and microcontrollers, without the need  
for an audio codec in the system. All microphones in an array  
sample their acoustic signals synchronously, enabling precise array  
processing.  
Smart Televisions  
Teleconferencing Systems  
Gaming Consoles  
Security Systems  
Microphone Arrays  
FEATURES  
Digital TDM Interface with High Precision 24-bit Data  
Supports TDM arrays of up to 16 synchronously-  
sampled channels  
High 65 dBA SNR  
−26 dB FS Sensitivity  
±1 dB Sensitivity Tolerance  
Wide Frequency Response from 50 Hz to 20 kHz  
Low Current Consumption: 1.0 mA  
High Power Supply Rejection: 89 dB FS  
117 dB SPL Acoustic Overload Point  
Small 4 mm × 3 mm × 1 mm Surface-Mount Package  
Compatible with Sn/Pb and Pb-Free Solder Processes  
RoHS/WEEE Compliant  
The ICS-52000 has a high SNR of 65 dBA and a wideband frequency  
response. The sensitivity tolerance of the ICS-52000 is ±1 dB,  
which enables high-performance microphone arrays without  
the need for system calibration.  
The ICS-52000 is available in a small 4 mm × 3 mm × 1 mm  
surface-mount package.  
FUNCTIONAL BLOCK DIAGRAM  
ORDERING INFORMATION  
PART  
ICS-52000  
EV_ICS-52000-FX  
TEMP RANGE  
−40°C to +85°C  
PACKAGING  
13” Tape & Reel  
ICS-52000  
FILTER  
ADC  
SCK  
SD  
TDM  
SERIAL  
PORT  
WS  
WSO  
POWER  
MANAGEMENT  
HARDWARE  
CONTROL  
InvenSense Inc.  
1745 Technology Drive, San Jose, CA 95110 U.S.A  
+1(408) 988–7339  
InvenSense reserves the right to change the detail  
specifications as may be required to permit improvements  
in the design of its products.  
Document Number: DS-000121  
Revision: 1.3  
Release Date: 4/14/2017  
www.invensense.com  
 
 
 
 
 
ICS-52000  
TABLE OF CONTENTS  
General Description ..................................................................................................................................................................... 1  
Applications ................................................................................................................................................................................. 1  
Features ....................................................................................................................................................................................... 1  
Functional Block Diagram ............................................................................................................................................................ 1  
Ordering Information................................................................................................................................................................... 1  
Table of Contents.................................................................................................................................................................................... 2  
Specifications .......................................................................................................................................................................................... 4  
Table 1. Electrical Characteristics ................................................................................................................................................ 4  
Table 2. TDM Digital INPUT/Output ............................................................................................................................................ 5  
Table 3. Serial Data Port Timing Specification ............................................................................................................................. 5  
Timing Diagram............................................................................................................................................................................ 5  
Absolute Maximum Ratings.................................................................................................................................................................... 6  
Table 4. Absolute Maximum Ratings ........................................................................................................................................... 6  
ESD Caution ................................................................................................................................................................................. 6  
Soldering Profile........................................................................................................................................................................... 7  
Table 5. Recommended Soldering Profile.................................................................................................................................... 7  
Pin Configurations And Function Descriptions ....................................................................................................................................... 8  
Table 6. Pin Function Descriptions............................................................................................................................................... 8  
Typical Performance Characteristics....................................................................................................................................................... 9  
Theory of Operation ............................................................................................................................................................................. 10  
Startup and Power Management .............................................................................................................................................. 10  
Startup............................................................................................................................................................................ 10  
Table 7. Startup time ...................................................................................................................................................... 10  
Standby Mode ................................................................................................................................................................ 10  
Soft Unmute ................................................................................................................................................................... 10  
Synchronizing Microphones ...................................................................................................................................................... 11  
TDM Data Interface ................................................................................................................................................................... 11  
Data Output Format ....................................................................................................................................................... 11  
Digital Microphone Sensitivity................................................................................................................................................... 13  
Digital Filter Characteristics ....................................................................................................................................................... 13  
High-Pass Filter ............................................................................................................................................................... 13  
Low-Pass Decimation Filter ............................................................................................................................................ 13  
Applications Information ...................................................................................................................................................................... 14  
SD Output Drive Strength .......................................................................................................................................................... 14  
Design Recommendations.............................................................................................................................................. 14  
Power Supply Decoupling .......................................................................................................................................................... 14  
Supporting Documents ......................................................................................................................................................................... 15  
Page 2 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
ICS-52000  
Evaluation Board User Guide..................................................................................................................................................... 15  
Application Notes ...................................................................................................................................................................... 15  
PCB Design And Land Pattern Layout ................................................................................................................................................... 16  
PCB Material And Thickness ...................................................................................................................................................... 16  
Handling Instructions............................................................................................................................................................................ 17  
Pick And Place Equipment ......................................................................................................................................................... 17  
Reflow Solder............................................................................................................................................................................. 17  
Board Wash................................................................................................................................................................................ 17  
Outline Dimensions............................................................................................................................................................................... 18  
Ordering Guide .......................................................................................................................................................................... 18  
Revision History ......................................................................................................................................................................... 19  
Compliance Declaration Disclaimer ...................................................................................................................................................... 20  
Page 3 of 20  
Document Number: DS-000121  
Revision: 1.3  
ICS-52000  
SPECIFICATIONS  
TABLE 1. ELECTRICAL CHARACTERISTICS  
TA = +25°C, VDD = 1.8 to 3.3V, fSCK = 3.072 MHz, CLOAD = 30 pF unless otherwise noted. Typical specifications are not guaranteed.  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
NOTES  
PERFORMANCE  
Directionality  
Sensitivity  
Signal-to-Noise Ratio (SNR)  
Equivalent Input Noise (EIN)  
Omni  
−26  
65  
1 kHz, 94 dB SPL  
−27  
−25  
dB FS  
dBA  
dBA SPL  
29  
Derived from EIN and acoustic  
overload point  
105 dB SPL  
Dynamic Range  
88  
dB  
%
Total Harmonic Distortion (THD)  
0.3  
1
217 Hz, 100 mVp-p square wave  
superimposed on VDD = 1.8 V (A-  
weighted)  
Power-Supply Rejection (PSR)  
−89  
dB FS  
Power-Supply Rejection – Swept Sine  
1 kHz sine wave  
−98  
dB FS  
Acoustic Overload Point  
Noise Floor  
10% THD  
20 Hz to 20 kHz, A-weighted, rms  
117  
−91  
dB SPL  
dB FS  
POWER SUPPLY  
Supply Voltage (VDD  
)
1.62  
3.63  
1.4  
20  
1.5  
24  
V
Normal Mode  
Standby  
Normal Mode  
Standby  
1.0  
5
1.1  
7
mA  
µA  
mA  
µA  
V
DD = 1.8V  
Supply Current (IS)  
VDD = 3.3V  
DIGITAL FILTER  
Group Delay  
Acoustic input to digital output –  
includes filter and TDM serial output  
2/fS  
sec  
Pass Band Ripple  
Stop Band Attenuation  
±0.3  
dB  
dB  
58  
20  
Pass Band  
kHz  
fs = 48 kHz  
Page 4 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
ICS-52000  
TABLE 2. TDM DIGITAL INPUT/OUTPUT  
40°C < TA < +85°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.  
PARAMETER  
CONDITIONS  
MIN  
MAX  
UNITS  
NOTES  
DIGITAL INPUT  
0
0.25 × VDD  
VDD  
Voltage Input Low (VIL)  
V
V
0.7 × VDD  
Voltage Input High (VIH)  
SD DIGITAL OUTPUT  
0
0.25 × VDD  
VDD  
Voltage Output Low (VOL  
)
V
V
0.7 × VDD  
Voltage Output High (VOH  
)
Maximum Load  
CLK = 24.576 MHz  
150  
pF  
TABLE 3. SERIAL DATA PORT TIMING SPECIFICATION  
40°C < TA < +85°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.  
PARAMETER  
SCK duty cycle  
CONDITIONS  
MIN  
48  
MAX  
52  
UNITS  
%
NOTES  
SCK period (tSCP  
SCK frequency (fSCK  
WS setup (tWSS  
WS hold (tWSH  
)
37  
0.460  
0
ns  
)
27.034  
MHz  
ns  
)
)
10  
ns  
WS frequency (fS)  
SD data valid (tSDV  
7.19  
52.8  
18  
kHz  
ns  
)
From SCK rising to valid SD data  
From SCK rising to SD output tristated  
15 pF trace load  
SD data disable (tSDD  
WSO valid (tWSOV  
WSO disable (tWSOD  
)
18  
ns  
)
18  
ns  
)
15 pF trace load  
18  
ns  
TIMING DIAGRAM  
tSCP  
SCK  
tWSH  
tWSS  
tWSOV  
tWSOD  
WS  
WSO  
tSDV  
tSDD  
SD  
Figure 1. Serial Data Port Timing  
Page 5 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
ICS-52000  
ABSOLUTE MAXIMUM RATINGS  
Stress above those listed as Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only  
and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for  
extended periods may affect device reliability.  
TABLE 4. ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
RATING  
0.3V to +3.63V  
Supply Voltage (VDD  
)
0.3V to VDD + 0.3V or 3.63V, whichever is less  
Digital Pin Input Voltage  
Sound Pressure Level  
Mechanical Shock  
Vibration  
160 dB  
10,000 g  
Per MIL-STD-883 Method 2007, Test Condition B  
−40°C to +85°C  
Biased  
Temperature Range  
−55°C to +150°C  
Storage  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device.  
Charged devices and circuit boards can  
discharge without detection. Although this  
product features patented or proprietary  
protection circuitry, damage may occur on  
devices subjected to high energy ESD.  
Therefore proper ESD precautions should be  
taken to avoid performance degradation or  
loss of functionality.  
Page 6 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
ICS-52000  
SOLDERING PROFILE  
CRITICAL ZONE  
TO T  
tP  
T
L
P
T
P
RAMP-UP  
T
L
tL  
T
SMAX  
T
SMIN  
tS  
RAMP-DOWN  
PREHEAT  
t25°C TO PEAK TEMPERATURE  
TIME  
Figure 2. Recommended Soldering Profile Limits  
TABLE 5. RECOMMENDED SOLDERING PROFILE  
PROFILE FEATURE  
Sn63/Pb37  
Pb-Free  
Average Ramp Rate (TL to TP)  
1.25°C/sec max  
1.25°C/sec max  
Minimum Temperature  
100°C  
150°C  
100°C  
(TSMIN  
Minimum Temperature  
(TSMIN  
Time (TSMIN to TSMAX), tS  
)
Preheat  
200°C  
)
60 sec to 75 sec  
1.25°C/sec  
60 sec to 75 sec  
1.25°C/sec  
~50 sec  
Ramp-Up Rate (TSMAX to TL)  
Time Maintained Above Liquidous (tL)  
45 sec to 75 sec  
183°C  
Liquidous Temperature (TL)  
Peak Temperature (TP)  
217°C  
215°C ±3°C/−3°C  
260°C +0°C/−5°C  
Time Within +5°C of Actual Peak  
Temperature (tP)  
20 sec to 30 sec  
20 sec to 30 sec  
3°C/sec max  
Ramp-Down Rate  
3°C/sec max  
5 min max  
Time +25°C (t25°C) to Peak Temperature  
5 min max  
*The reflow profile in Table 5 is recommended for board manufacturing with InvenSense MEMS microphones. All microphones are also compatible with the J-STD-020  
profile.  
Page 7 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
ICS-52000  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
Figure 3. Pin Configuration (Top View, Terminal Side Down)  
TABLE 6. PIN FUNCTION DESCRIPTIONS  
PIN  
NAME  
TYPE  
Output  
Input  
FUNCTION  
WS output, connect to WS of the next ICS-52000 in the daisy-chain.  
Pull to VDD. The state of this pin is used at power-up.  
1
WSO  
2
CONFIG  
VDD  
3
Power  
Power, 1.62V to 3.63V. This pin should be decoupled to GND with a 0.1 μF capacitor.  
4
5
GND  
WS  
Ground  
Input  
Ground. Connect to ground on the PCB.  
Serial Data-Word Select for TDM Interface  
Serial Data Clock for TDM Interface  
6
7
SCK  
SD  
Input  
Output  
Serial Data Output for TDM Interface. This pin tri-states when not actively driving the appropriate  
output channel. The SD trace should have a 100 kΩ pulldown resistor to discharge the line during  
the time that all microphones on the bus have tri-stated their outputs.  
Page 8 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
ICS-52000  
TYPICAL PERFORMANCE CHARACTERISTICS  
30  
20  
10  
0
10  
1
-10  
-20  
-30  
0.1  
90  
95  
100  
105  
110  
115  
120  
125  
10  
100  
1k  
10k  
INPUT (dB SPL)  
FREQUENCY (Hz)  
Figure 5. Total Harmonic Distortion + Noise (THD+N) vs. Input SPL  
0
Figure 4. Typical Frequency Response (Measured)  
0
-5  
-10  
-15  
-20  
-25  
-30  
-35  
–20  
–40  
–60  
–80  
–100  
–120  
100  
1k  
10k  
90  
95  
100  
105  
110  
115  
120  
125  
FREQUENCY (Hz)  
INPUT AMPLITUDE (dB SPL)  
Figure 6. PSR vs. Frequency, 100 mV p-p Swept Sine Wave  
Figure 7. Linearity  
Page 9 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
ICS-52000  
THEORY OF OPERATION  
STARTUP AND POWER MANAGEMENT  
The ICS-52000 has two power states: normal operation, and standby mode.  
Startup  
At startup of the ICS-52000, the start of the frame sync (WS) signal should be delayed from the start of the serial clock (SCK) by at  
least 10 ms. This enables the microphone’s internal circuits to completely initialize before starting the synchronization sequence  
with other microphones in the TDM array. This delay can be implemented either by enabling the WS output on the clock master at  
least 10 ms after the SCK is enabled, or by externally controlling the signals given to the ICS-52000s.  
>10 ms  
1/fs  
WS (MASTER)  
SCK  
Figure 8. Clock Startup Sequence  
The ICS-52000 will begin to output non-zero data 4462 SCK clock cycles (1.5 ms with fSCK = 3.072 MHz) after initial power-up. The  
data is valid to use after the initial 262,144 SCK cycles (85 ms with fSCK = 3.072 MHz). This startup time is applicable any time it is  
entering normal operation mode, coming either from power-down or out of standby.  
Table 7 shows the startup time for different sampling rates.  
Table 7. Startup time  
fS (WS frequency)  
Time to non-zero data output  
Startup time to valid data  
48 kHz  
1.5 ms  
3.0 ms  
4.5 ms  
9.0 ms  
85 ms  
171 ms  
256 ms  
512 ms  
24 kHz  
16 kHz  
8 kHz  
Normal Operation  
The part is in normal operation mode when SCK and WS are active. Clocks should not be supplied to the microphones until they are  
settled and stable.  
Standby Mode  
The microphone enters standby mode when the frequency of SCK falls below about 1 kHz. It is recommended to enter standby  
mode by stopping both the SCK and WS clock signals and pulling those signals to ground to avoid drawing current through the WS  
pin’s internal pull-down resistor. The timing for exiting standby mode is the same as normal startup.  
Do not supply active clocks (WS and SCK) to the ICS-52000 while there is no power supplied to VDD, doing this continuously turns on  
ESD protection diodes, which may affect long-term reliability of the microphone.  
Soft Unmute  
The ICS-52000 has a soft unmute feature to prevent pops on power-up. From the time that the ICS-52000 starts to output data, the  
volume will ramp up to the full-scale output level over 256 WS clock cycles. With a 48 kHz sampling rate, this unmute sequence will  
take about 5.3 ms.  
Page 10 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
 
 
ICS-52000  
SYNCHRONIZING MICROPHONES  
ICS-52000 microphones are synchronized by the WS signal, so audio captured from multiple microphones sharing the same clock will  
be sampled synchronously.  
TDM DATA INTERFACE  
The slave serial data port’s format is TDM, 24-bit, twos complement and up to 16 ICS-52000 microphones can be daisy-chained  
together on a single data bus. There must be 64, 128, 256 or 512 SCK cycles in each WS frame. Each microphone will output 24-bit  
data in subsequent 32-bit slots. Tie the SD pins of all ICS-52000 microphones driving the data bus together as shown in Figure 9. The  
ICS-52000 will always be a slave on the TDM bus.  
The word select/word clock signals of the microphones in the system will be daisy-chained so that the clock master drives WS of the  
first ICS-52000, whose WSO will drive WS of the second ICS-52000, and so on; the last ICS-52000 in the chain can leave WSO  
disconnected. See Figure 9 for an illustration of these connections. The ICS-52000’s WS clock input is sampled on the rising edge of  
SCK and the falling edge of WS can come anywhere before the start of the next frame. The ICS-52000 connected directly to the  
system’s clock master will output its data in the first TDM slot, the next microphone in the chain will output its data in the second  
TDM slot, and so on.  
The frequency of SCK will depend on the number of microphones in the system. The SCK frequency should be n × 32 × fS, where n is  
a power of two (2, 4, 8, or 16) equal to or greater than the number of ICS-52000s on the bus. Table 8 shows the recommended SCK  
frequency for a chain of ICS-52000 microphones.  
Table 8. SCK Frequency  
Number of ICS-52000 Microphones  
SCK Frequency, based on WS frequency (fS)  
1-2  
3-4  
5-8  
9-16  
64 × fS  
128 × fS  
256 × fS  
512 × fS  
Figure 10 shows the format of an n-channel TDM data stream. Figure 11 zooms in on a single TDM data slot as output from a single  
ICS-52000 microphone.  
Data Output Format  
The output data word length is 24 bits/channel. The data word format is 2’s complement, MSB-first.  
The serial TDM data output bits are triggered on SCK’s rising edge. The receiver (DSP, codec, microcontroller) should sample that  
data bit on the next SCK rising edge. This is illustrated in Figure 11; SCK rising edge A triggers the SD output bit and the receiver  
should sample the data at its input on SCK rising edge B. The data is formatted in this way to support the internal propagation delay  
of the microphone data at high SCK frequencies.  
The output data pin (SD) is tri-stated when it is not actively driving TDM output data. SD will immediately tri-state after the LSB is  
output so that another microphone can drive the common data line.  
The SD trace should have a pull-down resistor to discharge the line during the time that all microphones on the bus have tri-stated  
their outputs. A 100 or smaller resistor is sufficient for this, as shown in Figure 9.  
Page 11 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
ICS-52000  
From Voltage  
Regulator (1.8-3.3V)  
0.1 uF  
0.1 uF  
0.1 uF  
SEE THE STARTUP SECTION  
AND FIGURE 8 FOR DETAILS  
ON CONNECTING THE SYSTEM  
MASTER TO THE MICROPHONE  
ARRAY.  
CONFIG VDD  
CONFIG VDD  
CONFIG VDD  
WS  
WS  
WSO  
SD  
WS  
WSO  
SD  
WSI  
WSO  
SD  
ICS-52000  
#1  
ICS-52000  
#2  
ICS-52000  
#n  
SYSTEM MASTER  
(MICROCONTROLLER,  
DSP, CODEC)  
SCK  
SCK  
SCK  
SCK  
GND  
GND  
GND  
SD  
100 kΩ  
Figure 9. System Block Diagram  
WS(MASTER)  
WSO(1), WS(2)  
WSO(2), WS(3)  
WSO(n-1), WS(n)  
SCK  
SD  
SLOT  
1
SLOT 1  
SLOT  
n
SLOT  
2
SLOT 3  
Figure 10. n-Channel Output TDM Timing Diagram  
WS  
WSO  
1
2
3
23  
24  
25  
31  
32  
33  
34  
A
B
SCK (n x 32 x fs)  
SD  
Output Data  
High-Z  
High-Z  
MSB  
LSB  
Figure 11. Single TDM Slot Timing Diagram  
Page 12 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
ICS-52000  
DIGITAL MICROPHONE SENSITIVITY  
The sensitivity of a digital output microphone is specified in units of dB FS (decibels relative to a full-scale digital output). A 0 dB FS  
sine wave is defined as a signal whose peak just touches the full-scale code of the digital word (see Figure 5). This measurement  
convention means that signals with a different crest factor may have an RMS level higher than 0 dB FS. For example, a full-scale  
square wave has an RMS level of 3 dB FS.  
1.0  
0.8  
0.6  
0.4  
0.2  
0
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
TIME (ms)  
Figure 12. 1 kHz, 0 dB FS Sine Wave  
The definition of a 0 dB FS signal must be understood when measuring the sensitivity of the ICS-52000. An acoustic input signal of a  
1 kHz sine wave at 94 dB SPL applied to the ICS-52000 results in an output signal with a −26 dB FS level. This means that the output  
digital word peaks at −26 dB below the digital full-scale level. A common misunderstanding is that the output has an RMS level of  
−29 dB FS; however, this is not the case because of the definition of a 0 dB FS sine wave.  
There is no commonly accepted unit of measurement to express the instantaneous level of a digital signal output from the  
microphone, as opposed to the RMS level of the signal. Some measurement systems express the instantaneous level of an individual  
sample in units of D, where 1.0 D is digital full scale (see Figure 12). In this case, a −26 dB FS sine wave has peaks at 0.05 D.  
For more information about digital microphone sensitivity, see the AN-1112 Application Note, Microphone Specifications Explained.  
DIGITAL FILTER CHARACTERISTICS  
The ICS-52000 has an internal digital bandpass filter. A high-pass filter eliminates unwanted low frequency signals. A low-pass  
decimation filter scales the pass band with the sampling frequency and performs required out-of-band noise reduction.  
High-Pass Filter  
The ICS-52000 incorporates a high-pass filter to remove unwanted dc and very low frequency components. With fS = 48 kHz, this high  
pass filter has a −3 dB corner frequency of 3.7 Hz. The cutoff frequency scales with changes in sampling rate.  
This digital filter response is in addition to the acoustic high-pass response of the ICS-52000 that has a −3 dB corner of 50 Hz.  
Low-Pass Decimation Filter  
The analog-to-digital converter in the ICS-52000 is a single-bit, high order, sigma-delta (Σ-Δ) running at a high oversampling ratio.  
The noise shaping of the converter pushes the majority of the noise well above the audio band and gives the microphone a wide  
dynamic range. However, it does require a good quality low-pass decimation filter to eliminate the high frequency noise.  
The pass band of the filter extends to 0.417 × fS and, in that band, has only 0.04 dB of ripple. The high frequency cutoff of −3 dB  
occurs at 0.5 × fS. A 48 kHz sampling rate results in a pass band of 20.3 kHz and a half amplitude corner at 24 kHz; the stop-band  
attenuation of the filter is 58 dB. Note that these filter specifications scale with sampling frequency.  
Page 13 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
ICS-52000  
APPLICATIONS INFORMATION  
SD OUTPUT DRIVE STRENGTH  
The SD data output pin must drive a load that includes the PCB trace and the tri-stated inputs of the other ICS-52000 SD pins  
connected to that same trace. The tri-stated load capacitance of the ICS-52000 SD pin is about 6 pF. The ICS-52000 is designed to  
drive a load of 150 pF. If 16 ICS-52000 microphones are connected to a common 30” SD trace on a typical PCB, the driver will meet  
the timing specs with a 24.576 MHz SCK and 2 ns propagation delay.  
Design Recommendations  
The SD output driver has an output impedance of about 25-35Ω. A source termination resistor placed close to each microphone’s SD  
pin may help to reduce ringing and overshoot on the output signal. A 15-25Ω resistor will help to match the source impedance to a  
typical 50Ω transmission line.  
The SD signal’s propagation delay is a function of the PCB material and length of the trace. Arrays with a larger number of  
microphones will usually have a longer SD trace on the PCB. The worst-case timing conditions specified above (24.576 MHz SCK, 2 ns  
propagation delay) were calculated for a 16 microphone array with 2” spacing between each microphone and fS = 48 kHz.  
The propagation delay is minimized by reducing the distance between the SD source and the device receiving the data. This is done  
by placing the receiver in the layout in the middle of the SD trace, rather than at one of the extremes. That will cut the worst-case  
propagation delay in half, compared to if the receiver is placed at one end of a long SD trace.  
If the distance between the microphone array and the receiver cannot be minimized, it may be useful to have a buffer between the  
two. Place the buffer at the point that minimizes the distance between it and the furthest microphones on the PCB trace. This single  
buffer could drive the remaining distance between it and the data receiver. The buffer’s propagation delay may be a critical spec,  
especially with higher clock rates.  
POWER SUPPLY DECOUPLING  
For best performance and to avoid potential parasitic artifacts, placing a 0.1 µF ceramic type X7R or better capacitor between  
Pin 3 (VDD) and ground is strongly recommended. The capacitor should be placed as close to Pin 3 as possible.  
The connections to each side of the capacitor should be as short as possible, and the trace should stay on a single layer with no vias.  
For maximum effectiveness, locate the capacitor equidistant from the power and ground pins or, when equidistant placement is not  
possible, slightly closer to the power pin. Thermal connections to the ground planes should be made on the far side of the capacitor,  
as shown in Figure 13.  
VDD GND  
CAPACITOR  
TO V  
DD  
TO GND  
Figure 13. Recommended Power Supply Bypass Capacitor Layout  
Page 14 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
 
ICS-52000  
SUPPORTING DOCUMENTS  
For additional information, see the following documents.  
EVALUATION BOARD USER GUIDE  
AN-000001, Bottom-Port I2S/TDM Output MEMS Microphone Evaluation Board  
AN-000099, Synchronous Sampling with an Array of ICS-52000 TDM Microphones  
APPLICATION NOTES  
AN-100, MEMS Microphone Handling and Assembly Guide  
AN-1003, Recommendations for Mounting and Connecting the InvenSense Bottom-Ported MEMS Microphones  
AN-1112, Microphone Specifications Explained  
AN-1124, Recommendations for Sealing InvenSense Bottom-Port MEMS Microphones from Dust and Liquid Ingress  
AN-1140, Microphone Array Beamforming  
Page 15 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
ICS-52000  
PCB DESIGN AND LAND PATTERN LAYOUT  
The recommended PCB land pattern for the ICS-52000 should be laid out to a 1:1 ratio to the solder pads on the microphone  
package, as shown in Figure 14. Take care to avoid applying solder paste to the sound hole in the PCB. A suggested solder paste  
stencil pattern layout is shown in Figure 15. The diameter of the sound hole in the PCB should be larger than the diameter of the  
sound port of the microphone. A minimum diameter of 0.5 mm is recommended.  
6X 0.40X0.60  
0.65  
0.65  
1.275  
Ø
1.65  
1.05  
Ø
Figure 14. PCB Land Pattern Layout  
Dimensions shown in millimeters  
6X 0.30X0.50  
Ø
1.65  
Ø
1.15  
2.15  
0.1(4x)  
0.65  
0.65  
1.275  
Figure 15. Suggested Solder Paste Stencil Pattern Layout  
Dimensions shown in millimeters  
PCB MATERIAL AND THICKNESS  
The performance of the ICS-52000 is not affected by PCB thickness. The ICS-52000 can be mounted on either a rigid or flexible PCB.  
A flexible PCB with the microphone can be attached directly to the device housing with an adhesive layer. This mounting method  
offers a reliable seal around the sound port while providing the shortest acoustic path for good sound quality.  
Page 16 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
ICS-52000  
HANDLING INSTRUCTIONS  
PICK AND PLACE EQUIPMENT  
The MEMS microphone can be handled using standard pick-and-place and chip shooting equipment. Take care to avoid damage to the  
MEMS microphone structure as follows:  
Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the  
pickup tool can make contact with any part of the lid surface.  
Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone.  
Do not pull air out of or blow air into the microphone port.  
Do not use excessive force to place the microphone on the PCB.  
REFLOW SOLDER  
For best results, the soldering profile must be in accordance with the recommendations of the manufacturer of the solder paste used to  
attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified  
in Figure 2 and Table 5.  
BOARD WASH  
When washing the PCB, ensure that water does not make contact with the microphone port. Do not use blow-off procedures or  
ultrasonic cleaning.  
Page 17 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
 
 
ICS-52000  
OUTLINE DIMENSIONS  
f
0.10 C  
d
0.10 (4X)  
C
A
0.40X0.60 (6x)  
(0.266)  
4.00±0.10  
j
0.10 m C A B  
0.25  
1.075  
REFERENCECORNER  
(0.72)  
0.07  
0.125±0.05  
0.125±0.05  
Ø1.65  
Ø1.05  
Ø0.35  
B
0.25  
1.10  
(3.86)  
0.125±0.05  
4.00  
1.0±0.10  
TOP VIEW  
SIDE VIEW  
BOTTOM VIEW  
Figure 16. 7-Terminal Chip Array Small Outline No Lead Cavity  
4.00 × 3.00 × 1.00 mm Body  
Dimensions shown in millimeters  
PIN 1 INDIC ATION  
PART NUMBER  
520  
YYXXXX  
DATE CODE  
LOT TR ACEABILIT Y  
Figure 17. Package Marking Specification (Top View)  
ORDERING GUIDE  
PART  
TEMP RANGE  
−40°C to +85°C  
PACKAGE  
7-Terminal LGA_CAV  
QUANTITY  
5,000  
PACKAGING  
13” Tape and Reel  
ICS-52000  
EV_ICS-52000-FX  
Flex Evaluation Board  
Page 18 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
 
ICS-52000  
REVISION HISTORY  
REVISION DATE  
REVISION  
DESCRIPTION  
8/26/2016  
9/14/2016  
1/4/2017  
4/14/2017  
1.0  
1.1  
1.2  
1.3  
Initial Version  
Fixed typo on Table 8  
Updated boilerplate text to reflect Production status.  
Updated Table 3, Figure 1, Startup and TDM Data Interface Sections  
Page 19 of 20  
Document Number: DS-000121  
Revision: 1.3  
 
ICS-52000  
COMPLIANCE DECLARATION DISCLAIMER  
InvenSense believes the environmental and other compliance information given in this document to be correct but cannot  
guarantee accuracy or completeness. Conformity documents substantiating the specifications and component characteristics are on  
file. InvenSense subcontracts manufacturing, and the information contained herein is based on data received from vendors and  
suppliers, which has not been validated by InvenSense.  
This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by  
InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications  
are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and  
software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither  
expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no  
responsibility for any claims or damages arising from information contained in this document, or from the use of products and  
services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights,  
mask work and/or other intellectual property rights.  
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by  
implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information  
previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors  
should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons  
or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment,  
transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime  
prevention equipment.  
©2016-2017 InvenSense, Inc. All rights reserved. InvenSense, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion,  
MotionApps, DMP, AAR and the InvenSense logo are trademarks of InvenSense, Inc. Other company and product names may be  
trademarks of the respective companies with which they are associated.  
©2016-2017 InvenSense, Inc. All rights reserved.  
Page 20 of 20  
Document Number: DS-000121  
Revision: 1.3  
 

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