5962-9167701XA [TEMIC]
FIFO, 8KX9, 80ns, Asynchronous, CMOS, CDIP28;
| 型号： | 5962-9167701XA |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | FIFO, 8KX9, 80ns, Asynchronous, CMOS, CDIP28 先进先出芯片 CD |
| 文件： | 总28页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REVISIONS
DESCRIPTION
LTR
DATE
APPROVED
(YR-MO-DA)
REV
SHEET
REV
15 16 17 18 19 20 21 22 23 24 25 26 27
SHEET
REV STATUS
OF SHEETS
REV
1
2
3
4
5
6
7
8
9
10 11 12 13 14
SHEET
PREPARED BY
PMIC N/A
Jeffery D. Bowling
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
STANDARDIZED
MILITARY
CHECKED BY
Ray Monnin
DRAWING
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 8K X 9 DUAL PORT FIFO,
MONOLITHIC SILICON
APPROVED BY
Michael A. Frye
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
92-09-25
SIZE
CAGE CODE
5962-91677
A
REVISION LEVEL
67268
AMSC N/A
SHEET
1
OF
27
DESC FORM 193
JUL 91
5962-E380
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1. SCOPE
1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two
product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device
classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying
Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of
MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a
choice of radiation hardness assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN shall be as shown in the following example:
5962
91677
01
M
X
X
Federal
stock class
designator
RHA
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
Lead
designator
(see 1.2.1)
/
outline
finish
(see 1.2.4)
(see 1.2.5)
\
\/
Drawing number
1.2.1 Radiation hardness assurance (RHA) designator. Device classes M, B, and S RHA marked devices shall meet the
MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA
marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A
dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
Generic number 1/
Circuit function
Access time
01
02
03
8K x 9 dual port CMOS FIFO
8K x 9 dual port CMOS FIFO
8K x 9 dual port CMOS FIFO
80 ns
50 ns
30 ns
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level
as follows:
Device class
M
Device requirements documentation
Vendor self-certification to the requirements for non-JAN class B
microcircuits in accordance with 1.2.1 of MIL-STD-883
B or S
Q or V
Certification and qualification to MIL-M-38510
Certification and qualification to MIL-I-38535
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
X
Y
Z
GDIP1-T28 or CDIP2-T28
CDIP3-T28 or GDIP4-T28
CQCC1-N32
28
28
32
Dual-in-line
Dual-in-line
Rectangular leadless chip carrier
1.2.5 Lead finish. The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes
Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in
specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
1/ Generic numbers are listed on the Standarized Military Drawing Source Approval Bulletin at the end of this document and
will also be listed in MIL-BUL-103.
SIZE
STANDARDIZED
5962-91677
A
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
SHEET
2
REVISION LEVEL
DESC FORM 193A
JUL 91
1.3 Absolute maximum ratings. 2/
Supply voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . .
-0.5 V dc to +7.0 V dc
50 mA
-65 C to +150 C
2.0 W
+260 C
Maximum power dissipation (P ) . . . . . . . . . . . . . . . . . . .
D
Lead temperature (soldering, 10 seconds) . . . . . . . . . . . .
Thermal resistance, junction-to-case (
):
JC
Cases X, Y, and Z . . . . . . . . . . . . . . . . . . . . . . . . . . . .
See MIL-STD-1835
+150 C 3/
Junction temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . .
J
1.4 Recommended operating conditions.
Supply voltage range (V ) . . . . . . . . . . . . . . . . . . . . . . .
CC
4.5 V dc to 5.5 V dc
2.2 V dc 4/
Minimum high level input voltage (V ) . . . . . . . . . . . . . . .
IH
Maximum low level input voltage (V ) . . . . . . . . . . . . . . .
IL
0.8 V dc 5/
Case operating temperature range (T ) . . . . . . . . . . . . . .
C
-55 C to +125 C
1.5 Digital logic testing for device classes Q and V.
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, test method 5012) . . . . . .
XX percent 6/
2. APPLICABLE DOCUMENTS
2.1 Government specifications, standards, bulletin, and handbook. Unless otherwise specified, the following specifications,
standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and
Standards specified in the solicitation, form a part of this drawing to the extent specified herein.
SPECIFICATIONS
MILITARY
MIL-M-38510
MIL-I-38535
-
-
Microcircuits, General Specification for.
Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
MILITARY
MIL-STD-480
-
-
-
Configuration Control-Engineering Changes, Deviations and Waivers.
Test Methods and Procedures for Microelectronics.
Microcircuit Case Outlines.
MIL-STD-883
MIL-STD-1835
BULLETIN
MILITARY
MIL-BUL-103
-
List of Standardized Military Drawings (SMD's).
2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
3/ Maximum junction temperature may be increased to +175 C during burn-in and steady-state life.
4/ For XI input, V = 2.8 V dc .
IH
5/ 1.5 V dc undershoots are allowed for 10 ns once per cycle.
6/ Values will be added when they become available.
SIZE
STANDARDIZED
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
5962-91677
A
SHEET
3
REVISION LEVEL
DESC FORM 193A
JUL 91
HANDBOOK
MILITARY
MIL-HDBK-780
-
Standardized Military Drawings.
(Copies of the specifications, standards, bulletin, and handbook required by manufacturers in connection with specific
acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.)
2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS
cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the
documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192-88 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion
Irradiation
of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916
Race Street, Philadelphia, PA 19103).
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard No. 17 - A Standardized Test Procedure for the Characterization of Latch-up in CMOS Integrated
Circuits.
(Applications for copies should be addressed to the Electronics Industries Association, 2001 Eye Street, N.W., Washington,
DC 20006.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing shall take precedence.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device class M shall be in accordance with 1.2.1 of
MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices" and as specified herein.
The individual item requirements for device classes B and S shall be in accordance with MIL-M-38510 and as specified herein.
For device classes B and S, a full electrical characterization table for each device type shall be included in this SMD. The
individual item requirements for device classes Q and V shall be in accordance with MIL-I-38535, the device manufacturer's
Quality Management (QM) plan, and as specified herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-M-38510 for device classes M, B, and S and MIL-I-38535 for device classes Q and V and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth tables. The truth tables shall be as specified on figure 2.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the
full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The
electrical tests for each subgroup are defined in table I.
SIZE
STANDARDIZED
5962-91677
A
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
SHEET
4
REVISION LEVEL
DESC FORM 193A
JUL 91
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. Marking for device class M shall be in accordance
with MIL-STD-883 (see 3.1 herein). In addition, the manufacturer's PIN may also be marked as listed in MIL-BUL-103.
Marking for device classes B and S shall be in accordance with MIL-M-38510. Marking for device classes Q and V shall be in
accordance with MIL-I-38535.
3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a "C" as required in MIL-STD-883
(see 3.1 herein). The certification mark for device classes B and S shall be a "J" or "JAN" as required in MIL-M-38510. The
certification mark for device classes Q and V shall be a "QML" as required in MIL-I-38535.
3.6 Certificate of compliance. For device class M, a certificate of compliance shall be required from a manufacturer in
order to be listed as an approved source of supply in MIL-BUL-103 (see 6.7.3 herein). For device classes Q and V, a
certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this
drawing (see 6.7.2 herein). The certificate of compliance submitted to DESC-ECS prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device class M the requirements of
MIL-STD-883 (see 3.1 herein), or for device classes Q and V, the requirements of MIL-I-38535 and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required for device class M in MIL-STD-883 (see 3.1
herein) or device classes B and S in MIL-M-38510 or for device classes Q and V in MIL-I-38535 shall be provided with each lot
of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DESC-ECS of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-480.
3.9 Verification and review for device class M. For device class M, DESC, DESC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device classes M, B, and S. Device classes M, B, and S devices covered by this
drawing shall be in microcircuit group number 105 (see MIL-M-38510, appendix E).
3.11 Serialization for device class S. All device class S devices shall be serialized in accordance with MIL-M-38510.
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device class M, sampling and inspection procedures shall be in accordance with section
4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). For device classes B and S, sampling and
inspection procedures shall be in accordance with MIL-M-38510 and method 5005 of MIL-STD-883, except as modified herein.
For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-I-38535 and the device
manufacturer's QM plan.
4.2 Screening. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be
conducted on all devices prior to quality conformance inspection. For device classes B and S, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualification and quality
conformance inspection. For device classes Q and V, screening shall be in accordance with MIL-I-38535, and shall be
conducted on all devices prior to qualification and technology conformance inspection.
SIZE
STANDARDIZED
5962-91677
A
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
SHEET
5
REVISION LEVEL
DESC FORM 193A
JUL 91
4.2.1 Additional criteria for device classes M, B, and S.
a.
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (post-burn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
b.
For device class M, the burn-in test circuit shall be submitted to DESC-ECS for review with the certificate of
compliance. For device classes B and S, the burn-in test circuit shall be submitted to the qualifying activity.
(1) Static burn-in for device class S (method 1015 of MIL-STD-883, test condition A).
(a) All inputs shall be connected to GND. Outputs may be open or connected to 4.5 V minimum. Resistors R1 are
optional on both inputs and outputs, and required on outputs connected to V
For static II burn-in, reverse all input connections (i.e., V to V ).
+0.5 V. R1 = 220 to 47 k .
CC
SS
CC
(b)
V
= 4.5 V minimum.
CC
(c) Ambient temperature (T ) shall be +125 C minimum.
A
(d) Test duration for the static test shall be 48 hours minimum. The 48 hour burn-in shall be broken into two
sequences of 24 hours each (Static I and Static II) followed by interim electrical measurements.
(2) Dynamic burn-in for device classes M, B, and S (method 1015 of MIL-STD-883 test condition D) using the circuit
submitted (see 4.2.1b herein).
c. Interim and final electrical parameters shall be as specified in table IIA herein.
d. For classes S and B devices, post dynamic burn-in electrical parameter measurements may, at the manufacturer's
option, be performed separately or included in the final electrical parameter requirements.
4.2.2 Additional criteria for device classes Q and V.
a. The burn-in test duration, test condition and test temperature or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-I-38535. The burn-in test circuit shall be submitted to
DESC-ECS with the certificate of compliance and shall be under the control of the device manufacturer's TRB in
accordance with MIL-I-38535.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B
of MIL-I-38535 and as detailed in table IIB herein.
4.2.3 Percent Defective Allowable (PDA).
a. The PDA for class S devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in, based on the
exact number of devices submitted to each separate burn-in.
b. The PDA for class B devices shall be in accordance with MIL-M-38510 for dynamic burn-in.
c. Static burn-in I and II failures shall be cumulative for determining PDA.
d. Those devices whose measured characteristics, after burn-in, exceed the specified delta limits or electrical parameter
limits specified in table I, subgroup 1, are defective and shall be removed from the lot. The verified failures divided by
the total number of devices in the lot initially submitted to burn-in shall be used to determine the percent defective for
the lot and the lot shall be accepted or rejected based on the specified PDA.
e. The PDA for device class Q and V shall be in accordance with MIL-I-38535 for dynamic burn-in.
SIZE
STANDARDIZED
5962-91677
A
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
SHEET
6
REVISION LEVEL
DESC FORM 193A
JUL 91
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions 1/
-55 C +125 C
= 4.5 V to 5.5 V
Group A
Device
Limits
Min
Unit
µA
T
subgroups types
C
V
Max
10
CC
unless otherwise specified
Input leakage current
(any input)
I
V
= 0.4 V to V
1,2,3
All
-10
LI
IN CC
Output leakage current
I
R
V , V
= 0.4 V to V
1,2,3
1,2,3
All
All
-10
2.4
10
µA
V
LO
IH OUT
CC
Output logic "1"
voltage
V
I
I
= -2.0 mA
= 8.0 mA
OH
OH
OL
Output logic "0"
voltage
V
1,2,3
1,2,3
All
0.4
V
OL
Active power
supply current 2/
I
f = f maximum, V
CC
= 5.5 V
01
90
135
225
20
mA
CC1
s
02
03
Standby current
2/
I
R = W = RS = FL/RT = V
IH
1,2,3
1,2,3
All
mA
mA
CC2
Power down current
2/
I
All inputs = V
CC
- 0.2 V
All
All
All
All
12
10
10
CC3
Input capacitance
C
V
T
= 0 V, f = 1.0 MHz,
= +25 C, see 4.4.1e
4
4
pF
pF
IN
IN
A
Output capacitance
C
V
A
= 0 V, f = 1.0 MHz,
OUT
OUT
= +25 C, see 4.4.1e
T
Functional tests
Shift frequency
See 4.4.1c
7,8A,8B
9,10,11
f
01
10
15
25
MHz
ns
s
02
03
01
02
03
Read cycle time
t
9,10,11
100
65
RC
40
See footnotes at end of table.
SIZE
STANDARDIZED
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
5962-91677
A
SHEET
7
REVISION LEVEL
DESC FORM 193A
JUL 91
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55 C +125 C
= 4.5 V to 5.5 V
Group A
Device
Limits
Min
Unit
T
subgroups types
C
V
Max
CC
unless otherwise specified
Access time
t
9,10,11
9,10,11
9,10,11
01
02
80
50
30
ns
A
03
Read recovery time
t
01
20
15
10
80
50
30
10
5.0
20
15
5.0
5.0
ns
ns
RR
02
03
Read pulse width
3/
t
01
RPW
02
03
Read low to data
bus low Z
t
9,10,11
9,10,11
01,02
03
ns
ns
RLZ
4/
Write high to data
bus low Z
t
01
WLZ
4/ 5/
02
03
Data valid from read
high
t
9,10,11
9,10,11
9,10,11
All
ns
ns
ns
DV
Read high to data
bus high Z
t
01,02
03
30
20
RHZ
4/
Write cycle time
t
01
100
65
40
80
50
30
20
15
10
WC
02
03
Write pulse width
3/
t
9,10,11
9,10,11
01
ns
ns
WPW
02
03
Write recovery time
t
01
WR
02
03
See footnotes at end of table.
SIZE
STANDARDIZED
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
5962-91677
A
SHEET
8
REVISION LEVEL
DESC FORM 193A
JUL 91
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55 C +125 C
= 4.5 V to 5.5 V
Group A
Device
Limits
Min
Unit
T
subgroups types
C
V
Max
CC
unless otherwise specified
Data setup time
t
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
40
30
18
10
5.0
0
ns
DS
Data hold time
t
ns
ns
ns
ns
ns
ns
ns
ns
DH
Reset cycle time
t
100
65
40
80
50
30
80
50
30
20
15
10
100
65
40
80
50
30
80
50
30
RSC
Reset pulse width
3/
t
RS
Reset setup time
4/
t
RSS
Reset recovery time
Retransmit cycle time
Retransmit pulse
t
RSR
t
RTC
t
RT
width
3/
Retransmit setup
time 4/
t
RTS
See footnotes at end of table.
SIZE
STANDARDIZED
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
5962-91677
A
SHEET
9
REVISION LEVEL
DESC FORM 193A
JUL 91
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55 C +125 C
= 4.5 V to 5.5 V
Group A
Device
Limits
Min
Unit
T
subgroups types
C
V
Max
CC
unless otherwise specified
Retransmit recovery
time
t
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
20
15
10
ns
RTR
Reset to empty flag
low
t
100
65
40
100
65
40
60
45
30
60
45
30
ns
ns
ns
ns
ns
ns
ns
ns
EFL
Reset to HF and FF
high
t
t
,
HFH
FFH
Read low to empty
flag low
t
t
t
t
t
t
REF
RFF
RPE
Read high to full
flag high
Read pulse width
after EF high
80
50
30
Write high to empty
flag high
60
45
30
60
45
30
100
65
40
WEF
WFF
WHF
Write low to full flag
low
Write low to half-full
flag low
See footnotes at end of table.
SIZE
STANDARDIZED
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
5962-91677
A
SHEET
10
REVISION LEVEL
DESC FORM 193A
JUL 91
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55 C +125 C
= 4.5 V to 5.5 V
Group A
Device
Limits
Min
Unit
T
subgroups types
C
V
Max
CC
unless otherwise specified
Read high to half-full
flag high
t
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
01
02
03
01
02
03
01
02
03
01
02
03
01
02
03
100
65
ns
RHF
40
Write pulse width
after FF high
t
80
50
30
ns
ns
ns
ns
WPF
Read/write low to
XO low
t
80
50
30
80
50
30
XOL
Read/write high to
XO high
t
XOH
XI pulse width
3/
t
80
50
30
10
XI
XI recovery time
XI setup time
t
9,10,11
9,10,11
All
ns
ns
XIR
t
01,02
03
15
10
XIS
1/ AC measurements assume transition time 5 ns, input and output timing reference levels = 1.5 V, input levels are
from ground to 3.0 V, and output load C = 30 pF. See figure 3.
L
2/ I
measurements are made with outputs open (only capacitive loading).
CC
3/ Pulse widths less than minimum are not allowed.
4/ If not tested, shall be guaranteed to the limits specified in table I.
5/ Only applies to read data flow-through mode.
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TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/
Subgroups
Subgroups
(per method 5005 table I)
(per MIL-I-38535,
table III)
Line
no.
Test
requirements
Device
class
M
Device
class
B
Device
class
S
Device
class
Q
Device
class
V
1
Interim electrical
parameters
(see 4.2)
1,7,9
1,7,9
1,7,9
1,7,9
2
3
4
5
6
Static burn-in I
method 1015
Not
Not
Required
1*,7*
Not
Required
1*,7*
required
required
required
Same as line 1
Dynamic burn-in
(method 1015)
Required
Required
Required
1*,7*
Required
Required
1*,7*
Same as line 1
Final electrical
parameters
1*,2,3,7*,
8A,8B,9,10, 8A,8B,9,10, 8A,8B,9,
1*,2,3,7*,
1*,2,3,7*,
1*,2,3,7*,
8A,8B,9,10, 8A,8B,9,
1*,2,3,7*,
11
11
10,11
11
10,11
7
8
Group A test
requirements
1,2,3,4**,
1,2,3,4**,
1,2,3,4**,
1,2,3,4**,
1,2,3,4**,
7,8A,8B,9, 7,8A,8B,9, 7,8A,8B,9, 7,8A,8B,9, 7,8A,8B,9,
10,11
10,11
10,11
10,11
10,11
Group B end-point
electrical
parameters
1,2,3,7,
8A,8B,9,
10,11
9
Group C end-point
electrical
parameters
2,3,7,
8A,8B
1,2,3,7,
8A,8B
1,2,3,7,
8A,8B
1,2,3,7,
8A,8B,9,
10,11
10
Group D end-point
electrical
parameters
2,3,7,
8A,8B
2,3,7,
8A,8B
2,3,7,
8A,8B
2,3,7,
8A,8B
2,3,7,
8A,8B
11
Group E end-point
electrical
parameters
1,7,9
1,7,9
1,7,9
1,7,9
1,7,9
1/ Blank spaces indicate tests are not applicable.
2/ Any or all subgroups may be combined when using high-speed testers.
3/ Subgroups 7 and 8 functional tests shall verify the truth tables.
4/ * indicates PDA applies to subgroup 1 and 7.
5/ ** see 4.4.1e.
6/
indicates delta limit (see table IIC) shall be required where specified and the delta values
shall be computed with reference to the previous electrical parameters.
7/ See 4.4.1d.
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TABLE IIB. Additional screening for device class V.
Test
MIL-STD-883, test method
2020
Lot requirement
Particle impact
noise detection
100 percent
Internal visual
2010, condition A or
approved alternate
100 percent
100 percent
Nondestructive
bond pull
2023 or approved alternate
Reverse bias burn-in
Burn-in
1015
100 percent
100 percent
1015, total of 240 hours
at +125 C
Radiographic
2012
100 percent
TABLE IIC. Delta limits at +25 C.
Device types
All
Test 1/
standby
I
I
I
±10 percent of specified value in table I
±10 percent of specified value in table I
±10 percent of specified value in table I
CC2
LO
LI
1/ The above parameter shall be recorded before and after the required
burn-in and life tests to determine the delta
.
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Device types
Case outlines
Terminal number
1
All
X, Y
Terminal symbol
Z
W
NC
W
2
3
4
5
6
D
D
D
D
D
8
3
2
1
0
D
8
D
3
D
2
D
1
7
8
XI
D
0
FF
XI
9
Q
0
FF
10
11
12
13
14
Q
1
Q
0
Q
2
Q
1
Q
3
NC
Q
8
Q
2
GND
Q
3
15
16
17
R
Q
8
Q
4
GND
NC
Q
5
18
19
Q
6
R
Q
Q
7
4
20
21
22
23
24
25
XO/HF
EF
Q
5
Q
6
RS
Q
7
FL/RT
XO/HF
EF
D
7
D
6
RS
26
27
28
29
30
31
32
D
5
FL/RT
NC
D
4
CC
V
D
7
---
---
---
---
D
6
D
5
D
CC
4
V
FIGURE 1. Terminal connections.
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Reset and retransmit
Single device configuration/width expansion mode
Inputs
Internal status
Read pointer
Outputs
Mode
RS RT XI
Write pointer
Location zero
Unchanged
EF FF HF
Reset
0
1
1
X
0
1
0
0
0
Location zero
Location zero
Increment 1/
0
1
1
Retransmit
Read/write
X
X
X
X
X
X
Increment 1/
X = logic "don't care" state
1/ Pointer will increment if flag is high.
Reset and first load
Depth expansion/compound expansion mode
Inputs
Internal status
Read pointer
Outputs
Mode
RS RT XI
Write pointer
EF
0
FF
1
Reset first
device
0
0
1/
Location zero
Location zero
Reset all
other
devices
0
1
1
1/
1/
Location zero
X
Location zero
X
0
1
Read/write
X
X
X
X = logic "don't care" state
1/ XI is connected to XO of previous device.
FIGURE 2. Truth tables.
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AC test conditions
Input pulse levels
Input rise and fall times (t , t )
Input timing reference levels
Output timing reference levels
GND to 3.0 V
5ns
r
f
1.5 V
1.5 V
FIGURE 3. Switching test circuit and waveforms.
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FIGURE 3. Switching test circuit and waveforms - Continued.
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FIGURE 3. Switching test circuit and waveforms - Continued.
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FIGURE 3. Switching test circuit and waveforms - Continued.
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FIGURE 3. Switching test circuit and waveforms. - Continued.
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FIGURE 3. Switching test circuit and waveforms - Continued.
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NOTES:
1. C = 30 pF and includes scope and jig capacitance.
L
2. EF, FF, and HF may change status during reset, but flags will be valid at t
.
RSC
3. W and R = V around the rising edge of RS.
IH
4. EF, FF, and HF may change status during retransmit, but flags will be valid at t
.
RTC
5. For FIFO full condition only, a write cannot begin until completion of a read. Therefore,
t
references the rising edge of FF.
WFF
6. For FIFO empty condition only, a read cannot begin until completion of a write. Therefore,
t
references the rising edge of EF.
REF
FIGURE 3. Switching test circuit and waveforms - Continued.
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4.3 Qualification inspection.
4.3.1 Qualification inspection for device classes B and S. Qualification inspection for device classes B and S shall be in
accordance with MIL-M-38510. Inspections to be performed shall be those specified in method 5005 of MIL-STD-883 and
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). Qualification data for subgroups 7, 8A, and 8B shall
be attributes only.
4.3.1.1 Qualification extension for device classes B and S. When authorized by the qualifying activity, if a manufacturer
qualifies one device type which is identical (i.e., same die), to other device types on this specification, the slower device types
may be part I qualified, upon the request of manufacturer, without any further testing. The faster devices types may be part I
qualified by performing only group A qualification testing.
4.3.2 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-I-38535. Inspections to be performed shall be those specified in MIL-I-38535 and herein for groups A, B,
C, D, and E inspections (see 4.4.1 through 4.4.5).
4.4 Conformance inspection. Quality conformance inspection for device class M shall be in accordance with MIL-STD-883
(see 3.1 herein) and as specified herein. Quality conformance inspection for device classes B and S shall be in accordance
with MIL-M-38510 and as specified herein. Inspections to be performed for device classes M, B, and S shall be those
specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5).
Technology conformance inspection for classes Q and V shall be in accordance with MIL-I-38535 including groups A, B, C, D,
and E inspections and as specified herein except where option 2 of MIL-I-38535 permits alternate in-line control testing.
4.4.1 Group A inspection.
a. Tests shall be as specified in table IIA herein.
b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes B and S,
subgroups 7 and 8 tests shall be sufficient to verify the truth table as approved by the qualifying activity. For device
classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been
fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein).
d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which
may affect the performance of the device. Procedures and circuits shall be maintained under document revision level
control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request.
For device classes B and S, procedures and circuits shall be maintained under document revision level control by the
manufacturer and shall be made available to the qualifying activity upon request. For classes Q and V, procedures
and circuits shall be under the control of the device manufacturer's TRB in accordance with MIL-I-38535 and shall be
made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five
devices with zero failures. Latch-up test shall be considered destructive. JEDEC Standard No. 17 may be used as a
guideline when performing O/V testing.
e. Subgroup 4 (C and C
IN OUT
measurements) shall be measured only for initial qualification and after any process or
design changes which may affect input or output capacitance. Capacitance shall be measured between the
designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and
output terminals tested.
4.4.2 Group B inspection. The group B inspection end-point electrical parameters shall be as specified in table IIA herein.
a. For device class S steady-state life tests shall be conducted using test condition D and the circuit described in 4.2.1b
herein, or equivalent as approved by the qualifying activity.
b. For device class S only, end-point electrical parameters shall be as specified in table IIA herein. Delta limits shall
apply only to subgroup 5 of group B inspections and shall consist of tests specified in table IIC herein.
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4.4.3 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
Delta limits shall apply only to subgroup 1 of group C inspection and shall consist of tests specified in table IIC herein.
4.4.3.1 Additional criteria for device classes M and B. Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition D. For device class M, the test circuit shall be submitted to DESC-ECS for review with the certificate of
compliance. For device classes B and S, the test circuit shall be submitted to the qualifying activity.
b.
T = +125 C, minimum.
A
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.3.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test
temperature or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-I-38535. The steady-state life test circuit shall be submitted to DESC-ECS with the certificate of compliance and shall be
under the control of the device manufacturer's TRB in accordance with MIL-I-38535.
4.4.4 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.5 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein). RHA levels for device classes B, S, Q, and V shall be M, D, R, and H and for device class M shall
be M and D. RHA quality conformance inspection sample tests shall be performed at the RHA level specified in the
acquisition document or to a higher qualified level. RHA tests for device classes Q and V shall be performed in accordance
with MIL-I-38535 and 1.2.1 herein.
a. RHA tests for device classes B, S, Q, and V for levels M, D, R, and H or for device class M for levels M and D shall be
performed through each level to determine at what levels the devices meet the RHA requirements. These RHA tests
shall be performed for initial characterization and after design or process changes which may affect the RHA
performance of the device.
b. End-point electrical parameters shall be as specified in table IIA herein. RHA samples need not be tested at -55 C or
+125 C prior to total dose irradiation.
c. Prior to total dose irradiation, each selected sample shall be assembled in its qualified package. The samples shall
pass the specified group A electrical parameters for subgroups specified in table IIA herein. Additionally for classes Q
and V, quality conformance inspection may be at wafer level.
d. The devices shall be subjected to radiation hardness assured tests as specified in MIL-M-38510, (device classes M,
B, and S) and MIL-I-38535, (device classes Q and V) for the RHA level being tested, and meet the postirradiation
end-point electrical parameter limits as defined in table I at T = +25 C ±5 C, after exposure.
A
e. Prior to and during total dose irradiation testing, the devices shall be biased to worst case conditions established
during characterization.
f. Single Event Phenomena (SEP) testing, shall be performed on all class S and V devices. SEP testing shall be
performed at initial qualification and after any design or process changes which may affect the upset or latch-up
characteristics of the device. Test four devices with zero failures. ASTM standard F1192-88 may be used as a
guideline when performing SEP testing. For device class V, the device parametrics that influence a single event upset
immunity shall be monitored at the wafer level as part of a TRB approved wafer level hardness plan. The test
conditions for SEP are as follows:
(1) The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e.
0
angle 60 ). No shadowing of the ion beam due to fixturing or package related effects is allowed.
7
2
(2) The fluence shall be greater than 100 errors or 10 ions/cm .
2
5
2
(3) The flux shall between 10 and 10 ion/cm /s. The cross section shall be verified to be flux independent by
measuring the cross section at two flux rates which differ by at least an order of magnitude.
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(4) The particle range shall be 20 microns in silicon.
(5) The test temperature shall be +25 C and the maximum rated operating temperature ±10 C.
(6) Bias conditions shall be V
measurements.
= 4.5 V dc for the upset measurements and V
= 5.5 V dc for the latch-up
CC
CC
g. For device classes M, B, and S, subgroups 1 and 2 of table V method 5005 of MIL-STD-883 shall be tested as
appropriate for device construction.
h. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-I-38535. Device parametric parameters that influence upset immunity
shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-I-38535.
i. Transient dose rate survivability testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-I-38535. Device parametric parameters that influence latch-up and device
burn-out shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-I-
38535.
j. When specified in the purchase order or contract, a copy of the following additional data shall be supplied.
(1) RHA delta limits.
(2) RHA upset levels.
(3) Test conditions (SEP).
(4) Number of upsets (SEP).
(5) Number of transients.
(6) Occurrence of latch-up.
4.5 Delta measurements for device classes B, S, Q, and V. Delta measurements, as specified in table IIA, shall be made
and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The
electrical parameters to be measured, with associated delta limits are listed in table IIC.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-M-38510 for device classes
M, B, and S and MIL-I-38535 for device classes Q and V.
6. NOTES
(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.)
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a
contractor-prepared specification or drawing.
6.1.2 Substitutability. Device classes B and Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished in accordance with MIL-STD-481 using DD Form 1693,
Engineering Change Proposal (Short Form).
6.3 Record of users. Military and industrial users shall inform Defense Electronics Supply Center
when a system application requires configuration control and which SMD's are applicable to that system. DESC will maintain
a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings
covering microelectronic devices (FSC 5962) should contact DESC-ECS, telephone (513) 296-6047.
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6.4 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or
telephone (513) 296-5377.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-M-38510, MIL-STD-1331, and as follows:
C , C
- - - - - - - -
GND - - - - - - - - - - -
Input and bidirectional output, terminal-to-GND capacitance.
Ground zero voltage potential.
Supply current.
IN OUT
I
I
I
- - - - - - - - - - -
CC
LI
LO
- - - - - - - - - - -
- - - - - - - - - - -
Input leakage current.
Output leakage current.
T - - - - - - - - - - - -
Case temperature.
C
T - - - - - - - - - - - -
A
Ambient temperature.
V
- - - - - - - - - - -
Positive supply voltage.
CC
6.5.2 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input
requirements are specified from the external system point of view. Thus, address setup is shown as a minimum since the
system must supply at least that much time (even though most devices do not require it). On the other hand, responses from
the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never
provides data later than that time.
6.5.3 Waveforms.
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6.6 One part - one part number system. The one part - one part number system described below has been developed to
allow for transitions between identical generic devices covered by the four major microcircuit requirements documents
(MIL-M-38510, MIL-H-38534, MIL-I-38535, and 1.2.1 of MIL-STD-883) without the necessity for the generation of unique
PIN's. The four military requirements documents represent different class levels, and previously when a device manufacturer
upgraded military product from one class level to another, the benefits of the upgraded product were unavailable to the
Original Equipment Manufacturer (OEM), that was contractually locked into the original unique PIN. By establishing a one
part number system covering all four documents, the OEM can acquire to the highest class level available for a given generic
device to meet system needs without modifying the original contract parts selection criteria.
Example PIN
under new system
Manufacturing
source listing
Document
listing
Military documentation format
New MIL-M-38510 Military Detail
Specifications (in the SMD format)
5962-XXXXXZZ(B or S)YY QPL-38510
(Part 1 or 2)
MIL-BUL-103
MIL-BUL-103
MIL-BUL-103
MIL-BUL-103
New MIL-H-38534 Standardized Military
Drawings
5962-XXXXXZZ(H or K)YY QML-38534
New MIL-I-38535 Standardized Military
Drawings
5962-XXXXXZZ(Q or V)YY QML-38535
New 1.2.1 of MIL-STD-883 Standardized
Military Drawings
5962-XXXXXZZ(M)YY
MIL-BUL-103
6.7 Sources of supply.
6.7.1 Sources of supply for device classes B and S. Sources of supply for device classes B and S are listed in QPL-38510.
6.7.2 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DESC-ECS and
have agreed to this drawing.
6.7.3 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-BUL-103.
The vendors listed in MIL-BUL-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DESC-ECS.
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STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN
DATE: 92-09-25
Approved sources of supply for SMD 5962-91677 are listed below for immediate acquisition only and shall be added to
MIL-BUL-103 during the next revision. MIL-BUL-103 will be revised to include the addition or deletion of sources. The
vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by
DESC-ECS. This bulletin is superseded by the next dated revision of MIL-BUL-103.
Standardized
military drawing
PIN
Vendor
CAGE
number
Vendor
similar
PIN 1/
5962-9167701MXX
5962-9167701MYX
5962-9167701MZX
61722
61722
61722
IDT7205L80DB
IDT7205L80TCB
IDT7205L80LB
5962-9167702MXX
5962-9167702MYX
5962-9167702MZX
61722
61722
61722
IDT7205L50DB
IDT7205L50TCB
IDT7205L50LB
5962-9167703MXX
5962-9167703MYX
5962-9167703MZX
61722
61722
61722
IDT7205L30DB
IDT7205L30TCB
IDT7205L30LB
1/ Caution. Do not use this number for item acquisition. Items
acquired to this number may not satisfy the performance
requirements of this drawing.
Vendor CAGE
number
Vendor name
and address
61722
Integrated Device Technology, Incorporated
1566 Moffett Boulevard
Salinas, CA 93905
Point of contact: 3236 Scott Boulevard
Santa Clara, CA 95054
The information contained herein is disseminated for convenience only and
the Government assumes no liability whatsoever for any inaccuracies in this
information bulletin.
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