HM065787H-2 [TEMIC]
Standard SRAM, 64KX1, 25ns, CMOS,;
| 型号： | HM065787H-2 |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Standard SRAM, 64KX1, 25ns, CMOS, 静态存储器 内存集成电路 |
| 文件： | 总9页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MATRA MHS
HM 65787
64 K × 1 High Speed CMOS SRAM
Introduction
The HM 65787 is a high speed CMOS static RAM Easy memory expansion is provided by an active low chip
organized as 65536 × 1 bit. It is manufactured using select (CS) and three state drivers.
MHS’s high performance CMOS technology.
All inputs and outputs of the HM 65787 are TTL
Access times as fast as 15 ns are available with maximum
power consumption of only 495 mW.
compatible and operate from single 5V supply thus
simplifying system design.
The HM 65787 features fully static operation requiring no
external clocks or timing strobes. The automatic
power-down feature reduces the power consumption by
60 % when the circuit is deselected.
The HM 65787 is processed following the test methods of
MIL STD 883.
Features
D Fast access time
D 300 mils width package
D TTL compatible inputs and outputs
D Asynchronous
Commercial : 15/20/25/35/45 ns
Industrial military : 20/25/35/45/55 ns
D Low power consumption
Active : 320 mW (typ)
D Capable of withstanding greater than 2000 V electrostatic
discharge
Standby : 75 mW (typ)
D Single 5 volt supply
D Wide temperature range :
–55°C to + 125°C
Interface
Block Diagram
Rev. C (16/12/94)
1
HM 65787
MATRA MHS
Pin Configuration
Plastic 300 mils, 22 pins, DIL
Ceramic 300 mils, 22 pins, DIL
SOIC & SOJ 300 mils, 24 pins
Pinout DIL 22 pins (top view)
Pinout SOIC/SOJ 24 pins
Pinout LCC 22 pins (top view)
Logic Symbol
Pin Names
A –A : Address inputs
W
: Write enable
: Power
0
15
Din
: Input
Vcc
Dout
CS
: Output
GND : Ground
: Chip Select
Truth Table
CS
H
W
X
DATA–IN
DATA–OUT
MODE
Deselect
Read
Z
Z
Z
Valid
Z
L
H
L
L
Valid
Write
L = Low – H = High, X = H or L, Z = High impedance.
2
Rev. C (16/12/94)
MATRA MHS
HM 65787
Electrical Characteristics
Absolute Maximum Ratings
Supply voltage to GND potential : . . . . . . . . . . . . . . . –0.5 V to +7.0 V
DC input voltage : . . . . . . . . . . . . . . . . . . . . . . . . . . . –3.0 V to +7.0 V
DC output voltage in high Z state : . . . . . . . . . . . . . . –0.5 V to +7.0 V
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Output current into outputs (low) : . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Electro Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . > 2000 V
(MIL STD 883C METHOD 3015-2)
Operating Range
OPERATING VOLTAGE
OPERATING TEMPERATURE
– 55_C to + 125_C
Military
(– 2)
(– 9)
(– 5)
5 V ± 10 %
5 V ± 10 %
5 V ± 10 %
Industrial
Commercial
– 40_C to + 85_C
0_C to + 70_C
Recommended DC Operating Conditions
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
Vcc
Supply Voltage
4.5
0.0
5.0
0.0
0.0
–
5.5
0.0
0.8
5.5
V
V
V
V
Gnd
VIL
VIH
Ground
Input low voltage
Input high voltage
– 3.0
2.2
Capacitance
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
pF
Cin
(1)
(1)
Input capacitance
Output capacitance
–
–
–
–
5
7
Cout
pF
Note :
1. TA = 25°C, f = 1 MHz, Vcc = 5.0 V. These parameters are not 100 % tested.
DC Parameters
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
µA
µA
mA
V
IIX
(2)
Input leakage current
– 10.0
– 10.0
–
–
–
–
–
–
10.0
10.0
– 350.0
0.4
IOZ
IOS
(3)
Output leakage current
Output short circuit current
Output low voltage
(3)
(4)
(5)
VOL
VOH
–
Output high voltage
2.4
–
V
Note :
2. Gnd < Vin < Vcc, Gnd < Vout < Vcc Output disabled.
3. Vcc = max, Vout = Gnd, duration of the short circuit should not exceed 30 seconds.
4. Vcc min, IOL = 12.0 mA (commercial) 8.0 mA (military).
5. Vcc min, IOH = –4.0 mA.
Rev. C (16/12/94)
3
HM 65787
MATRA MHS
Consumption for Commercial (–5) Specification
65787
E–5
65787
F–5
65787
H–5
65787
K–5
65787
M–5
SYMBOL
PARAMETER
UNIT
VALUE
ICCSB
ICCSB1
ICCOP
(6)
Standby supply current
Standby supply current
Dynamic operating current
40
20
90
40
20
80
30
20
80
30
20
80
30
20
80
mA
mA
mA
max
max
max
(7)
(8)
Consumption for Industrial (–9) and Military (–2) Specification
65787
F–9/–2
65787
H–9/–2
65787
K–9/–2
65787
M–9/2
65787
N–9/–2
SYMBOL
PARAMETER
UNIT
VALUE
ICCSB
ICCSB1
ICCOP
(6)
Standby supply current
Standby supply current
Dynamic operating current
40
20
90
40
20
80
30
20
80
30
20
80
30
20
80
mA
mA
mA
max
max
max
(7)
(8)
Note :
6. CS ≥ VIH min duty cycle = 100 %, a pull-up resistor to Vcc on the CS input is required to keep the device deselected during Vcc
power-up otherwise ICCSB will exceed values given above.
7. CS = Vcc – 0.3 V Iout = 0 mA.
8. Vcc max, Output current = 0 mA, f = max, Vin = Vcc or Gnd.
AC Parameters
AC Conditions
Input pulse levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gnd to 3.0 V
Input timing reference levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Input rise : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ns
Output loading IOL/IOH (see figure 1a) : . . . . . . . . . . . . . . . . . +30 pF
AC Test Loads and Waveforms
Figure 1
a
Figure 1 b
Figure 2
4
Rev. C (16/12/94)
MATRA MHS
HM 65787
Write Cycle : Commercial (–5) Specification
65787
65787
F–5
65787
H–5
65787
K–5
65787
SYMBOL
PARAMETER
UNIT
VALUE
E–5
15
0
M–5
40
0
TAVAV
Write cycle time
20
0
20
0
25
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
min
min
min
min
max
min
min
min
min
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ(8)
TWLWH
TWHAX
TWHDX
TWHQX
Address set–up time
Address valid to end of write
Data set–up time
12
10
12
7
15
10
15
7
20
10
20
7
25
15
25
10
20
0
30
15
30
15
20
0
CS low to write end
Write low to high Z
Write pulse width
12
0
15
0
15
0
Address hold from end of write
Data hold time
0
0
0
0
0
(8) Write high to low Z
5
5
5
5
5
Write Cycle : Industrial (–9) and Military (–2) Specification
65787
F–9/–2
65787
65787
65787
65787
SYMBOL
PARAMETER
UNIT
VALUE
H–9/–2 K–9/–2 M–9/–2 N–9/–2
TAVAV
Write cycle time
20
0
20
0
25
0
40
0
50
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
min
min
min
min
max
min
min
min
min
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ(8)
TWLWH
TWHAX
TWHDX
TWHQX
Address set–up time
Address valid to end of write
Data set–up time
15
10
15
7
20
10
20
7
25
15
25
10
20
0
30
15
30
15
20
0
40
20
40
15
25
0
CS low to write end
Write low to high Z
Write pulse width
15
0
15
0
Address hold from end of write
Data hold time
0
0
0
0
0
(8) Write high to low Z
5
5
5
5
5
Note :
8. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
Rev. C (16/12/94)
5
HM 65787
MATRA MHS
Write Cycle 1 (W Controlled)
Write Cycle 2 (CS controlled)
6
Rev. C (16/12/94)
MATRA MHS
HM 65787
Read Cycle : Commercial (–5) Specification
65787
65787
F–5
65787
H–5
65787
K–5
65787
SYMBOL
PARAMETER
UNIT
VALUE
E–5
15
15
3
M–5
45
45
3
TAVAV
Read cycle time
20
20
3
25
25
3
35
35
3
ns
ns
ns
ns
ns
ns
ns
ns
min
max
min
max
min
max
min
max
TAVQV
TAVQX
TELQV
TELQX
TEHQZ
TELIC
Address access time
Address valid to low Z
Chip–select access time
CS low to low Z
15
5
20
5
25
5
35
5
45
5
CS high to high Z
8
8
10
0
15
0
15
0
CS low to power up
CS high to power down
0
0
TEHICL
15
20
20
20
25
Read Cycle : Industrial (–9) and Military (–2) Specification
65787
F–9/–2
65787
65787
65787
65787
SYMBOL
PARAMETER
UNIT
VALUE
H–9/–2 K–9/–2 M–9/–2 N–9/–2
TAVAV
Read cycle time
20
20
3
25
25
3
35
35
3
45
45
3
55
55
3
ns
ns
ns
ns
ns
ns
ns
ns
min
min
min
min
min
min
min
min
TAVQV
TAVQX
TELQV
TELQX
TEHQZ
TELIC
Address access time
Address valid to low Z
Chip–select access time
CS low to low Z
20
5
25
5
35
5
45
5
55
5
CS high to high Z
8
10
0
15
0
15
0
20
0
CS low to power up
CS high to power down
0
TEHICL
20
20
20
25
30
Rev. C (16/12/94)
7
HM 65787
MATRA MHS
Read Cycle nb 1
Read Cycle nb 2
Burn-In Schematics
VCC = 5 V (– 0, + 0.5)
R = 1 kΩ per pin
FO = 91.6 KHz ± 20 %
Fn = 1/2 F n–1
S0 & S2 : programmable signals for write/read cycles
NC = Non connected.
8
Rev. C (16/12/94)
MATRA MHS
HM 65787
Ordering Information
PACKAGE
DEVICE
65787
GRADE
F
LEVEL
-5 : R
HM
3
64 k × 1 high speed
–2 : Military
–5 : Commercial
static RAM
–6 : 100% 25°C Probe
–9 : Industrial
/883 : MIL STD 883 Class B or S
DB : Dice Military program
0 –Chip form
1 –Ceramic 22 pins 300 mils
3 –Plastic 22 pins 300 mils
4 –LCC 22 pins rectangular
T–SOIC 24 pins 300 mils
U –SOJ 24 pins 300 mils
E = 15 ns
F = 20 ns
H = 25 ns
K = 35 ns
M = 45 ns
N = 55 ns
R
: Tape & Reel option
RD : Tape & Reel/Dry pack option
: Dry pack option
D
The information contained herein is subject to change without notice. No responsibility is assumed by MATRA MHS SA for using this publication
and/or circuits described herein : nor for any possible infringements of patents or other rights of third parties which may result from its use.
Rev. C (16/12/94)
9
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