HM3E65728BH-5:D [TEMIC]
Standard SRAM, 2KX8, 25ns, CMOS, PDIP24, 0.600 INCH, PLASTIC, DIP-24;
| 型号： | HM3E65728BH-5:D |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Standard SRAM, 2KX8, 25ns, CMOS, PDIP24, 0.600 INCH, PLASTIC, DIP-24 静态存储器 光电二极管 |
| 文件： | 总8页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MATRA MHS
HM 65728B
2K × 8 High Speed CMOS SRAM
Description
The HM 65728B is a high speed CMOSstatic RAM Easy memory expansion is provided by an active low chip
organized as 2048 × 8 bits. It is manufactured using select (CS) and active low output enable (OE) and three
MHS’s high performance CMOS technology.
state drivers.
All inputs and outputs of the HM 65728 are TTL
compatible and operate from single 5V supply thus
simplifying system design.
Access times as fast as 25 ns are available with maximum
power consumption of only 600 mW.
The HM 65728B features fully static operation requiring
no external clocks or timing strobes. The automatic
power-down feature reduces the power consumption by
80 % when the circuit is deselected.
The HM 65728B is 100 % processed following the test
methods of MIL STD 883 and/or ESA/SCC 9000 making
it ideally suitable for military/space applications that
demand superior levels of performance and reliability.
Features
D Fast Access Time
D 300 and 600 Mils Width Package
D TTL Compatible Inputs and Outputs
D Asynchronous
Commercial : 25/35/45/55 ns (max)
Military : 25/35/45/55 ns (max)
D Low Power Consumption Active :
550 mW (max)
D Capable of Withstanding Greater than 2000 V Electrostatic
Discharge
Standby : 110 mW (max)
D Wide Temperature Range :
–55°C to + 125°C
D Single 5 Volt Supply
Interface
Block Diagram
Rev. C (16/08/95)
1
This datasheet has been downloaded from http://www.digchip.com at this page
HM 65728B
MATRA MHS
Pin Configuration
Ceramic 300 mils, 24 pins, DIL
Plastic 300 & 600 mils, 24 pins, DIL
SOIC 300 mils, 24 pins
LCC, 32 pins
Pinout DIL/SOIC 24 pins (top view)
Pinout LCC 32 pins (top view)
Logic Symbol
Pin Names
A0–A10: Address inputs
I/O0–I/O7 : Input/Output
CS
OE
W
: Chip Select
: Output Enable
: Write enable
Vcc
Gnd
: Power
: Ground
Truth Table
CS OE
W
X
H
L
DATA–IN
DATA–OUT
MODE
Deselect
Read
H
L
L
L
X
L
H
L
Z
Z
Valid
Z
Z
Valid
Valid
Write
L
Z
Write
2
Rev. C (16/08/95)
MATRA MHS
HM 65728B
Electrical Characteristics
Supply voltage to GND potential : . . . . . . . . . . . . . . . –0.5 V to +7.0 V
DC input voltage : . . . . . . . . . . . . . . . . . . . . . . . . . . . –3.0 V to +7.0 V
DC output voltage in high Z state : . . . . . . . . . . . . . . –0.5 V to +7.0 V
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Output current into outputs (low) : . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Electro Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . > 2000 V
(MIL STD 883 METHOD 3015.2)
Operating Range
OPERATING VOLTAGE
OPERATING TEMPERATURE
– 55_C to + 125_C
Military
(– 2)
– A
5 V ± 10 %
5 V ± 10 %
5 V ± 10 %
5 V ± 10 %
Automotive
Industrial
Commercial
– 40_C to + 125_C
– 40_C to + 85_C
0_C to + 70_C
(– 9)
(– 5)
Recommended DC Operating Conditions
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
Vcc
Supply Voltage
4.5
0.0
5.0
0.0
0.0
–
5.5
0.0
0.8
5.5
V
V
V
V
Gnd
VIL
VIH
Ground
Input low voltage
Input high voltage
– 0.3
2.2
Capacitance
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
pF
Cin
(1)
(1)
Input capacitance
Output capacitance
–
–
–
–
5
7
Cout
pF
Note :
1. TA = 25°C, f = 1 MHz, Vcc = 5.0 V, these parameters are not tested.
DC Parameters
PARAMETER
DESCRIPTION
MINIMUM
TYPICAL
MAXIMUM
UNIT
µA
µA
mA
V
IIX
(2)
Input leakage current
– 10.0
– 10.0
–
–
–
–
–
–
10.0
10.0
– 300.0
0.4
IOZ
IOS
(3)
Output leakage current
Output short circuit current
Output low voltage
(3)
(4)
(5)
VOL
VOH
–
Output high voltage
2.4
–
V
Note :
2. Gnd < Vin < Vcc, Gnd < Vout < Vcc Output disabled.
3. Vcc = max, Vout = Gnd, duration of the short circuit should not exceed 30 seconds. Not more than 1 output should be
shorted at one time.
4. Vcc min, IOL = 8.0 mA.
5. Vcc min, IOH = -4.0 mA.
Rev. C (16/08/95)
3
HM 65728B
MATRA MHS
Consumption for Commercial (–5) Specification
65728B
H–5
65728B
K–5
65728B
M–5
65728B
N–5
SYMBOL
PARAMETER
UNIT
VALUE
ICCSB
ICCOP
(6) Standby supply current
20
20
20
30
mA
mA
max
max
(7) Dynamic operating current
100
100
100
100
Consumption for Military (–2) Automotive (–A), Industrial (–9) Specification
65728B
H–2/A/9
65728B
K–2/A/9
65728B
M–2/A/9
65728B
N–2/A/9
SYMBOL
PARAMETER
UNIT
VALUE
ICCSB
ICCOP
(6) Standby supply current
40
30
30
30
mA
mA
max
max
(7) Dynamic operating current
120
120
120
120
Note :
6. CS ≥ VIH, a pull-up resistor to Vcc on the CS input is required to keep the device deselected during Vcc power-up otherwise
ICCSB will exceed values above.
7. Vcc max, Output current = 0 mA, f = max, Vin = Vcc or Gnd.
AC Parameters
AC Conditions
Input pulse levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gnd to 3.0 V
Input timing reference levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Input rise : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ns
Output loading IOL/IOH (see figure 1a and 1b) : . . . . . . . . . . . +30 pF
AC Test Loads and Waveforms
Figure 1
a
Figure 1 b
Figure 2
4
Rev. C (16/08/95)
MATRA MHS
HM 65728B
Write Cycle : Commercial (–5) Specification
65728B
65728B
K–5
65728B
M–5
65728B
SYMBOL
PARAMETER
UNIT
VALUE
H–5
25
0
N–5
55
0
TAVAV
Write cycle time
35
0
45
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
min
min
min
min
max
min
min
min
min
min
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ(8)
TWLWH
TWHAX
TWHDX
TWHQX
TEHAX
Address set–up time
Address valid to end of write
Data set–up time
20
15
20
10
20
2
30
15
30
15
20
2
40
20
40
15
20
2
50
25
50
20
30
2
CS low to write end
Write low to high Z
Write pulse width
Address hold to end of write
Data hold time
0
0
0
5
(8, 9)
Write high to low Z
Address hold end CS
3
0
0
0
3
3
3
3
Notes : 8. The data input set up and hold timing should be referenced to the rising edge of the signal that terminates the write.
9. At any given temperature and voltage condition, TWHQX is less than TWLQZ for all devices. These parameters are sampled
and not 100 % tested.
Write Cycle : Military (–2) Automotive (–A) Industrial (–9) Specification
65728B
H–2
65728B
K–2
65728B
M–2
65728B
N–2
SYMBOL
PARAMETER
UNIT
VALUE
TAVAV
Write Cycle time
25
0
35
0
45
0
55
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
min
min
min
min
max
min
min
min
min
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ(8)
TWLWH
TWHAX
TWHDX
TEHAX
Address set–up time
Address valid to end of write
Data set–up time
20
15
20
10
20
2
30
15
30
15
20
2
40
20
40
15
25
2
50
25
50
20
30
2
CS low to write end
Write low to high Z
Write pulse width
Address hold to end of write
Data hold time
5
5
5
5
Address hold end CS
3
3
3
3
Rev. C (16/08/95)
5
HM 65728B
MATRA MHS
Write Cycle 1 (W Controlled)
Write Cycle 2 (CS controlled)
6
Rev. C (16/08/95)
MATRA MHS
HM 65728B
Read Cycle : Commercial (–5) Specification
65728B
H–5
65728B
K–5
65728B
M–5
65728B
SYMBOL
PARAMETER
UNIT
VALUE
N–5
55
55
5
TAVAV
Read cycle time
25
25
5
35
35
5
45
45
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
max
min
max
min
max
min
max
max
min
max
TAVQV
TAVQX
TELQV
TELQX
TEHQZ
TELIC
Address access time
Address valid to low Z
Chip–select access time
CS low to low Z
25
5
35
5
45
5
55
5
CS high to high Z
12
0
15
0
20
0
20
0
CS low to power up
CS high to power down
Output enable access time
OE low to low Z
TEHICL
TGLQV
TGLQX
TGHQZ
15
15
2
20
15
0
25
20
0
25
25
0
OE high to high Z
10
15
15
20
Read Cycle : Military (–2) Automotive (–A) Industrial (–9) Specification
65728B
H–2
65728B
K–2
65728B
M–2
65728B
N–2
SYMBOL
PARAMETER
UNIT
VALUE
TAVAV
Read cycle time
25
25
5
35
35
5
45
45
5
55
55
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
min
max
min
max
min
max
min
max
max
min
max
TAVQV
TAVQX
TELQV
TELQX
TEHQZ
TELIC
Address access time
Address valid to low Z
Chip–select access time
CS low to low Z
25
5
35
5
45
5
55
5
CS high to high Z
12
0
15
0
20
0
20
0
CS low to power up
CS high to power down
Output enable access time
OE low to low Z
TEHICL
TGLQV
TGLQX
TGHQZ
20
15
0
20
15
0
25
20
0
25
25
0
OE high to high Z
12
15
15
20
Rev. C (16/08/95)
7
HM 65728B
MATRA MHS
Read Cycle nb 1
Read Cycle nb 2
Ordering Information
PACKAGE
DEVICE TYPE
65728B
GRADE
H
LEVEL
-5 : R
HM
3
0 –Chip form
8 k × 8 high speed
–2
–5
–6
–9
: Military
1 –Ceramic 24 pins
3 –Plastic 24 pins
300 mils
3E–Plastic 24 pins
600 mils
static RAM
: Commercial
: 100% 25°C Probe
: Industrial
–A : Automotive
/883 : MIL STD 883 Class B or S
DB : Dice Military program
4 –LCC 32 pins
T –SOIC 24 pins 300 mils
H = 25 ns
K = 35 ns
M = 45 ns
N = 55 ns
R
: Tape & Reel option
RD : Tape & Reel/Dry pack option
: Dry pack option
D
The information contained herein is subject to change without notice. No responsibility is assumed by MATRA MHS SA for using this publication
and/or circuits described herein : nor for any possible infringements of patents or other rights of third parties which may result from its use.
8
Rev. C (16/08/95)
相关型号：
©2020 ICPDF网 联系我们和版权申明