U2762B [TEMIC]
900-MHz ISM Band Receiver; 900 - MHz的ISM频段接收器型号: | U2762B |
厂家: | TEMIC SEMICONDUCTORS |
描述: | 900-MHz ISM Band Receiver |
文件: | 总9页 (文件大小:293K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
U2762B
900-MHz ISM Band Receiver
Description
The receiver IC U2762B-B is specifically designed for U2781B, a complete ISM RF IC kit is available which fits
cordless telephone applications in the 900-MHz ISM perfectly with AMD’s PhoX controllers AM79C432A
band. It is manufactured using TEMIC’s advanced UHF and AM79C433.
process. The IC consists of a 900-MHz RF amplifier and
mixer, 10.7-MHz IF amplifier, limiter, RSSI, quadrature
Electrostatic sensitive device.
demodulator and comparator for the bit-slicer function.
Observe precautions for handling.
The device features 2.9-V operation. In conjunction with
TEMIC’s transmitter IC U2763B-B and the PLL
Features
Benefits
Single-conversion receiver with 10.7-MHz IF
Low filter costs due to 10.7-MHz single conversion
Comparator for bit slicer integrated
Very low count of external components saves PCB
space and costs
Temperature-compensated RSSI with 65 dB
dynamic range
Low current consumption results in very long
stand-by time of approximately 7 days
Supply-voltage range 2.7 V to 3.3 V
Only 17 mA typical current consumption
Few external components
SSO28 package
Block Diagram
V
LO
LO
in
GND1
25
A2
out
V
Lim1 Lim1 Lim1 GND3 Lim2 Lim2 DEM
DEM
CC1
CC2
REF
in
REF
out
in
REF NTank Tank
28
27
26
24
23
22
21
20
19
18
17 16 15
Mix
A1
A2
Demo–
dulator
RSSI
Vcc/2
+
–
Compa–
rator
10 kΩ
1
2
3
5
6
9
11
12
4
7
8
10
13
14
NC
RSSI
A1
REF
A1
in
GND2 Mix
out
V
A2
in
A2
REF
Data
out
Com
Nin
Com
in
SL
in
DEM
out
CC3
13951
Figure 1. Block diagram
Ordering Information
Extended Type Number
U2762B-BFS
Package
SSO28
SSO28
Remarks
Tubes, MOQ 600 pcs
Taped and reeled, MOQ 4000 pcs
U2762B-BFSG3
Rev. A3, 10-Jun-98
1 (9)
Preliminary Information
U2762B
Pin Description
Pin
1
2
Symbol
NC
RSSI
Function
Not connected
Signal-strength indicator
1
28
NC
V
CC1
RSSI 2
27
26
LO REF
LO in
3
4
5
A1 REF RF reference
A1 in
RF input
A1 REF 3
GND2
IF ground
6
Mix out Mixer output
GND1
A2 out
4
5
6
7
8
9
25
24
A1 in
GND2
Mix out
7
8
9
10
11
12
13
14
15
16
V
A2 in
IF and AF power supply
IF amplifier A2 input
CC3
A2 REF IF amplifier A2 reference
Data out Data output
Com Nin Comparator reference
Com in Comparator input / slicer output
23
22
V
CC2
V
CC3
SL in
Slicer input
Lim1 in
DEM out Demodulator output
DEM Tank Quadrature filter
DEM
NTank
Lim2 REF Limiter2 reference
Lim2 in Limiter2 input
GND3
Lim1 out Limiter1 output
Lim1 REF Limiter1 reference
Lim1 in Limiter1 input
A2 in
A2 REF
Data out
Com Nin
Com in
SL in
Lim1 REF
Lim1 out
21
20
19
18
Quadrature filter
17
18
19
20
21
22
23
24
25
26
27
28
GND3
10
11
12
IF and AF Ground
Lim2 in
Lim2 REF
DEM NTank
DEM Tank
17
16
V
CC2
IF power supply 1
IF amplifier A2 output
RF ground
A2 out
GND1
LO in
13
Local oscillator input
DEM out 14
15
LO REF Local oscillator reference
RF power supply
13960
V
CC1
Figure 2. Pinning
Functional Description
RF Amplifier / Mixer
Demodulator
The quadrature demodulator in the receiving path
contains an internal 7-pF quadrature capacitor to couple
the IF signal to the external tank providing the 90-degree
phase shift. The tank may be either an LC-tank circuit or
an alignment-free discrete ceramic resonator.
The RF amplifier / mixer down-converts the antenna
signal to the IF frequency. It has asymmetrical RF and IF
ports. The LO input includes an amplifier for good sensi-
tivity and can be used in a symmetrical- as well as an
asymmetrical configuration.
Bit-Slicer Amplifier and Comparator
IF Amplifier A2
The bit-slicer limits the baseband signal. Furthermore it
eliminates the DC-offset by an AC-coupled lowpass filter
to the demodulator output. A second lowpass filter
recovers the exact comparator threshold value of the
An additional gain stage enables an application-specific
insertion point for IF filtering.
Limiter 1 / 2
The two-stage limiting amplifier is designed to be bit-slicer’s output. The time constants of both lowpass
directly coupled to low-cost 10.7-MHz ceramic IF filters filters can be selected independently from each other to
in front of each stage. The total dynamic range is 65 dB.
optimize power-up timing.
2 (9)
Rev. A3, 10-Jun-98
Preliminary Information
U2762B
Absolute Maximum Ratings
Parameters
Symbol
Value
0 to 3.5
Unit
V
Supply voltage
Input voltages
Input voltages
Pins 7, 23, 28
V
CC
Pins 1, 2, 6, 10, 14, 20 and 24
Pins 3, 4, 8, 9, 11, 12, 13,15, 16,
18, 21, 22, 26 and 27
V
V
in
0 to V
V
V
in
CC
0 to V – 1 V
CC
Junction temperature
Storage temperature
T
T
stg
125
–40 to +125
C
C
j
Thermal Resistance
Parameters
Symbol
R
thJA
Value
130
Unit
K/W
Junction ambient
SSO28
Operating Range
Parameters
Symbol
V
S
Value
2.7 to 3.3
0 to 70
Unit
V
C
Supply voltage
Ambient temperature
T
amb
Electrical Characteristics Cascaded A1 and MX1
Temperature range: 0 C to 70 C
Parameters
Supply-voltage range
Supply current
A1MX1 turn-on time
RF input impedance
RF input SWR
RF input frequency
LO input impedance
LO input frequency
Test Conditions / Pins
Pin 28
Symbol
Min.
2.7
Typ.
2.9
6.5
2.5
50
Max.
3.3
Unit
V
mA
s
V
CC
I
SA1on
tA1MX1on
Pin 4
Pin 4
Z
< 2:1
VSWR
MHz
k
MHz
dB
A1in
f
800
1200
in
Pins 26, 27
2
f
800
21
1200
27
LOin
A1/MX1 cascaded
MX1LO = 916.8 MHz
G
24
VA1MX1
insertion voltage gain
MX1RF = 927.5 MHz
Pin = –40 dBm
PLOin = –20 dBm
SSB
Noise figure
N
11.5
–27
104
dB
dBm
dB V
F
1-dB compression point
Input Pin 4
P
1dB
Output voltage @ 1 dB
compression
MX1LO = 916.8 MHz,
MX1RF = 927.5 MHz, Pin 6
P
1dBout
3rd-order intercept point
f
P
= 980 MHz
= –20 dBm
= 1 GHz
= 995 MHz
= –40 dBm,
= –20 dBm
IIP3
–15
dBm
LO
LO
RF1
RF2
f
f
P
P
P
Pin 4
Pin 4
Pin 6
RF
LO
LO
LO to RF leakage
LO to IF leakage
IF output impedance
–50
62
330
dBm
dB V
= –20 dBm
LMX1Zout
@10.7-MHz IF
single ended
Pin 6
Rev. A3, 10-Jun-98
3 (9)
Preliminary Information
U2762B
Electrical Characteristics A2
Parameters
A2 turn-on time
IF input impedance
Input frequency
Output frequency
Gain
Test Conditions / Pins
Symbol
Min.
260
Typ.
2.5
330
10.7
10.7
10
Max.
Unit
s
t
A2on
@10.7 MHz
@10.7 MHz
Pin 8
Z
400
22
22
MX2in
MX2in
f
MHz
MHz
dB
Pin 24
f
MX2out
G
p
8
12
Noise figure
N
F
8
dB
1-dB compression point
3rd-order intercept point
Output voltage @ 1 dB
compression
Pin 8
Pin 8
Pin 24
P
IIP3
95
112
104
dB V
dB V
dB V
1dB
@10.7 MHz
Single ended
P
1dBout
Output load
Pin 24 LMX2out
260
330
400
Common Electrical Characteristics IF/AF System
Parameters
Supply-voltage range
Supply current
Test Conditions / Pins
Symbol
Min.
2.7
Typ.
2.9
4.9
Max.
3.3
Unit
V
mA
mA
Pins 7, 23 V , V
7
23
Pin 7
Pin 23
I
7
Supply current
I
6.0
23
Electrical Characteristics RSSI/Lim1 and Lim2
Parameters
–3 dB limiting at Lim1
input
Test Conditions / Pins
Valid for –5 dB insertion
loss for 2nd IF filter
Symbol
Min.
Typ.
Max.
8
Unit
dB V
P
3dB
Pin 22
Lim1/Lim2 cascaded
voltage gain
Limiter 1
Lim1 input impedance
Lim1 input frequency
Lim1 output impedance
Voltage gain
f
P
= 10.7 MHz,
G
110
330
dB
IF
LIM12
LIM1in
= –110 dBm
IFin
Pin 22
Pin 22
Pin 22
Z
260
1
260
400
22
400
f
MHz
dB
LIM1BW
f
330
45
LIM1out
G
LIM1
Limiter 2
Lim2 input impedance
Lim2 input frequency
RSSI
Pin 18
Pin 18
Z
260
1
330
400
22
LIM2in
f
MHz
LIM2BW
Dynamic range
Output voltage
D
V
20
0.1
1.7
85
0.3
1.9
dB V
V
V
RSSI
@ 20 dB V
@ 85 dB V
0.2
1.8
out
RSSI fall time
RSSI rise time
Output impedance
Pin 2
Pin 2
Pin 2
t
t
Z
50
50
s
s
fRSSI
rRSSI
10 || 3
k
|| pF
RSSI
4 (9)
Rev. A3, 10-Jun-98
Preliminary Information
U2762B
Electrical Characteristics Demodulator
Parameters
Demodulator 3 db BW
Demodulator total
harmonic distortion
Test Conditions / Pins
Symbol
Min.
Typ.
200
< 3
Max.
Unit
kHz
%
Pin 14 fDEMODBW
fmod = 36 kHz
dev = 40 kHz
THD
f
Pin 14
fIFin = 10.7 MHz
Demodulator output
voltage
fmod = 36 kHz
fdev = 40 kHz
V
150
1.5
mV
rms
Dout
Dout
Pin 14
f
IFin = 10.7 MHz
DC output voltage
Output load
Pin 14
Pin 14
V
k
L
10
Electrical Characteristics Comparator
Parameters
Ref. input impedance
Output voltage ‘high’
Output voltage ‘low’
Output low-to-high
rise time
Test Conditions / Pins
Pin 11
Symbol
Min.
Typ.
100
Max.
Unit
k
V
V
ns
Z
COMPin
RLOAD > 10 k
RLOAD > 10 k
Pin 10
Pin 10
Pin 10
V
VCC–0.3
outH
V
outL
0.3
500
R
C
LOAD = 10 k
LOAD = 10 pf
t
r
Output high-to-low
fall time
Hysteresis
R
C
LOAD = 10 k
LOAD = 10 pf
Pin 10
Pin 12
t
500
ns
f
V
25
mV
HYST
Electrical Characteristics Slicer Amplifier
Parameters
Open loop gain
Output load
Test Conditions / Pins
Pin 13 to 12
AC load
Symbol
Min.
10
Typ.
40
Max.
Unit
dB
k
G
Sol
Pin 12
Pin 12
L
Sout
Output swing
0.7
V
Internal Pin Configuration
VCC
VCC
5 kΩ
1 kΩ
2
3.3 pF
1 kΩ
3
4
10 kΩ
13956
800 Ω
13957
Figure 3. Pin 2: Signal strength indicator (RSSI)
Figure 4. Pins 3/4: RF reference / RF input
Rev. A3, 10-Jun-98
5 (9)
Preliminary Information
U2762B
VCC
VCC
10 µA
296 Ω
6
11
13963
1 mA
Figure 8. Pin 11: Comparator reference
13958
VCC
VCC
Figure 5. Pin 6: Mixer output
10 kΩ
12
VCC
290 µA
9
8
10 pF
257 Ω
13
80 µA
800 Ω
13964
13959
Figure 9. Pin 12: Comparator input / Slicer output
Pin 13: Slicer input
.
Figure 6. Pins 8/9: IF amplifier A2 input / reference
VCC
VCC
180 µA
20 kΩ
10
14
13962
13965
Figure 7. Pin 10: Data output
Figure 10. Pin 14: Demodulator output
6 (9)
Rev. A3, 10-Jun-98
Preliminary Information
U2762B
VCC
20 kΩ
21
22
7 pF
100 kΩ
330 Ω
15,16
140 µA
11 µA
13966
13969
Figure 11. Pin 15/16: Quadrature filter
Figure 14. Pins 21/22: Limiter 1 input / reference
VCC
17
272 Ω
24
330 Ω
18
1.1 mA
13970
13967
Figure 15. Pin 24: IF amplifier A2 output
Figure 12. Pins 17/18: Limiter 2 input / reference
26
27
VCC
240 Ω
20
1 kΩ
1 kΩ
440 µA
13971
13968
Figure 13. Pin 20: Limiter 1 output
Figure 16. Pins 26/27: Local oscillator input / reference
Rev. A3, 10-Jun-98
7 (9)
Preliminary Information
U2762B
Application Circuit
FCD1070MB115
TDK Ceramic
Discriminator
C51
C52
C53
1nF
C54
1nF
C47
1nF
100pF 0.1µF
FL4
R87
560Ω
R88
560Ω
LO in
C90
Y2
C58
100pF
1nF
DEM out
100pF
VCC
C0 8.2pF
1µF
C65
C64
28
1
27
2
26
3
25
4
24
5
23
6
22
21
20
9
19
10
18
17
12
16
15
14
0.1µF 100pF
SL in
U2762B
C72
1µF
7
8
11
13
R75
5.6kΩ
A1 in
RSSI
C71
Data out
100pF
R99
10kΩ
R100
10kΩ
10kΩ
C77
C76
C78
1nF
100pF 0.01µF 100pF
R97
10kΩ
FL5
C79
0.1µF
C83
4.7µF
13972
FL4/5: SFE10.7MS3C10-A
Figure 17. Application circuit
Package Information
5.7
5.3
Package SSO28
Dimensions in mm
9.10
9.01
4.5
4.3
1.30
0.15
0.15
0.05
0.25
0.65
6.6
6.3
8.45
28
15
technical drawings
according to DIN
specifications
13018
1
14
8 (9)
Rev. A3, 10-Jun-98
Preliminary Information
U2762B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC Semiconductor GmbH semiconductor division has been able to use its policy of continuous improvements
to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
Rev. A3, 10-Jun-98
9 (9)
Preliminary Information
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