BH-316A [TE]
3PST N.O., 50 Amps, 28 VDC or 115 VAC, 400 Hz; 3PST N.O. ， 50安培， 28伏或115伏， 400赫兹
| 型号： | BH-316A |
| 厂家： | 
TE CONNECTIVITY |
| 描述： | 3PST N.O., 50 Amps, 28 VDC or 115 VAC, 400 Hz |
| 文件： | 总7页 (文件大小：740K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CL320
3-Channel 20mA Linear LED Driver
Features
► ±±6 current accuracy ꢀ 4.0 -15V
► 90V standoff voltage
General Description
The CL320 is designed to drive 3 strings of LEDs at a
constant current of 20mA.
► Separate enable pins for each channel allow for
PWM dimming
► Over-temperature protection
Other drivers with currents in the range of 20 - 30mA are
available. The drive current is fixed, with a ±±6 tolerance
over a VOUT range of 4 - 15V.
► 8-Lead SOIC (w/Heat Slug) package
Separate enable pins for each channel allow for PWM
dimming, 3-step linear dimming, or individual disconnection
of faulty LED strings.
Applications
► LCD backlighting
► Indicator lamps
Over-temperature protection circuitry shuts down all 3
channelswhenthenominaldietemperaturereaches135°C.
Normal operation resumes when the die temperature drops
by 30°C.
The CL320 is available in the 8-Lead SOIC (w/Heat Slug)
package and requires a single ceramic bypass capacitor
which may be shared among several drivers.
Block Diagram and Typical Application Circuit
±.5 - 90V
CIN
100nF
8
7
±
5
VIN
OUT1
OUT2
OUT3
REG
VDD
Host
Controller
1
2
3
EN1
EN2
EN3
GND
4
CL320
CL320
Pin Configuration
Ordering Information
OUT3
Device
8-Lead SOIC (w/Heat Slug)
OUT2
OUT1
CL320
CL320SG-G
VIN
-G indicates package is RoHS compliant (‘Green’)
Underside plate
is ground
GND
EN3
EN2
EN1
8-Lead SOIC (w/Heat Slug) (SG)
Product Marking
Absolute Maximum Ratings
Parameter
Value
-0.5V to +100V
-0.5V to +100V
-0.5V to +±.5V
-40°C
YY = Year Sealed
WW = Week Sealed
L = Lot Number
YYWW
Supply voltage, VIN
CL320
LLLL
Output voltage, VOUT
= “Green” Packaging
Enable voltage, VEN
Operating temperature(1)
8-Lead SOIC (w/Heat Slug) (SG)
Storage temperature
-±5°C to +150°C
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
Note:
(1) Maximum junction temperature internally limited.
Recommended Operating Conditions (all voltages with respect to GND pin)
Sym
Parameter
Min
Typ
Max Units Conditions
VIN
Supply voltage
±.5
-
90
15
90
100
119
-
V
V
V
---
EN = 0
EN = 1
VOUT
Output voltage
4.0
-
fEN
TJ
Enable toggling frequency
Junction temperature
VIN capacitor
0
-40
-
-
-
kHz ---
oC
---
---
CIN
100
nF
Thermal Characteristics
Sym
Parameter
Min
Typ
Max Units Conditions
Thermal resistance,
junction to ambient
θJA
-
48
-
OC/W Mounted on JEDEC test PCB (2s 2p)
TLIM
Over-temperature limit
120
-
135
30
150
-
OC
OC
---
---
THYS
Over-temperature hysteresis
2
CL320
Electrical Characteristics
(Over recommended operating conditions. TJ @ 25OC unless otherwise specified.)
Sym
IIN
Parameter
Min
Typ
220
2.2
4.0
-
Max Units Conditions
-
250
2.3
10
µA
EN1-3 = 1
VIN supply current
Output current, off
-
mA EN1-3 = 0
IOUT(OFF)
-
µA
ENX = 1
-
21.2
21.2
22.0
0.8
-
ENX = 0, VOUT = 0 - 4.0V
IOUT(ON)
Output current, on
18.8
20.0
20.0
-
mA ENX = 0, VOUT = 4.0 - 15V
ENX = 0, VOUT = 15 - 90V
18.0
VEN(ON)
VEN(OFF)
CEN
Enable voltage, on
-
V
---
Enable voltage, off
2.4
-
V
---
Enable input capacitance
Enable low input current
Enable high input current
Enable on delay
-
-
-
-
-
-
-
5.0
-
10
pF
µA
µA
µs
µs
ns
ns
---
IENL
1.0
1.0
2.4
1.2
800
250
VEN = 0V
IENH
-
VEN = 5.0V
tON
2.0
1.0
440
170
---
---
---
---
tRISE
Output current rise time
Enable off delay
tOFF
tFALL
Output current fall time
Timing
V
EN(OFF)
EN
V
EN(ON)
tON
tOFF
tRISE
tFALL
906 IOUT(ON)
106 IOUT(ON)
IOUT
Temperature Effects
1.05
1.00
0.95
0.90
0.85
0.80
-40
25
120
-50
0
50
100
150
Junction Temperature (°C)
3
CL320
Load Regulation
1.20
1.00
0.80
0.±0
0.40
0.20
0
scale change
40 ±0
0
5
10
15
20
80
100
V
(V)
OUT
Pin Description
Pin #
1,2,3
4
Name
Description
EN1, EN2,
EN3
Output enable, active low.
Circuit common.
GND
OUT1, OUT2,
OUT3
5,±,7
8
Constant current output (sinking). Connect the cathodes of the LEDs to these pins.
Supply voltage. ±.5V to 90V. Bypass locally with a 100nF capacitor to ground.
VIN
The exposed underside plate is internally connected to the GND pin. The plate may either
be left floating or connected to ground. Solder the plate to an exposed copper area on the
PCB for heatsinking purposes (see recommended layout).
Underside
Plate
GND
Recommended PCB Layout
2
1cm exposed copper
Underside plate soldered
to copper area
Exposed copper area
may be plated
2
1cm exposed copper
4
CL320
Higher LED Current
VLL
CIN
100nF
8
7
±
5
VIN
OUT1
OUT2
OUT3
REG
VDD
Host
1
EN1
Controller
2
3
EN2
EN3
GND
4
CL320
By paralleling outputs, higher LED currents can be achieved. In addition, linear dimming in 3 discrete steps may be obtained
by enabling 1, 2, or 3 outputs.
Lowering CL320 Power Dissipation: Separate VIN Supply
VLL
VIN
CIN
100nF
8
7
±
5
VIN
OUT1
OUT2
OUT3
REG
VDD
Host
Controller
1
2
3
EN1
EN2
EN3
GND
4
CL320
CL320 power dissipation may be lowered by supplying the CL320 from a voltage source (VIN) that is lower in voltage than
the LED supply (VLL).
5
CL320
Lowering CL320 Power Dissipation: Dropping Resistor
VLL
RDROP
CIN
100nF
VLL(MIN) - ±.5V
2.3mA
8
7
±
5
RDROP
<
VIN
OUT1
OUT2
OUT3
where: RDROP = Dropping resistance
REG
VDD
VLL(MIN) = minimum supply voltage
Host
Controller
1
2
3
EN1
EN2
EN3
GND
4
CL320
Lowering CL320 Power Dissipation: Zener Diode
VLL
ZDROP
CIN
100nF
8
7
±
5
VIN
OUT1
OUT2
OUT3
REG
VDD
VZ < (VLL(MIN) - ±.5V)
Host
Controller
1
2
3
EN1
where: VZ = Zener Voltage
EN2
EN3
VLL(MIN) = minimum supply voltage
GND
4
CL320
±
CL320
8-Lead SOIC (w/Heat Slug) Package Outline (SG)
4.90x3.90mm body, 1.70mm height (max), 1.27mm pitch
D1
θ1
D
8
8
Exposed
Thermal
Pad Zone
E1
E
E2
Note 1
(Index Area
D/2 x E1/2)
Gauge
Plane
L2
θ
Seating
Plane
L
1
1
L1
Top View
Bottom View
View B
A
View
B
h
h
Note 1
A A2
A1
Seating
Plane
e
b
A
Side View
View A-A
Note 1:
This chamfer feature is optional. If it is not present, then a Pin 1 identifier must be located in the index area indicated.The Pin 1 identifier may be either a
mold, or an embedded metal or marked feature.
Symbol
A
A1
MIN 1.25 0.00 1.25 0.31 4.80 3.30* 5.80 3.80 2.29*
NOM 4.90 ±.00 3.90
MAX 1.70 0.15 1.70 0.51 5.00 3.81* ±.20 4.00 2.79*
A2
b
D
D1
E
E1
E2
e
h
L
L1
L2
θ
0O
-
θ1
5O
-
0.25 0.40
Dimension
(mm)
1.27
BSC
1.04 0.25
REF BSC
-
-
-
-
-
-
-
-
0.50 1.27
8O 15O
JEDEC Registration MS-012, Variation BA, Issue E, Sept. 2005.
Dimensions marked with (*) are non-JEDEC dimensions.
Drawings not to scale.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-CL320
NR111207
7
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