MD59-0022TR [TE]

PCS CDMA Upconverter / Driver 1710 1710.1910 MHz; PCS CDMA上变频器/驱动器1710 1710.1910兆赫
MD59-0022TR
型号: MD59-0022TR
厂家: TE CONNECTIVITY    TE CONNECTIVITY
描述:

PCS CDMA Upconverter / Driver 1710 1710.1910 MHz
PCS CDMA上变频器/驱动器1710 1710.1910兆赫

驱动器 射频 微波 过程控制系统 CD PCS
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MD59-0022  
PCS CDMA Upconverter / Driver  
1710—1910 MHz  
TSSOP-16 Plastic Package1  
Features  
(.039)  
(1)  
High Integrated Upconverter and Driver IC  
.041/.031  
1,05/,80  
Operates over 2.7 V to 5V Supply Voltage  
+9 dBm Output Power at 51 dBc ACPR  
Low current mode for power saving at low output power  
Balanced IF Input 265  
Low LO Drive Level -10 dBm  
Operates in US and Korean PCS Bands  
Miniature TSSOP-16 Plastic Package  
Pin 16  
.177/.169  
4,5/4,3  
.252  
6,4  
.118  
3,0  
Pin 1  
.0256  
0,65  
Description  
.201/.193  
5,1/4,9  
M/A-COM’s MD59-0022 is a fully integrated upconverter / Driver  
IC. It includes a balanced IF amplifier, upconverting mixer, two  
stage driver amplifier and LO buffer amplifier in a miniature  
TSSOP-16 plastic package. The backside of the lead frame is  
exposed to facilitate excellent RF grounding and thermal transfer.  
.118  
3,0  
Exposed  
Pad  
1. Dimensions are: in / mm  
The MD59-0022 is ideally suited for CDMA handset applications  
where high linearity and low power consumption are important  
transmitter requirements. The MD59-0022 can also operate in a  
low power mode to extend system battery life.  
Ordering Information  
Part Number  
Package  
MD59-0022TR  
MD59-0022RTR  
MD59-0022SMB  
Forward Tape and Reel1  
Reverse Tape and Reel1  
Sample Board  
The MD59-0022 is fabricated using M/A-COM’s 0.5 micron low  
noise E/D GaAs MESFET process. The process features full  
passivation for increased performance and reliability.  
1. If specific reel size is required, consult factory for part number assignment.  
Electrical Specifications TA = 25°C, VDD = 3.0V  
Parameter  
Test Conditions  
Units  
Min.  
Typ.  
Max.  
Complete Upconverter1 / High Power Mode  
Conversion Gain  
VCTRL = VDD  
dB  
dBm  
dB  
24  
9
27.2  
CDMA Linear Output Power2  
RF Frequency = 1710 - 1910 MHz  
LO Frequency = 1580 - 1780 MHz  
LO Power = -10 dBm  
Noise Figure  
10  
66  
IDD  
mA  
VSWR (All Ports)  
IF Input Impedance  
LO-to-RF Port Leakage  
IF = 130 MHz  
1.5:1  
265  
-18  
Ohms  
dBm  
Complete UPconverter1 / Low Power Mode  
Conversion Gain  
CDMA Linear Output Power2  
VCTRL = (0V)  
dB  
22  
2
RF Frequency = 1710 - 1910 MHz  
LO Frequency = 1580 = 1780 MHz  
LO Power = -10 dBm  
dBm  
Noise Figure  
dB  
10  
46  
IDD  
mA  
VSWR (All Ports)  
IF Input Impedance  
LO-to-RF Port Leakage  
IF = 130 MHz  
1.5:1  
265  
-18  
Ohms  
dBm  
RF Driver Amplifier  
Gain  
Gain  
VCTRL = VDD, RF Frequency = 1710 - 1910 MHz  
VCTRL = 0V, RF Frequency = 1710 - 1910 MHz  
dB  
dB  
TBD  
TBD  
1. Complete upconverter / driver measurements taken with a surface mount SAW filter between Mixer Ouput and Driver Input.  
2. CDMA Linear power is defined as 51 dBc ACPR at a 1.228 MHz Offset from the carrier frequency.  
Specifications subject to change without notice.  
V 2.0  
North America: Tel. (800) 366-2266, Fax (800) 618-8883  
Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298  
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020  
Visit www.macom.com for additional data sheets and product information.  
PCS CDMA Upconverter / Driver 1710—1910 GHz  
MD59-0022  
Pin Configuration  
Block Diagrams  
PIN No.  
PIN  
Description  
1
DRV VDD  
1
Driver Amplifier first stage supply voltage. Must be RF  
bypassed  
DRV VDD  
DRV IN  
GND  
1
DRV SRC  
DRV OUT  
2
DRV In  
50 Input to driver amplifier (DC blocking required)  
3
4
5
GND  
GND  
DC and RF Ground  
DC and RF Ground  
DRV VDD  
GND  
2
MIX OUT  
GND  
50 Output of Mixer (DC blocked)  
6
7
8
9
DC and RF Ground  
GND  
LO IN  
Local Oscillator Input (-10 to -5 dBm) (DC blocked)  
LO Amplifier Supply Voltage - Bypassing required  
LO VDD  
MIX OUT  
GND  
IF- VDD  
IF- IN  
IF+ VDD IF+ supply voltage. Off chip inductor and IF bypassing  
required  
10  
11  
IF+ IN  
IF+ input port. Off chip matching elements required  
IF- input port. Off chip matching elements required  
IF- IN  
IF- VDD  
LO IN  
IF+ IN  
IF+ VDD  
12  
IF- VDD  
IF- supply voltage. Off chip inductor and IF bypassing  
required  
LO VDD  
13  
14  
GND  
DC and RF Ground  
DRV VDD  
2
Driver amplifier second stage supply voltage. Must be  
RF bypassed  
15  
16  
DRV OUT  
50 output of Driver Amplifier (DC blocked internally)  
DRV SRC Source bias voltage of driver output stage. Required RF  
bypassing and may be used to control ouput stage  
current  
Sample Board Schematic  
D TC114YETL  
if- in  
if+ in  
J1  
1. Saw filter characteristics to be determined by customer, depending on band of operation. Sample boards are supplied without saw filter installed.  
Data supplied with sample board is measured over US PCS1900 Tx Bond using external K&L BPF (p/n SB121-1850/T450-0/OP) and 2 dB attenua-  
tion to emulate typical saw filter characteristics.  
Specifications subject to change without notice.  
V 2.0  
North America: Tel. (800) 366-2266, Fax (800) 618-8883  
Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298  
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020  
Visit www.macom.com for additional data sheets and product information.  
PCS CDMA Upconverter / Driver 1710—1910 GHz  
MD59-0022  
Recommended PCB Configuration  
External Circuitry Parts List  
Ref. Designation  
Value  
Purpose  
C1, C3 C8  
33 pF  
RF Bypass  
C2, C4, C5, C9,  
1000 pF RF / IF Bypass  
C10, C11, C12, C13  
C6, C7  
10 pF  
IF Matching  
L1  
L2, L3  
R1  
270 nH IF Matching  
82 nH  
18  
68 Ω  
RF Choke  
Source Bias Resistor  
R2  
Source Bias Resistor for low  
current mode  
U1  
MD59-0022 Upconverter / Driver  
Filter LO and Image signals  
Cross Section View  
U2  
U3  
RF Traces +  
Components  
E Series 5:1 Transformer for IF matching  
XFMR  
RF  
Ground  
U4  
J1  
DCT114Y Bipolar transistor for current  
ETL  
switching (ROHM)  
DC  
Routing  
DC  
10 PIN DC Connector  
Connect  
Customer  
Operating Instructions  
The IFA input ports are externally matched to 265 differential  
impedance using two off chip capacitors and an off chip inductor.  
This allows maximum flexibility of intermediate frequency and IF  
filter. The IFA output ports are matched to the mixer using off chip  
inductors, which are also used for DC bias injection. A matching  
network such as that shown below can be used to match both the  
input and output of the IFA at the required frequency. The inductor  
also acts as a choke for the DC supply line.  
The MD59-0022 is a highly integrated MMIC upconverter/driver  
for the 1710-1910 MHz PCS band. The upconverter/driver provides  
exceptional RF performance while consuming low DC current and  
is packaged in a low cost plastic package. It is ideal for light weight  
battery operated portable radio systems.  
The transmit chain consists of a balanced IF amplifier, balanced  
mixer with single-ended RF output and a two stage RF driver  
amplifier as shown in the block diagram on the previous page.  
Surface mount resistors, inductors and capacitors are used in  
conjunction with the IC for an optimum performance, tunability  
and ease of use. A schematic, showing the IC and required external  
components, is shown on page 2.  
The LO input port is internally matched to 50 . A LO buffer  
amplifier amplifies the -10 dBm input signal to the level required to  
drive the mixer. Performance can be enhanced slightly with a drive  
level of -5 dBm.  
An external self-bias resistor R1, which is RF bypassed, allows the  
current in the driver amplifier to be varied to obtain the required  
linear output power. By placing a bipolar transistor in series with  
the self-bias resistor, as shown in the schematic, the current  
consumption in the driver can be dynamically switched to provide a  
high and low power mode of operation. In high power mode, the  
bipolar transistor is on and the driver output stage is self-biased  
through R1 to provide +9 dBm of linear output power. By switching  
off the transistor, the output stage is biased through the higher  
resistance R2 thus reducing the current by ~25 mA to give 2 dBm  
of linear output power. The dual bipolar (U4) shown in the  
assembly drawing may be replaced by a smaller single transistor  
package with similar performance.  
All DC supply lines must be properly bypassed at RF frequencies to  
obtain optimum performance and at lower frequency to maintain  
unconditional stability. Capacitors C1, C3 and C8 are RF bypass  
capacitors for the LO amplifier and the driver amplifier. The value  
and placement of these capacitors are critical in determining the  
frequency response of these amplifiers. Capacitor C11 is a source  
bypass capacitor for the second stage of the driver amplifier. The  
placement of this capacitor will affect the gain of the amplifier. For  
best performance, all the RF bypass capacitors should be placed as  
shown in the recommended PCB diagram shown above. Capacitors  
C2, C4, C5 and C9 are 1000 pF low frequency DC supply bypass  
capacitors. Their value and placement are less critical than the  
other capacitors. However, for best results, these capacitors should  
be located as close to the package leads as possible.  
An external filter is required between the mixer output and driver  
amplifier input to reduce the amplitude of the image and local  
oscillator signals coming out of the mixer. This filter should have a  
50 input and output impedance. The mixer is a balanced resistive  
FET mixer which provides exceptional linearity and isolation with  
low loss and no DC current.  
Specifications subject to change without notice.  
V 2.0  
North America: Tel. (800) 366-2266, Fax (800) 618-8883  
Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298  
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020  
Visit www.macom.com for additional data sheets and product information.  
PCS CDMA Upconverter / Driver 1710—1910 GHz  
MD59-0022  
Typical Performance Curves  
Korean PCS Band  
US PCS Band  
Conversion Gain vs. Frequency  
LO = -10 dBm, -5 dBm, VDD = 3.0V  
Conversion Gain vs. Frequency  
LO = -10dBm, -5 dBm, VDD = 3.0V  
28  
26  
25  
24  
23  
22  
21  
20  
19  
18  
High Power Mode  
-5dBm  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
-5dBm  
High Power Mode  
-10dBm  
-5dBm  
-10dBm  
-5dBm  
-10dBm  
Low Power Mode  
-10dBm  
Low Power Mode  
1.74  
1.75  
1.76  
1.77  
1.78  
1.79  
1.83 1.84 1.85 1.86 1.87 1.88 1.89  
1.9  
1.91 1.92 1.93  
RF FREQUENCY (GHz)  
RF FREQUENCY (GHz)  
Conversion Gain vs. Frequency  
VDD = 2.8V, 3.0V, 3.3V, LO = -10dBm  
LO-to-RF Leakage vs. Frequency  
LO = -10dBm, -5 dBm, VDD = 3.0V  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
-20  
-22  
-24  
-26  
-28  
-30  
-32  
-34  
-36  
-38  
-40  
High Power Mode  
-5dBm  
3.3V  
3.0V  
2.8V  
3.3V  
-10dBm  
2.8V  
3.0V  
Low Power Mode  
1.83  
1.84  
1.85  
1.86  
1.87  
1.88  
1.89  
1.9  
1.91  
1.92  
1.93  
1.74  
1.75  
1.76  
1.77  
1.78  
1.79  
RF FREQUENCY (GHz)  
RF FREQUENCY (GHz)  
LO-to-RF Leakage vs. Frequency  
LO = -10dBm, -5 dBm, VDD = 3.0V  
-20  
-22  
-24  
-26  
-28  
-30  
-32  
-34  
-36  
-38  
-40  
-5dBm  
-10dBm  
1.74  
1.75  
1.76  
1.77  
1.78  
1.79  
RF FREQUENCY (GHz)  
Specifications subject to change without notice.  
V 2.0  
North America: Tel. (800) 366-2266, Fax (800) 618-8883  
Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298  
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020  
Visit www.macom.com for additional data sheets and product information.  
PCS CDMA Upconverter / Driver 1710—1910 GHz  
Typical Performance Curves (Cont’d)  
ACPR vs. Output Power  
MD59-0022  
ACPR vs. Output Power  
LO = -10dBm, -5 dBm, VDD = 3.0V  
VDD = 2.8V, 3.0V, 3.3V, LO = -10dBm  
70  
68  
66  
64  
62  
60  
58  
56  
54  
52  
50  
48  
70  
68  
High Power Mode  
Low Power Mode  
High Power Mode  
66  
Low Power Mode  
64  
62  
3.3V  
60  
3.3V  
-5dBm  
-5dBm  
3.0V  
58  
56  
3.0V  
2.8V  
-10dBm  
-10dBm  
54  
52  
50  
48  
2.8V  
-4  
-2  
0
2
4
6
8
10  
12  
-4  
-2  
0
2
4
6
8
10  
12  
POUT (dBm)  
P
OUT (dBm)  
Lo Input Return Loss vs. Frequency  
LO = -10dBm, VDD = 3.0V  
IF Input Return Loss vs. Frequency  
LO = -5 dBm, VDD = 3.0V  
10  
5
10  
5
0
0
-5  
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
1.4  
1.45  
1.5  
1.55  
1.6  
1.65  
1.7  
1.75  
1.8  
1.85  
1.9  
0
0.02 0.04 0.06 0.08  
0.1  
0.12 0.14 0.16 0.18  
0.2  
LO FREQUENCY (GHz)  
IF FREQUENCY (GHz)  
IF Input Return Loss vs. Frequency  
LO = -5 dBm, VDD = 3.0V  
Driver Output Return Loss vs. Frequency  
High and Low Power Mode, VDD = 3.0V  
10  
5
10  
5
0
0
High Power Mode  
-5  
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
Low Power Mode  
1.6  
1.65  
1.7  
1.75  
1.8  
1.85  
1.9  
1.95  
2
2.05  
2.1  
1.6  
1.65  
1.7  
1.75  
1.8  
1.85  
1.9  
1.95  
2
2.05  
2.1  
RF FREQUENCY (GHz)  
RF FREQUENY (GHz)  
Driver Input Return Loss vs. Frequency  
High and Low Power Mode, VDD = 3.0V  
10  
5
0
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
1.6  
1.65  
1.7  
1.75  
1.8  
1.85  
1.9  
1.95  
2
2.05  
2.1  
RF FREQUENCY (GHz)  
Specifications subject to change without notice.  
V 2.0  
North America: Tel. (800) 366-2266, Fax (800) 618-8883  
Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298  
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020  
Visit www.macom.com for additional data sheets and product information.  

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