MRF275G [TE]
N-CHANNEL MOS BROADBAND 100 . 500 MHz RF POWER FET; N沟道MOS宽带100 。 500 MHz射频功率场效应管
| 型号： | MRF275G |
| 厂家： | 
TE CONNECTIVITY |
| 描述： | N-CHANNEL MOS BROADBAND 100 . 500 MHz RF POWER FET |
| 文件： | 总16页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SEMICONDUCTOR TECHNICAL DATA
by MRF275G/D
The RF MOSFET Line
N–Channel Enhancement–Mode
Designed primarily for wideband large–signal output and driver stages from
100 – 500 MHz.
150 W, 28 V, 500 MHz
N–CHANNEL MOS
BROADBAND
•
Guaranteed Performance @ 500 MHz, 28 Vdc
Output Power — 150 Watts
Power Gain — 10 dB (Min)
Efficiency — 50% (Min)
100% Tested for Load Mismatch at all Phase Angles with VSWR 30:1
100 – 500 MHz
RF POWER FET
•
•
Overall Lower Capacitance @ 28 V
C
C
C
— 135 pF
— 140 pF
— 17 pF
iss
oss
rss
D
Simplified AVC, ALC and Modulation
Typical data for power amplifiers in industrial and
commercial applications:
G
G
S
•
•
Typical Performance @ 400 MHz, 28 Vdc
Output Power — 150 Watts
Power Gain — 12.5 dB
(FLANGE)
CASE 375–04, STYLE 2
Efficiency — 60%
D
Typical Performance @ 225 MHz, 28 Vdc
Output Power — 200 Watts
Power Gain — 15 dB
Efficiency — 65%
MAXIMUM RATINGS
Rating
Symbol
Value
65
Unit
Vdc
Vdc
Drain–Source Voltage
Drain–Gate Voltage
V
DSS
V
DGR
65
(R
= 1.0 MΩ)
GS
Gate–Source Voltage
V
±40
Adc
Adc
GS
Drain Current — Continuous
I
26
D
Total Device Dissipation @ T = 25°C
Derate above 25°C
P
D
400
2.27
Watts
W/°C
C
Storage Temperature Range
Operating Junction Temperature
THERMAL CHARACTERISTICS
T
–65 to +150
200
°C
°C
stg
T
J
Characteristic
Thermal Resistance, Junction to Case
Symbol
Max
Unit
R
0.44
°C/W
θJC
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
REV 1
1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS (1)
Drain–Source Breakdown Voltage
(V = 0, I = 50 mA)
V
65
—
—
—
—
—
—
1
Vdc
mA
µA
(BR)DSS
GS
Zero Gate Voltage Drain Current
(V = 28 V, V = 0)
D
I
DSS
GSS
DS GS
Gate–Source Leakage Current
(V = 20 V, V = 0)
I
1
GS DS
ON CHARACTERISTICS (1)
Gate Threshold Voltage (V
DS
= 10 V, I = 100 mA)
V
1.5
0.5
3
2.5
0.9
4.5
1.5
—
Vdc
Vdc
D
GS(th)
V
DS(on)
Drain–Source On–Voltage (V
GS
Forward Transconductance (V
= 10 V, I = 5 A)
D
= 10 V, I = 2.5 A)
g
fs
3.75
mhos
DS
D
DYNAMIC CHARACTERISTICS (1)
Input Capacitance (V
DS
= 28 V, V
GS
= 0, f = 1 MHz)
= 0, f = 1 MHz)
= 0, f = 1 MHz)
C
—
—
—
135
140
17
—
—
—
pF
pF
pF
iss
Output Capacitance (V
DS
Reverse Transfer Capacitance (V
= 28 V, V
C
oss
GS
= 28 V, V
GS
C
rss
DS
FUNCTIONAL CHARACTERISTICS (2) (Figure 1)
Common Source Power Gain
G
10
50
11.2
55
—
—
dB
%
ps
(V
DD
= 28 V, P
= 150 W, f = 500 MHz, I
= 2 x 100 mA)
= 2 x 100 mA)
= 2 x 100 mA,
out
DQ
DQ
DQ
Drain Efficiency
(V = 28 V, P
η
= 150 W, f = 500 MHz, I
DD
out
Electrical Ruggedness
(V = 28 V, P = 150 W, f = 500 MHz, I
ψ
No Degradation in Output Power
DD out
VSWR 30:1 at all Phase Angles)
1. Each side of device measured separately.
2. Measured in push–pull configuration.
REV 1
2
B
A
L6
C17
C18
+V
GG
+28 V
L5
+
C19
R1
C14
C15
C16
C22
L3
L1
D.U.T.
C1
C10
Z1
Z2
Z3
Z5
Z6
Z7
C11
C2
C3
B1
C5
C6
C7
L4
C8
C9
B2
C12
Z4
Z8
C4
C13
L2
A
B
C20
C21
B1
B2
Balun, 50 Ω, 0.086″ O.D. 2″ Long, Semi Rigid Coax
Balun, 50 Ω, Coax 0.141″ O.D. 2″ Long, Semi Rigid
L5
L6
Ferroxcube VK200 20/4B
4 Turns #16, 0.340″ I.D.,
Enameled Wire
C1, C2, C3, C4,
C10, C11, C12, C13 270 pF, ATC Chip Capacitor
R1
1.0 kΩ,1/4 W Resistor
C5, C8
C6
C7
1.0–20 pF, Trimmer Capacitor, Johanson
22 pF, Mini–Unelco Capacitor
15 pF, Unelco Capacitor
W1 – W4
20 x 200 x 250 mils, Wear Pads,
Beryllium–Copper, (See
Component Location Diagram)
1.10″ x 0.245″, Microstrip Line
0.300″ x 0.245″, Microstrip Line
1.00″ x 0.245″, Microstrip Line
C9
2.1 pF, ATC Chip Capacitor
Z1, Z2
Z3, Z4, Z5, Z6
Z7, Z8
C14, C15, C16,
C20, C21, C22
C17, C18
C19
0.1 µF, Ceramic Capacitor
680 pF, Feedthru Capacitor
10 µF, 50 V, Electrolytic Capacitor, Tantalum
10 Turns AWG #24,
0.145″ O.D., 106 nH
Taylor–Spring Inductor
Board material
0.060″ Teflon–fiberglass,
ε = 2.55, copper clad both sides, 2 oz. copper.
r
L1, L2
Points A are connected together on PCB.
Points B are connected together on PCB.
L3, L4
10 Turns AWG #18,
0.340″ I.D., Enameled Wire
Figure 1. 500 MHz Test Circuit
REV 1
3
TYPICAL CHARACTERISTICS
300
250
200
150
100
50
160
140
225 MHz
120
100
80
60
40
20
0
400 MHz
500 MHz
V
= 28 V
= 2 x 100 mA
= Constant
DS
I
I
V
= 2 x 100 mA
= 28 V
DQ
DQ
DD
P
in
f = 500 MHz
0
0
5
10
15
20
25
–10
–8
–6
, GATE–SOURCE VOLTAGE (V)
GS
–4
–2
0
2
4
P , INPUT POWER (Watts)
in
V
Figure 2. Output Power versus Input Power
Figure 3. Output Power versus Gate Voltage
10
9
8
7
6
5
4
3
2
1
0
180
V
= 10 V
P
in
= 14 W
10 W
DS
160
140
120
100
80
V
GS(th)
= 2.5 V
6 W
60
40
I
= 2 x 100 mA
DQ
f = 500 MHz
20
0
12
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
14
16
18
V , SUPPLY VOLTAGE (V)
DD
20
22
24 26
28
V , GATE–SOURCE VOLTAGE (V)
GS
Figure 4. Drain Current versus Gate Voltage
(Transfer Characteristics)
Figure 5. Output Power versus Supply Voltage
200
180
160
140
120
100
80
250
200
150
100
50
12 W
10 W
P
= 14 W
in
10 W
6 W
P
in
= 4 W
60
I
= 2 x 100 mA
DQ
f = 225 MHz
40
I
= 2 x 100 mA
DQ
f = 400 MHz
20
0
12
0
12
14
16
18
20
22
24
26
28
14
16
18
V , SUPPLY VOLTAGE (V)
DD
20
22
24
26
28
V
DD
, SUPPLY VOLTAGE (V)
Figure 6. Output Power versus Supply Voltage
Figure 7. Output Power versus Supply Voltage
REV 1
4
TYPICAL CHARACTERISTICS
1000
100
10
1.3
V
= 28 V
DD
1.2
1.1
1
C
oss
C
iss
I
= 4 A
2 A
D
C
rss
0.9
0.8
0.7
3 A
V
= 0 V
GS
0.1 A
f = 1.0 MHz
1
0
5
10
15
20
25
–25
0
25
50
75
100 125 150 175 200
30
V , DRAIN–SOURCE VOLTAGE (V)
DS
T , CASE TEMPERATURE (°C)
C
Figure 8. Capacitance versus Drain–Source Voltage*
*Data shown applies only to one half of
device, MRF275G
Figure 9. Gate–Source Voltage versus
Case Temperature
100
T
C
= 25°C
10
1
1
10
, DRAIN–SOURCE VOLTAGE (V)
100
V
DS
Figure 10. DC Safe Operating Area
REV 1
5
V
DD
= 28 V, I = 2 x 100 mA, P = 150 W
DQ out
f
Z
Ohms
Z *
OL
Ohms
in
(MHz)
225
400
500
1.6 – j2.30
3.2 – j1.50
1.9 + j0.48
1.9 + j2.60
2.3 – j0.19
2.0 + j1.30
f = 500 MHz
Z
* = Conjugate of the optimum load impedance
* = into which the device operates at a given
* = output power, voltage and frequency.
OL
f = 500 MHz
Z
OL
Z
OL
400
Z = 10 Ω
o
400
Note: Input and output impedance values given are
measured from gate to gate and drain to
drain respectively.
Z
*
OL
Z
in
225
225
Figure 11. Series Equivalent Input/Output Impedance
REV 1
6
B
A
L5
L6
C14
C15
BIAS
28 V
C18
R1
C10
C11
C1
C12
C13
D.U.T.
R2
L3
C8
L1
Z1
Z2
Z3
Z4
Z5
B1
C3
C4
C6
C5
C7
B2
Z6
L2
C2
C9
L4
R3
A
B
0.180″
C16
C17
0.200″
B1
B2
Balun, 50 Ω, 0.086″ O.D. 2″ Long,
Semi Rigid Coax
Balun, 50 Ω, 0.141″ O.D. 2″ Long,
Semi Rigid Coax
270 pF, ATC Chip Capacitor
1.0–20 pF, Trimmer Capacitor
15 pF, ATC Chip Capacitor
33 pF, ATC Chip Capacitor
L1, L2
L3, L4
#18 Wire, Hairpin Inductor
12 Turns #18, 0.340″ I.D.,
Enameled Wire
Ferroxcube VK200 20/4B
3 Turns #16, 0.340″ I.D.,
Enameled Wire
1.0 kΩ, 1/4 W Resistor
10 kΩ, 1/4 W Resistor
0.400″ x 0.250″, Microstrip Line
0.870″ x 0.250″, Microstrip Line
0.500″ x 0.250″, Microstrip Line
L5
L6
C1, C2, C8, C9
C3, C5, C7
C4
R1
C6
R2, R3
Z1, Z2
Z3, Z4
Z5, Z6
C10, C12, C13,
C16, C17
C11
0.01 µF, Ceramic Capacitor
1.0 µF, 50 V, Tantalum
C14, C15
C18
680 pF, Feedthru Capacitor
20 µF, 50 V, Tantalum
Board material
ε = 2.55, copper clad both sides, 2 oz. copper.
r
0.060″ Teflon–fiberglass,
Figure 12. 400 MHz Test Circuit
REV 1
7
L2
R1
+
C10
28 V
–
BIAS 0–6 V
C8
C9
C3
C4
R2
L1
D.U.T.
T2
T1
C6
C5
C1
C2
C7
C1
8.0–60 pF, Arco 404
1000 pF, Chip Capacitor
0.1 µF, Chip Capacitor
180 pF, Chip Capacitor
100 pF and 130 pF,
Chips in Parallel
0.47 µF, Chip Capacitor, 1215 or
Equivalent, Kemet
10 Turns AWG #16, 1/4″ I.D.,
Enamel Wire, Close Wound
Ferrite Beads of Suitable Material
for 1.5–2.0 µH Total Inductance
R1
R2
T1
100 Ω, 1/2 W
1.0 k Ω, 1/2 W
4:1 Impedance Ratio, RF Transformer
Can Be Made of 25 Ω, Semi Rigid Coax,
47–52 Mils O.D.
1:9 Impedance Ratio, RF Transformer.
Can Be Made of 15–18 Ω, Semi Rigid
Coax, 62–90 Mils O.D.
C2, C3, C7, C8
C4, C9
C5
C6
T2
C10
L1
NOTE: For stability, the input transformer T1 should be loaded
NOTE: with ferrite toroids or beads to increase the common
NOTE: mode inductance. For operation below 100 MHz. The
NOTE: same is required for the output transformer.
L2
Board material
062″ fiberglass (G10),
ε
5, Two sided, 1 oz. Copper.
r
Unless otherwise noted, all chip capacitors
are ATC Type 100 or Equivalent.
Figure 13. 225 MHz Test Circuit
REV 1
8
L5
+
B1
C19
L6
C17
C16
C18
C22
R1
C15
L1
BEADS 1–3
C14
L3
C1
C2
C10
C11
C5
C8
C6
C7
C9
C3
C4
C12
C13
L2
B2
L4
C20
BEADS 4–6
C21
MRF275G
JL
(Not to Scale)
Figure 14. MRF275G Component Location (500 MHz)
MRF275G
JL
(Scale 1:1)
Figure 15. MRF275G Circuit Board Photo Master (500 MHz)
REV 1
9
NOTE: S–Parameter data represents measurements taken from one chip only.
Table 1. Common Source S–Parameters (V
= 12 V, I = 4.5 A)
D
DS
S
11
S
21
S
12
S
22
f
MHz
|S
|
φ
–172
–173
–174
–175
–175
–176
–176
–176
–176
–176
–176
–176
–176
–176
–177
–177
–177
–177
–177
–177
–177
–178
–178
–178
–178
–179
–179
–179
–179
–180
–180
180
|S
|
φ
|S
|
φ
|S
|
φ
–173
–172
–175
–177
–178
–178
–176
–176
–177
–175
–176
–177
–178
–178
–177
–178
–179
–177
–176
–175
–178
–180
–179
–180
179
11
21
12
22
30
0.822
0.846
0.842
0.838
0.836
0.841
0.849
0.857
0.864
0.868
0.871
0.874
0.876
0.880
0.885
0.891
0.896
0.900
0.904
0.907
0.909
0.912
0.915
0.918
0.922
0.925
0.927
0.930
0.932
0.934
0.936
0.938
0.941
0.943
0.944
0.945
0.947
0.948
0.949
0.951
6.34
4.32
3.62
3.03
2.76
2.43
2.19
1.89
1.66
1.43
1.25
1.15
1.11
1.06
1.01
0.96
0.87
0.77
0.69
0.63
0.60
0.58
0.58
0.56
0.54
0.49
0.43
0.41
0.40
0.39
0.35
0.38
0.35
0.33
0.30
0.29
0.28
0.26
0.26
0.25
91
0.027
0.027
0.027
0.027
0.028
0.029
0.029
0.028
0.026
0.024
0.023
0.023
0.023
0.023
0.023
0.023
0.022
0.020
0.018
0.017
0.018
0.017
0.017
0.016
0.015
0.014
0.013
0.013
0.013
0.012
0.011
0.011
0.011
0.011
0.011
0.009
0.008
0.008
0.010
0.010
3
0.946
0.859
0.863
0.923
1.010
1.080
1.150
1.110
1.050
0.958
0.905
0.914
0.969
1.060
1.130
1.190
1.140
1.050
0.958
0.924
0.981
0.981
1.040
1.150
1.170
1.130
1.010
0.964
0.936
0.948
1.000
1.070
1.100
1.120
1.080
1.020
0.966
0.936
1.010
1.040
40
81
79
79
80
78
74
68
63
60
59
59
59
59
55
51
45
43
42
43
43
44
42
40
34
32
28
30
32
31
32
31
28
23
21
21
22
25
24
25
–6
–8
50
60
–5
70
–3
80
–4
90
–7
100
110
120
130
140
150
160
170
180
190
200
210
220
230
240
250
260
270
280
290
300
310
320
330
340
350
360
370
380
390
400
410
420
–13
–19
–19
–19
–17
–16
–17
–18
–23
–26
–26
–25
–23
–23
–22
–20
–20
–24
–27
–27
–23
–14
–9
–180
–178
–178
–178
180
–9
180
–12
–12
–10
–4
178
180
180
179
–180
180
179
179
1
180
179
3
–180
–179
179
179
4
178
5
178
11
178
REV 1
10
Table 1. Common Source S–Parameters (V
= 12 V, I = 4.5 A) continued
D
DS
S
11
S
21
S
12
S
22
f
MHz
|S
|
φ
178
177
177
177
177
176
176
176
175
172
170
168
165
|S
|
φ
|S
|
φ
|S
|
φ
177
178
179
177
178
179
178
177
175
173
172
170
168
11
21
12
22
430
440
450
460
470
480
490
500
600
700
800
900
1000
0.952
0.953
0.955
0.956
0.956
0.957
0.958
0.960
0.956
0.958
0.962
0.965
0.964
0.25
0.24
0.24
0.21
0.20
0.19
0.19
0.19
0.18
0.11
0.10
0.08
0.07
22
0.010
0.009
0.008
0.008
0.009
0.010
0.010
0.010
0.007
0.018
0.029
0.021
0.021
19
1.080
1.100
1.100
1.080
0.992
0.975
0.974
1.010
0.940
0.989
0.967
0.973
1.010
19
16
15
16
18
18
19
12
14
12
16
12
22
21
11
16
27
40
46
49
61
51
72
57
Table 2. Common Source S–Parameters (V
= 24 V, I = 0.35 mA)
D
DS
|S
S
11
S
21
S
12
S
22
f
MHz
|S
11
|
φ
|S
21
|
φ
|
12
φ
|S
22
|
φ
30
40
0.829
0.858
0.852
0.846
0.843
0.847
0.855
0.865
0.872
0.874
0.876
0.878
0.880
0.883
0.888
0.894
0.899
0.902
0.905
0.907
0.909
0.912
0.915
0.918
0.922
–170
–172
–173
–174
–175
–175
–175
–176
–176
–176
–176
–176
–176
–176
–177
–177
–177
–177
–177
–177
–178
–178
–178
–178
–178
9.20
6.30
5.28
4.42
4.01
3.53
3.18
2.75
2.43
2.10
1.84
1.70
1.63
1.56
1.49
1.42
1.29
1.14
1.02
0.94
0.89
0.87
0.86
0.83
0.80
92
0.023
0.022
0.023
0.023
0.024
0.024
0.024
0.023
0.022
0.020
0.019
0.019
0.019
0.019
0.019
0.019
0.018
0.017
0.015
0.015
0.015
0.014
0.014
0.014
0.013
4
0.915
0.834
0.836
0.892
0.978
1.050
1.110
1.080
1.020
0.932
0.882
0.889
0.943
1.030
1.100
1.160
1.120
1.030
0.941
0.903
0.957
0.961
1.020
1.120
1.140
–171
–170
–174
–175
–177
–177
–176
–175
–176
–174
–175
–176
–177
–177
–176
–176
–177
–176
–175
–174
–177
–179
–178
–178
–180
83
80
80
81
80
76
70
65
62
61
61
61
61
58
53
47
45
44
46
45
46
44
42
36
–4
50
–6
60
–3
70
–1
80
–2
90
–5
100
110
120
130
140
150
160
170
180
190
200
210
220
230
240
250
260
270
–10
–16
–16
–15
–14
–13
–13
–14
–18
–22
–24
–23
–19
–16
–15
–15
–17
–19
REV 1
11
Table 2. Common Source S–Parameters (V
= 24 V, I = 0.35 mA) continued
D
DS
S
11
S
21
S
12
S
22
f
MHz
|S
|
φ
–179
–179
–179
–179
–180
–180
180
180
179
179
179
179
178
178
178
178
177
177
177
177
176
176
176
175
172
170
168
165
|S
|
φ
|S
|
φ
–20
–18
–15
–9
–6
–4
–2
0
|S
|
φ
–179
–177
–177
–177
–180
–180
179
11
21
12
22
280
290
300
310
320
330
340
350
360
370
380
390
400
410
420
430
440
450
460
470
480
490
500
600
700
800
900
1000
0.925
0.927
0.929
0.931
0.932
0.934
0.937
0.939
0.941
0.943
0.944
0.945
0.946
0.947
0.949
0.950
0.952
0.953
0.954
0.955
0.956
0.957
0.958
0.956
0.959
0.963
0.968
0.969
0.73
0.65
0.62
0.60
0.57
0.53
0.56
0.53
0.50
0.46
0.44
0.41
0.40
0.38
0.38
0.37
0.36
0.36
0.31
0.30
0.29
0.29
0.28
0.24
0.16
0.14
0.12
0.09
34
0.013
0.011
0.011
0.010
0.010
0.010
0.010
0.010
0.010
0.009
0.009
0.008
0.008
0.009
0.009
0.009
0.009
0.009
0.009
0.009
0.009
0.010
0.010
0.006
0.019
0.023
0.026
0.025
1.110
0.994
0.948
0.916
0.934
0.985
1.050
1.090
1.110
1.080
1.010
0.956
0.926
1.000
1.040
1.070
1.090
1.090
1.070
0.990
0.963
0.959
0.996
0.924
0.986
0.963
0.967
1.000
32
32
34
33
34
33
30
25
23
22
24
27
26
26
23
21
18
17
17
19
20
20
12
13
10
11
7
–179
–178
–179
–179
–179
–178
–180
179
0
0
2
8
16
20
22
25
26
28
24
29
36
45
50
90
63
63
84
70
179
180
–180
178
179
–179
180
178
176
174
173
171
169
Table 3. Common Source S–Parameters (V
= 28 V, I = 0.39 mA)
D
DS
|S
S
11
S
21
S
12
S
22
f
MHz
|S
11
|
φ
|S
21
|
φ
|
12
φ
|S
22
|
φ
30
40
0.834
0.863
0.857
0.851
0.848
0.852
0.860
0.869
0.876
0.878
0.879
–169
–172
–173
–174
–175
–175
–175
–176
–176
–176
–176
10.08
6.91
5.79
4.86
4.41
3.87
3.49
3.03
2.68
2.31
2.03
93
0.021
0.021
0.021
0.022
0.022
0.022
0.023
0.022
0.021
0.019
0.018
4
0.807
0.828
0.830
0.883
0.970
1.040
1.100
1.070
1.010
0.923
0.876
–171
–170
–173
–175
–177
–177
–176
–175
–176
–174
–175
83
81
81
82
80
77
71
66
63
62
–4
–5
50
60
–3
70
–1
80
–1
90
–5
100
110
120
130
REV 1
–9
–14
–14
–15
12
Table 3. Common Source S–Parameters (V
= 28 V, I = 0.39 mA) continued
D
DS
S
11
S
21
S
12
S
22
f
MHz
|S
|
φ
–176
–176
–177
–177
–177
–177
–177
–177
–177
–178
–178
–178
–178
–179
–179
–179
–179
–179
–180
–180
180
|S
|
φ
|S
|
φ
–13
–11
–11
–12
–16
–21
–19
–14
–13
–15
–13
–10
–12
–15
–16
–16
–10
5
|S
|
φ
–176
–177
–177
–176
–176
–177
–176
–175
–174
–176
–179
–178
–178
–179
–178
–176
–177
–177
–180
–180
180
11
21
12
22
140
150
160
170
180
190
200
210
220
230
240
250
260
270
280
290
300
310
320
330
340
350
360
370
380
390
400
410
420
430
440
450
460
470
480
490
500
600
700
800
900
1000
0.881
0.883
0.886
0.890
0.896
0.901
0.904
0.907
0.908
0.910
0.912
0.916
0.919
0.922
0.925
0.927
0.929
0.931
0.933
0.934
0.937
0.939
0.941
0.943
0.944
0.945
0.946
0.947
0.949
0.950
0.951
0.953
0.953
0.954
0.955
0.956
0.957
0.955
0.958
0.963
0.966
0.968
1.87
1.79
1.72
1.64
1.56
1.42
1.26
1.13
1.03
0.99
0.96
0.95
0.93
0.89
0.81
0.72
0.69
0.66
0.63
0.59
0.62
0.59
0.55
0.51
0.49
0.46
0.44
0.43
0.42
0.41
0.40
0.39
0.35
0.33
0.32
0.32
0.31
0.26
0.18
0.15
0.13
0.10
62
0.018
0.018
0.018
0.018
0.018
0.018
0.017
0.015
0.013
0.014
0.014
0.014
0.013
0.012
0.012
0.011
0.011
0.012
0.011
0.009
0.009
0.010
0.010
0.009
0.008
0.008
0.007
0.010
0.012
0.010
0.008
0.008
0.009
0.010
0.012
0.012
0.010
0.012
0.018
0.020
0.028
0.033
0.884
0.934
1.020
1.090
1.150
1.110
1.030
0.938
0.897
0.948
0.956
1.020
1.120
1.140
1.110
0.988
0.944
0.920
0.936
0.989
1.050
1.080
1.110
1.070
1.010
0.949
0.922
0.995
1.030
1.060
1.090
1.090
1.070
0.983
0.964
0.956
0.993
0.926
0.984
0.961
0.967
0.997
62
62
58
54
48
46
45
47
46
47
45
42
37
35
33
33
35
34
35
34
31
26
24
23
25
27
26
27
24
21
19
17
18
19
20
21
13
12
9
16
14
3
180
4
–179
–178
–179
–178
–178
–178
–180
179
179
8
179
11
179
17
179
24
178
20
178
19
178
29
178
41
179
177
40
180
177
34
–180
178
177
26
177
30
179
176
43
–180
179
176
60
176
65
178
174
67
176
172
64
174
170
89
173
168
9
81
171
165
6
73
169
REV 1
13
Figure 16. MRF275G Test Fixture
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
DRAIN CHARACTERISTICS
The physical structure of a MOSFET results in capacitors
between the terminals. The metal oxide gate structure deter-
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, V
, occurs in the
DS(on)
mines the capacitors from gate–to–drain (C ), and gate–to–
linear region of the output characteristic and is specified un-
der specific test conditions for gate–source voltage and drain
gd
source (C ). The PN junction formed during the fabrication
gs
of the MOSFET results in a junction capacitance from drain–
current. For MOSFETs, V has a positive temperature
DS(on)
to–source (C ).
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
ds
These capacitances are characterized as input (C ), out-
iss
put (C
) and reverse transfer (C ) capacitances on data
oss
rss
sheets. The relationships between the inter–terminal capaci-
tances and those given on data sheets are shown below. The
GATE CHARACTERISTICS
The gate of the MOSFET is a polysilicon material, and is
electrically isolated from the source by a layer of oxide. The
C
can be specified in two ways:
iss
1. Drain shorted to source and positive voltage at the gate.
9
input resistance is very high — on the order of 10 ohms —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
2. Positivevoltageofthedraininrespecttosourceandzero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operat-
ing conditions in RF applications.
V
.
GS(th)
Gate Voltage Rating — Never exceed the gate voltage
rating (or any of the maximum ratings on the front page). Ex-
ceeding the rated V can result in permanent damage to
GS
DRAIN
the oxide layer in the gate region.
C
gd
Gate Termination — The gates of this device are essen-
tially capacitors. Circuits that leave the gate open–circuited
or floating should be avoided. These conditions can result in
turn–on of the devices due to voltage build–up on the input
capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance
low also helps damp transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
GA TE
C
C
= C + C
gd gs
gd ds
= C
gd
iss
C
ds
= C + C
oss
C
rss
C
gs
SOURCE
The C
iss
given in the electrical characteristics table was
measured using method 2 above. It should be noted that
, C , C are measured at zero drain current and are
C
iss oss rss
provided for general information about the device. They are
not RF design parameters and no attempt should be made to
use them as such.
REV 1
14
may be large enough to exceed the gate–threshold voltage
and turn the device on.
thermal runaway, and the ability to withstand severely mis-
matched loads without suffering damage. Power output can
be varied over a wide range with a low power dc control sig-
nal.
HANDLING CONSIDERATIONS
When shipping, the devices should be transported only in
antistatic bags or conductive foam. Upon removal from the
packaging, careful handling procedures should be adhered
to. Those handling the devices should wear grounding straps
and devices not in the antistatic packaging should be kept in
metal tote bins. MOSFETs should be handled by the case
and not by the leads, and when testing the device, all leads
should make good electrical contact before voltage is ap-
plied. As a final note, when placing the FET into the system it
is designed for, soldering should be done with grounded
equipment.
DC BIAS
The MRF275G is an enhancement mode FET and, there-
fore, does not conduct when drain voltage is applied. Drain
current flows when a positive voltage is applied to the gate.
RF power FETs require forward bias for optimum perfor-
mance. The value of quiescent drain current (I
) is not criti-
DQ
cal for many applications. The MRF275G was characterized
at I = 100 mA, each side, which is the suggested minimum
DQ
value of I
cation, I
DQ
parameters.
. For special applications such as linear amplifi-
DQ
may have to be selected to optimize the critical
DESIGN CONSIDERATIONS
The gate is a dc open circuit and draws no current. There-
fore, the gate bias circuit may be just a simple resistive divid-
er network. Some applications may require a more elaborate
bias system.
The MRF275G is a RF power N–channel enhancement
mode field–effect transistor (FETs) designed for HF, VHF and
UHF power amplifier applications. M/A-COM RF MOSFETs
feature a vertical structure with a planar design.
M/A-COM Application Note AN211A, FETs in Theory and
Practice, is suggested reading for those not familiar with the
construction and characteristics of FETs.
The major advantages of RF power FETs include high
gain, low noise, simple bias systems, relative immunity from
GAIN CONTROL
Power output of the MRF275G may be controlled from its
rated value down to zero (negative gain) by varying the dc
gate voltage. This feature facilitates the design of manual
gain control, AGC/ALC and modulation systems.
REV 1
15
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
U
G
Q RADIUS 2 PL
M
M
M
0.25 (0.010)
T A
B
1
2
4
INCHES
DIM MIN MAX
1.330 1.350 33.79 34.29
MILLIMETERS
MIN MAX
A
B
C
D
E
–B–
R
0.370 0.410
0.190 0.230
0.215 0.235
0.050 0.070
9.40 10.41
4.83
5.47
1.27
5.84
5.96
1.77
11.18
2.84
0.15
5.33
5
3
K
G
H
J
0.430 0.440 10.92
0.102
0.112
2.59
0.11
4.83
D
0.004 0.006
0.185 0.215
K
N
Q
R
U
0.845 0.875 21.46 22.23
J
0.060 0.070
0.390 0.410
1.100 BSC
1.52
9.91 10.41
27.94 BSC
1.78
N
E
STYLE 2:
PIN 1. DRAIN
H
2. DRAIN
3. GATE
4. GATE
SEATING
PLANE
–T–
–A–
C
5. SOURCE
CASE 375–04
ISSUE D
Specifications subject to change without notice.
n North America: Tel. (800) 366-2266, Fax (800) 618-8883
n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298
n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
REV 1
16
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