5962-86827012A [TI]
4-BIT PARALLEL-ACCESS SHIFT REGISTERS; 4位并行存取移位寄存器
| 型号： | 5962-86827012A |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 4-BIT PARALLEL-ACCESS SHIFT REGISTERS |
| 文件： | 总10页 (文件大小：232K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
www.ti.com
SCLS124A–DECEMBER 1992–REVISED NOVEMBER 2007
1
FEATURES
SN54HC195 . . . J PACKAGE
(TOP VIEW)
•
Synchronous Parallel Load
•
•
•
•
Positive-Edge-Triggered Clocking
J and K Inputs to First Stage
CLR
J
VCC
QA
1
2
3
4
5
6
7
8
16
15
14
13
Complementary Outputs From Last Stage
K
QB
Package Options: Plastic and Ceramic DIPS
and Ceramic Chip Carriers
A
QC
B
12 QD
11
•
Dependable Texas lnstruments Quality and
Reliability
C
QD
10
9
D
CLK
GND
SH/LD
DESCRIPTION/ORDERING INFORMATION
These 4-bit registers feature parallel inputs, parallel
outputs, J-K serial inputs, shift/load control input, and
a direct overriding clear. The registers have two
modes of operation: parallel (broadside) load, and
shift (in the direction QA and QD).
SN54HC195 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
Parallel loading is accomplished by applying the
4-bits of data and taking the shift/load control input
low. The data is loaded into the associated flip-flop
and appears at the outputs after the positive
transition of the clock input. During loading, serial
data flow is inhibited.
QB
QC
NC
QD
QD
K
A
4
5
6
7
8
17
16
15
14
NC
B
C
9 10 11 12 13
Shifting is accomplished synchronously when the
shift/load control input is high. Serial data for this
mode is entered at the J-K inputs. These inputs
permit the first stage to perform as a J-K, D, or T type
flip-flop as shown in the function table.
NC − No internal connection
LOGIC SYMBOL†
The SN54HC195 is characterized for operation over
the full military temperature range of –55°C to 125°C.
(1)
SRG4
R
CLR
(9)
SH/LD
M1 (SHIFT)
M2 (LOAD)
C3/1
(10)
CLK
(2)
(3)
(4)
(5)
(6)
(7)
J
K
A
1,3J
1,3K
2,3D
2,3D
(15)
(14)
(13)
(12)
(11)
Q
Q
Q
A
B
C
B
C
D
Q
Q
D
D
†
This symbol is in accordance with ANSI/IEEE Std 91−1984
and IEC Publication 617−12.
Pin numbers shown are for J package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1992–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
www.ti.com
SCLS124A–DECEMBER 1992–REVISED NOVEMBER 2007
LOGIC DIAGRAM (POSITIVE LOGIC)
(1)
CLR
CLK
(10)
(9)
SH/LD
(2)
(3)
(4)
J
TG
TG
TG
TG
R
(15)
Q
C1
1D
A
K
A
TG
TG
R
C1
1D
(14)
Q
B
(5)
B
TG
TG
R
C1
1D
(135)
Q
C
(6)
C
TG
TG
(12)
(11)
Q
Q
R
C1
1D
D
D
(7)
D
Pin numbers shown are for J package.
2
Submit Documentation Feedback
Copyright © 1992–2007, Texas Instruments Incorporated
Product Folder Link(s): SN54HC195
SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
www.ti.com
SCLS124A–DECEMBER 1992–REVISED NOVEMBER 2007
FUNCTION TABLE
INPUTS
SERIAL
OUTPUTS
QC
CLR SH/LD CLK
PARALLEL
QA
QB
QD
Q D
J
X
X
X
L
K
X
X
X
H
L
A
X
a
B
X
b
C
X
c
D
X
d
L
X
L
X
↑
L
↑
↑
↑
↑
L
a
L
L
L
H
H
H
H
H
H
H
b
c
d
d
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
QA0
QA0
L
QB0
QA0
QAn
QAn
QAn
QC0
QBn
QBn
QBn
QBn
QD0
QCn
QCn
QCn
QCn
Q D0
Q Cn
Q Cn
Q Cn
Q Cn
L
H
H
H
L
H
Q An
TYPICAL CLEAR, SHIFT, AND LOAD SEQUENCES
CLK
CLR
J
Serial
Inputs
K
SH/LD
A
H
L
Parallel
Data
Inputs
B
H
L
C
D
Q
Q
A
B
Outputs
Q
Q
C
D
Serial Shift
Serial Shift
Clear
Load
Copyright © 1992–2007, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): SN54HC195
SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
www.ti.com
SCLS124A–DECEMBER 1992–REVISED NOVEMBER 2007
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
IIK
Supply voltage range
–0.5
7
V
Input clamp current
VI < 0 or VI > VCC
VO < 0 or VO > VCC
VO = 0 to VCC
±20
±20
25
mA
mA
mA
mA
°C
IOK
IO
Output clamp current
Continuous output current
Continuous current through VCC or GND pins
50
Lead temperature 1,6 mm (1/16 in) from case for 60 s: FK or J package
Lead temperature 1,6 mm (1/16 in) from case for 10 s: N package
Storage temperature range
300
260
150
°C
Tstg
–65
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN
2
NOM
MAX UNIT
VCC Supply voltage
5
6
V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
1.5
3.15
4.2
0
VIH
High-level input voltage
V
0.3
0.9
VIL
Low-level input voltage
0
V
0
1.2
VI
Input voltage
0
VCC
VCC
1000
500
400
125
V
V
VO
Output voltage
0
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
0
tt
Input transition (rise and fall) times
Operating free-air temperature
0
ns
0
TA
–55
°C
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TYP
SN54HC195
PARAMETER
TEST CONDITIONS
VCC
UNIT
MIN
1.9
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
2 V
4.5 V
6 V
1.998
4.499
5.999
4.30
VI = VIH or VIL,
IOH = –20 µA
4.4
VOH
5.9
V
VI = VIH or VIL,
VI = VIH or VIL,
IOH = –4 mA
4.5 V
6 V
3.98
5.48
IOH = –5.2 mA
5.80
2 V
0.002
0.001
0.001
0.17
0.1
0.1
0.1
0.1
VI = VIH or VIL,
IOL = 20 µA
4.5 V
6 V
VOL
0.1
0.1
V
VI = VIH or VIL,
VI = VIH or VIL,
VI = VCC or 0
IOL = 4 mA
4.5 V
6 V
0.26
0.26
±100
8
0.4
IOL = 5.2 mA
0.15
0.4
II
6 V
±0.1
±1000
160
10
nA
µA
pF
ICC
CI
VI = VCC or 0,
VI = VCC or GND
IO = 0
6 V
2 V to 6 V
3
10
4
Submit Documentation Feedback
Copyright © 1992–2007, Texas Instruments Incorporated
Product Folder Link(s): SN54HC195
SN54HC195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS
www.ti.com
SCLS124A–DECEMBER 1992–REVISED NOVEMBER 2007
TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
SN54HC195
VCC
UNIT
MIN
0
MAX
MIN
0
MAX
2 V
6
31
36
4.2
21
25
fclock
Clock frequency
Pulse duration
4.5 V
6 V
0
0
MHz
0
0
2 V
80
16
14
80
16
14
100
20
17
0
120
24
20
120
24
20
150
30
26
0
CLK high or low
CLR low
4.5 V
6 V
tw
ns
2 V
4.5 V
6 V
2 V
Setup time,
before CLK↑
SH/LD, or serial and parallel data, or CLR
inactive
tsu
4.5 V
6 V
ns
ns
2 V
Hold time,
after CLK↑
SH/LD, or serial and parallel data, or CLR
inactive
th
4.5 V
6 V
0
0
0
0
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted), CL = 50 pF(1)
TA = 25°C
SN54HC195
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
6
TYP
12
50
60
67
17
14
67
17
13
28
8
MAX
MIN
4.2
21
MAX
2 V
4.5 V
6 V
fmax
31
36
MHz
25
2 V
145
29
220
QA thru QD
tpd
CLK
CLR
or
QD
4.5 V
6 V
44
37
ns
ns
25
2 V
150
30
225
45
QA thru QD
tpd
or
QD
4.5 V
6 V
26
38
2 V
75
110
22
tt
Any
4.5 V
6 V
15
ns
6
13
19
Cpd
Power dissipation capacitance
No load, TA = 25°C
65 pF typ
(1) Load circuit and voltage waveforms are shown in previous pages.
Copyright © 1992–2007, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): SN54HC195
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
5962-86827012A
5962-8682701EA
SN54HC195J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CDIP
LCCC
CDIP
FK
J
20
16
16
20
16
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
A42
Call TI
Call TI
J
N / A for Pkg Type
SNJ54HC195FK
SNJ54HC195J
FK
J
POST-PLATE N / A for Pkg Type
A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54HC195 :
Catalog: SN74HC195
•
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2011
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
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