5962-9076601MFA [TI]

QUAD LINE RECEIVER, CDFP16, CERAMIC, DFP-16;
5962-9076601MFA
型号: 5962-9076601MFA
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QUAD LINE RECEIVER, CDFP16, CERAMIC, DFP-16

CD
文件: 总14页 (文件大小:504K)
中文:  中文翻译
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DS96F173M,DS96F175C,DS96F175M  
DS96F173M/DS96F175C/DS96F175M EIA-485/EIA-422 Quad Differential Receivers  
Literature Number: SNOSC40E  
OBSOLETE  
DS96F173M/DS96F175C/  
DS96F175M  
September 22, 2011  
EIA-485/EIA-422 Quad Differential Receivers  
General Description  
Features  
The DS96F173 and the DS96F175 are high speed quad dif-  
ferential line receivers designed to meet the EIA-485 stan-  
dard. The DS96F173 and the DS96F175 offer improved  
performance due to the use of L-FAST bipolar technology.  
The use of LFAST technology allows the DS96F173 and  
DS96F175 to operate at higher speeds while minimizing pow-  
er consumption.  
Meets EIA-485, EIA-422A, EIA-423A standards  
Designed for multipoint bus applications  
TRI-STATE outputs  
Common mode input voltage range: −7V to +12V  
Operates from single +5.0V supply  
Reduced power consumption (ICC = 50 mA max)  
Input sensitivity o200 mV over common mode range  
Input hysteresif 50 V typical  
The DS96F173 and the DS96F175 have TRI-STATE® out-  
puts and are optimized for balanced multipoint data bus trans-  
mission at rates up to 15 Mbps. The receivers feature high  
input impedance, input hysteresis for increased noise immu-  
nity, and input sensitivity of 200 mV over a common mode  
input voltage range of −7V to +12V. The receivers are there-  
fore suitable for multipoint applications in noisy environments.  
The DS96F173 features an active high and active low Enable,  
common to all four receivers. The DS96F175 features sepa-  
rate active high Enables for each receiver pair.  
High input impe
Military teerature available  
QualifieMIL STD 883C  
Availae to dard military drawings (SMD)  
Avable in DIP(LCC(E), and FlatPak (W) packages  
96F3 and DS96F175 are lead and function  
ble wh SN75173/175 or the AM26LS32/MC3486  
Logic Diagrams  
Functin Tables  
(Each Receiver) DS96F173  
fferential Inputs  
A–B  
Enable  
Output  
E
E
Y
H
X
H
VID 0.2V  
X
H
L
H
L
X
VID −0.2V  
X
L
L
X
H
L
Z
Z
96271
X
X
DS96F175  
X
H = High Level  
L = Low Level  
Z = High Impedance (off)  
X = Don't Care  
(Each Receiver) DS96F175  
Differential Inputs  
Enable  
Output  
A–B  
E
Y
H
H
VID 0.2V  
962711  
H
L
L
Z
VID −0.2V  
X
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2011 National Semiconductor Corporation  
9627  
www.national.com  
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
Absolute Maximum Ratings  
COMMERCIAL (Note 2)  
Specifications for the 883 version of this product are list-  
ed separately.  
Recommended Operating  
Conditions  
Min Typ Max Units  
Supply Voltage (VCC  
DS96F175C  
)
4.75  
−7  
5.0 5.25  
V
Storage Temperature Range (TSTG  
)
−65°C to +175°C  
Common Mode Input  
Voltage (VCM  
Lead Temperature  
(Soldering, 60 sec.)  
Max. Package Power Dissipation  
(Note 1) at 25°C  
)
+12  
|12|  
V
V
300°C  
Differential Input Voltage  
(VID)  
Output Current HIGH (IOH  
)
−400  
11  
μA  
mA  
Ceramic DIP (J)  
1500 mW  
7.0V  
Output Current LOW (IOL  
)
Supply Voltage  
Operating Temperature (TA)  
DS96F175C  
Input Voltage, A or B Inputs  
Differential Input Voltage  
Enable Input Voltage  
Low Level Output Current  
±25V  
±25V  
7.0V  
50 mA  
0
25  
70  
°C  
Note 1: Derate packag0 mW/°C above 25°C.  
Electrical Characteristics (Note 3, Note 4)  
Over recommended supply voltage and operating temperature ranges, unless erwise speed  
Symbol Parameter Conditis  
VTH Differential-Input  
Min  
−0.2  
2.0  
Typ  
Max  
Units  
VO = VOH  
VO = VOL  
VCM = 0V  
0.2  
V
High Threshold Voltage  
Differential-Input (Note 5)  
Low Threshold Voltage  
Hysteresis (Note 6)  
VTL  
V
VTH − VTL  
VIH  
50  
mV  
V
Enable Input Voltage HIGH  
Enable Input Voltage LOW  
Enable Input Clamp Voltage  
Output Voltage HIGH  
VIL  
0.8  
V
VIC  
II =
−1.5  
V
VOH  
VID
IOH = −
V200 mV  
0°C to +70°C  
2.8  
2.5  
V
V
−55°C to +125°C  
IOL = 8.0 mA  
VOL  
Output Voltage LOW  
0.45  
0.50  
±20  
1.0  
IOL = 11 mA  
IOZ  
II  
High-Impedance State Out
VO .4V to 2.4V  
Other Input = 0V  
μA  
Line Input Current (Not
VI = 12V  
mA  
VI = −7.0V  
−0.8  
20  
IIH  
Enable Input CurreH  
Enable Input C
Input Resistanc
VIH = 2.7V  
VIL = 0.4V  
μA  
μA  
kΩ  
mA  
IIL  
−100  
22  
RI  
14  
18  
IOS  
ICC  
ICCX  
Short Circuit Outpt  
Supply Current  
(Note 8)  
−15  
−85  
50  
No Load  
Outputs Enabled  
Outputs Disabled  
mA  
50  
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2
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
 
COMMERCIAL  
Switching Characteristics  
VCC = 5.0V, TA = 25°C  
Symbol  
Parameter  
Propagation Delay Time,  
Conditions  
VID = −2.5V to +2.5V,  
CL = 15 pF, Figure 1  
VCM = 0V  
Min  
Typ  
Max  
Units  
tPLH  
5.0  
15  
22  
ns  
Low to High Level Output  
tPHL  
Propagation Delay Time,  
5.0  
15  
22  
ns  
High to Low Level Output  
tZH  
tZL  
tHZ  
tLZ  
Output Enable Time to High Level  
Output Enable Time to Low Level  
Output Disable Time from High Level  
Output Disable Time from Low Level  
Pulse Width Distortion (SKEW)  
CL = 15 pF, Figure 2  
CL = 15 pF, Figure 3  
CL = 5.0 pF, Figure 2  
CL = 5.0 pF, Figure 3  
Figure 1  
12  
13  
14  
14  
1.0  
16  
18  
20  
18  
3.0  
ns  
ns  
ns  
ns  
ns  
|tPLH–tPHL  
|
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be gu. Thee not meant to imply that the devices  
should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for aal devirn.  
Note 3: Unless otherwise specified min/max limits apply across the 0°C to +70°C range for the F175C. All tyls are given for VCC = 5V and TA = 25°C.  
Note 4: All currents into the device pins are positive; all currents out of the device pins are negatAges are reference to ground unless otherwise specified.  
Note 5: The algebraic convention, when the less positive (more negative) limit is designated minimum, is in this data sheet for common mode input voltage  
and threshold voltage levels only.  
Note 6: Hysteresis is the difference between the positive-going input threshold voltagTH, ahe negative going input threshold voltage, VTL  
.
Note 7: Refer to EIA-485 Standard for exact conditions.  
Note 8: Only one output at a time should be shorted.  
Order Number:  
DS96F175CJ  
See NS Package Number J16A  
3
www.national.com  
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
 
 
 
 
 
 
 
Absolute Maximum Ratings  
MIL-STD-883C (Note 2)  
For complete Military Specifications, refer to the appro-  
priate SMD or MDS.  
Recommended Operating  
Conditions  
Min Typ Max Units  
Supply Voltage (VCC  
)
DS96F173M/DS96F175M  
Common Mode  
4.50 5.0 5.50  
V
V
V
Storage Temperature Range (TSTG  
)
−65°C to +175°C  
Lead Temperature  
(Soldering, 60 sec.)  
Max. Package Power Dissipation (Note 9) at 25°C  
Ceramic DIP (J)  
Ceramic Flatpak (W)  
Ceramic LCC (E)  
−7  
+12  
Input Voltage (VCM  
Differential Input Voltage (VID)  
Output Current HIGH (IOH  
Output Current LOW (IOL  
)
300°C  
|12|  
−400  
11  
1500 mW  
)
μA  
mA  
1034 mW  
1500 mW  
7.0V  
)
Operating Temperature (TA)  
DS96F173M/DS96F175M  
Supply Voltage  
−55 25 125  
°C  
Input Voltage, A or B Inputs  
Differential Input Voltage  
Enable Input Voltage  
Low Level Output Current  
±25V  
±25V  
7.0V  
50 mA  
Note 9: Above TA = 25°C derate J package 10 mW/°C, W package 6.90 mW/°C, E package 11.11 /°C.  
Electrical Characteristics (Note 3, Note 4)  
Over recommended supply voltage and operating temperature ranges, unless othespecified  
Symbol  
VTH  
Parameter  
Differential-Input  
High Threshold Voltage  
Coitions  
Min  
Max  
Units  
VCC = 4.5V, 5.5V  
0.2  
V
VCM = 0V, 12V, −12V  
VTL  
Differential-Input (Note 5)  
Low Threshold Voltage  
VCC = 4.5V, 5.5V  
−0.2  
2.0  
V
VCM = 0V, 1−12V  
VIH  
VIL  
Enable Input Voltage HIGH  
Enable Input Voltage LOW  
Enable Input Clamp Voltage  
Output Voltage HIGH  
V
V
V
0.8  
VIC  
VOH  
II = = 4.5V  
VID
−1.5  
−55°C to +125°C  
IOL = 8.0 mA  
2.5  
V
IOH = −40μA  
VOL  
IOZ  
II  
Output Voltage LOW  
00 mV  
0.45  
±20  
1.0  
V
High-Impedance State Output  
Line Input Current (Note 7)  
VO = V, 2.4V, VCC = 5.5V  
μA  
OthInput = 0V  
VI = 12V  
mA  
VI = −7.0V  
−0.8  
20  
IIH  
Enable Input Current HIGH  
Enable Input Curre
Input Resistance  
VIH = 2.7V, VCC = 5.5V  
VIL = 0.4V, VCC = 5.5V  
μA  
μA  
kΩ  
mA  
IIL  
−100  
RI  
10  
IOS  
ICC  
ICCX  
Short Circuit Outp
Supply Current  
(Note 8)  
−15  
−85  
50  
No Load  
Outputs Enabled  
or Disabled  
mA  
www.national.com  
4
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
 
MIL-STD-883C  
Switching Characteristics  
VCC = 5.0V  
Symbol  
Parameter  
Conditions  
TA = 25°C TA = −55°C TA = 125°C Units  
Typ Max  
Max  
Max  
tPLH  
Propagation Delay Time,  
Low to High Level Output  
Propagation Delay Time,  
High to Low Level Output  
VID = −2.5V to +2.5V,  
CL = 15 pF, Figure 1  
VCM = 0V  
15  
22  
30  
30  
ns  
ns  
tPHL  
15  
22  
30  
30  
tZH  
tZL  
tHZ  
Output Enable Time to High Level CL = 15 pF, Figure 2  
Output Enable Time to Low Level CL = 15 pF, Figure 3  
12  
13  
14  
16  
18  
20  
27  
27  
27  
27  
27  
27  
ns  
ns  
ns  
Output Disable Time from High  
Level  
CL = 5.0 pF, Figure 2(Note 15)  
CL = 20 pF, Figure 2(Note 15)  
CL = 5.0 pF, Figure 3  
1
14  
3
37  
30  
37  
30  
ns  
ns  
tLZ  
Output Disable Time from Low  
Level  
|tPLH–tPHL  
|
Pulse Width Distortion (SKEW)  
Figure 1  
3
5.0  
5.0  
ns  
SMD Number:  
DS96F173MJ  
DS96F173MW  
DS96F173ME  
DS96F175MJ  
DS96F175MW  
DS96F175ME  
5962-9076602 MEA  
5962-9076602 MFA  
5962-9076602 M2A  
5962-9076601 MEA  
5962-9076601 MFA  
5962-9076601 M2A  
Order Number:  
ng  
DS96
SMD Marking  
DS96F173MJ-SMD  
DS96F175MJ-SMD  
DS96F1
ee NS Package Number J16A  
DS96F1ME/883  
DS96F173ME-SMD  
DS96F175ME-SMD  
DS9675ME/883  
NS Package Number E20A  
S96F173MW/883  
DS96F173MW-SMD  
DS96F175MW-SMD  
DS96F175MW/883  
See NS Package Number W16A  
For complete Military Product Specifications, refer  
to the appropriate SMD or MDS.  
5
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9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
Connection Diagrams  
16-Lead Ceramic Dual-In-Line Package  
NS Package Number J16A  
20-Lead Ceramic Leadless Chip Carrier  
NS Package Number E20A  
DS96F173  
962712  
962701  
*NC—No ion  
Top View  
DS96F175  
Top View  
62702  
962713  
Top View  
Top View  
www.national.com  
6
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
16-Lead Ceramic Flatpak  
NS Package Number W16A  
962714  
962715  
Top View  
Top View  
Order Numbere cated at the end of the respective  
Electrical Tbles.  
Parameter Measurement Information  
962704  
9
FIGURE ote 10, Note 11)  
962706  
962705  
URE 2. tHZ, tZH (Note 10, Note 11, Note 13, Note 14)  
962708  
962707  
FIGURE 3. tZL, tLZ (Note 10, Note 11, Note 13, Note 14)  
7
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9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
 
 
 
Note 10: The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, tr 6.0 ns, tf 6.0 ns, ZO = 50Ω.  
Note 11: CL includes probe and stray capacitance.  
Note 12: DS96F173 with active high and active low Enables are shown. DS96F175 has active high Enable only.  
Note 13: All diodes are 1N916 or equivalent.  
Note 14: To test the active low Enable E of DS96F173, ground E and apply an inverted input waveform to E . DS96F175 has active high enable only.  
Note 15: Testing at 20 pF assures conformance to 5 pF specification.  
Typical Application  
962709  
FIGURE
Note: The line length should be terminated at both ends in its characteristic edance. Stub lengths off the main line should be kept as short as possible.  
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8
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
 
 
 
 
 
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Cess Chip Carrier (E)  
Order Number D83 or DS96F175ME/883  
NS Pmber E20A  
16-Lead Ceramic Dual-In-Line Package (J)  
Order Number DS96F175CJ, DS96F173MJ/883 or DS96F175MJ/883  
NS Package Number J16A  
9
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9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
16-Lead Ceramic Fak W)  
Order Number DS96F173MW/883 96F5MW/883  
NS Package Number W
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10  
9627 Version 10 Revision 4 Print Date/Time: 2011/09/22 08:35:53  
Notes  
11  
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