5962-9162701MCA [TI]
军用 4 通道、2 输入、4.5V 至 5.5V 双极与非门 | J | 14 | -55 to 125;
| 型号： | 5962-9162701MCA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 军用 4 通道、2 输入、4.5V 至 5.5V 双极与非门 | J | 14 | -55 to 125 栅 栅极 |
| 文件： | 总5页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AS1000A, SN74AS1000A
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS/DRIVERS
SDAS056B – APRIL 1984 – REVISED JANUARY 1995
SN54AS1000A . . . J PACKAGE
SN74AS1000A . . . D OR N PACKAGE
(TOP VIEW)
• Driver Version of ′AS00
• High Capacitive-Drive Capability
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
1A
1B
1Y
2A
2B
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
4B
4A
4Y
3B
3A
3Y
description
2Y
GND
These devices contain four independent 2-input
positive-NAND buffers/drivers. They perform the
Boolean functions Y = A • B or Y = A + B in positive
logic.
8
SN54AS1000A . . . FK PACKAGE
(TOP VIEW)
The SN54AS1000A is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74AS1000A is characterized for
operation from 0°C to 70°C.
3
2
1
20 19
18
1Y
NC
2A
4
5
6
7
8
4A
NC
4Y
NC
3B
17
16
15
14
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
NC
2B
Y
A
H
L
B
H
X
L
9 10 11 12 13
L
H
H
X
NC – No internal connection
†
logic symbol
logic diagram (positive logic)
1
1A
2
1
&
3
6
1A
2
3
6
1Y
2Y
3Y
4Y
1Y
2Y
3Y
4Y
1B
4
1B
4
2A
5
2A
5
2B
9
2B
3A
10
3B
12
4A
13
4B
9
3A
8
8
10
3B
11
12
4A
11
13
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS1000A, SN74AS1000A
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS/DRIVERS
SDAS056B – APRIL 1984 – REVISED JANUARY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54AS1000A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS1000A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
recommended operating conditions
SN54AS1000A
MIN NOM MAX
SN74AS1000A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–40
40
0.8
–48
48
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–55
125
0
70
‡
These high sink- or source-current devices are not recommended for use above 40 MHz.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS1000A
SN74AS1000A
PARAMETER
TEST CONDITIONS
UNIT
§
§
MIN TYP
MAX
MIN TYP
MAX
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
I
= –2 mA
= –3 mA
= –40 mA
= –48 mA
= 40 mA
= 48 mA
V
–2
V
–2
CC
OH
OH
OH
OH
OL
OL
CC
2.4
CC
2.4
3.2
3.2
V
OH
V
V
CC
= 4.5 V
2
2
0.25
0.5
V
OL
V
CC
= 4.5 V
V
0.35
0.5
0.1
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 7 V
I
0.1
20
mA
µA
I
V = 2.7 V
I
20
IH
V = 0.4 V
I
–0.5
–200
3.5
–0.5
–200
3.5
mA
mA
mA
mA
IL
¶
V
O
= 2.25 V
–30
–50
O
V = 0
I
2.2
12
2.2
12
CCH
CCL
V = 4.5 V
I
19
19
§
¶
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS1000A, SN74AS1000A
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS/DRIVERS
SDAS056B – APRIL 1984 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS1000A SN74AS1000A
MIN
1
MAX
MIN
1
MAX
t
t
5
5
4
4
PLH
A or B
Y
ns
1
1
PHL
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS1000A, SN74AS1000A
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS/DRIVERS
SDAS056B – APRIL 1984 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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