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5962-9677301QZX [TI]

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20;
5962-9677301QZX
型号： 5962-9677301QZX
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20

驱动 CD 输出元件 逻辑集成电路
文件： 总7页 (文件大小：117K)
中文：  中文翻译
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SCLS599 − NOVEMBER 2004  
D OR PW PACKAGE  
(TOP VIEW)  
D
Qualification in Accordance With  
AEC-Q100  
†
D
Qualified for Automotive Applications  
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
L
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
Q
Q
Q
Q
M
J
H
I
Q
N
Q
Q
F
12 CLR  
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive up to Ten LSTTL Loads  
E
11  
10  
9
Q
CLKI  
G
Q
CLKO  
CLKO  
D
Low Power Consumption, 80-µA Max I  
Typical t = 14 ns  
pd  
4-mA Output Drive at 5 V  
CC  
GND  
Low Input Current of 1 µA Max  
Allow Design of Either RC- or  
Crystal-Oscillator Circuits  
†
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
The SN74HC4060 device consists of an oscillator section and 14 ripple-carry binary counter stages. The  
oscillator configuration allows design of either RC- or crystal-oscillator circuits. A high-to-low transition on the  
clock (CLKI) input increments the counter. A high level at the clear (CLR) input disables the oscillator (CLKO  
goes high and CLKO goes low) and resets the counter to zero (all Q outputs low).  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SOIC − D  
Reel of 2500  
Reel of 2000  
SN74HC4060QDRQ1  
SN74HC4060QPWRQ1  
HC4060Q  
HC4060Q  
−40°C to 125°C  
TSSOP − PW  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
FUNCTION  
CLK  
↑
CLR  
L
No change  
Advance to next stage  
All outputs L  
↓
L
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
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SCLS599 − NOVEMBER 2004  
logic diagram (positive logic)  
R
R
R
R
R
R
R
R
R
T
T
T
T
T
T
T
T
T
4
6
14  
13  
15  
1
2
3
Q
Q
Q
Q
Q
Q
Q
Q
N
F
G
H
I
J
L
M
12  
11  
CLR  
R
R
R
R
R
T
T
T
T
T
9
CLKO  
CLKO  
CLKI  
10  
7
5
Q
Q
E
D
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
O
O
CC  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Storage temperature range, T  
stg  
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
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SCLS599 − NOVEMBER 2004  
recommended operating conditions (see Note 3)  
MIN NOM  
MAX  
UNIT  
V
Supply voltage  
2
1.5  
5
6
V
CC  
IH  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
V
High-level input voltage  
V
V
= 2 V  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
Low-level input voltage  
IL  
V
V
Input voltage  
0
0
V
V
V
V
I
CC  
Output voltage  
O
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
= 4.5 V  
= 6 V  
∆t/∆v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= −40°C  
T = −40°C  
A
TO 85°C  
A
T
A
= 25°C  
TO 125°C  
PARAMETER  
TEST CONDITIONS  
V
CC  
UNIT  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
All outputs V = V or V  
IH  
,
I
= −20 µA  
I
IL  
IL  
IL  
IL  
OH  
5.9  
V
V
V
OH  
I
I
= −4 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
Q outputs  
V = V or V  
I IH  
= −5.2 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
8
0.1  
0.1  
0.1  
0.1  
4.5 V  
6 V  
All outputs V = V or V  
IH  
,
I
= 20 µA  
I
OL  
0.1  
0.1  
V
OL  
I
I
= 4 mA  
4.5 V  
6 V  
0.4  
0.33  
0.33  
1000  
80  
OL  
Q outputs  
V = V or V  
I
IH  
= 5.2 mA  
0.4  
OL  
I
I
V = V  
or 0  
6 V  
1000  
160  
10  
nA  
µA  
pF  
I
I
CC  
V = V  
or 0,  
I
O
= 0  
6 V  
CC  
I
CC  
C
2 V to 6 V  
3
10  
10  
i
3
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SCLS599 − NOVEMBER 2004  
timing requirements over recommended operating free-air temperature range (unless otherwise  
noted)  
T
= −40°C  
T = −40°C  
A
TO 85°C  
A
T
A
= 25°C  
TO 125°C  
V
CC  
UNIT  
MIN  
MAX  
5.5  
28  
MIN  
MAX  
MIN  
MAX  
4.3  
22  
2 V  
4.5 V  
6 V  
3.7  
19  
22  
f
t
t
Clock frequency  
MHz  
clock  
33  
25  
2 V  
90  
18  
135  
27  
115  
23  
4.5 V  
6 V  
CLKI high or low  
CLR high  
15  
23  
20  
Pulse duration  
ns  
ns  
w
2 V  
90  
135  
27  
115  
23  
4.5 V  
6 V  
18  
15  
23  
20  
2 V  
160  
32  
240  
48  
200  
40  
Setup time, CLR inactive before CLKI↓  
4.5 V  
6 V  
su  
27  
41  
34  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
= −40°C  
T = −40°C  
A
A
T
A
= 25°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
TO 125°C  
TO 85°C  
PARAMETER  
V
UNIT  
MHz  
ns  
CC  
MIN  
5.5  
28  
TYP  
10  
45  
53  
240  
58  
42  
66  
18  
14  
28  
8
MAX  
MIN  
3.7  
19  
MAX  
MIN  
4.3  
22  
MAX  
2 V  
4.5 V  
6 V  
f
t
t
t
max  
33  
22  
25  
2 V  
490  
98  
735  
147  
125  
210  
42  
615  
123  
105  
175  
35  
4.5 V  
6 V  
CLKI  
CLR  
Q
D
pd  
83  
2 V  
140  
28  
4.5 V  
6 V  
Any Q  
Any  
ns  
PHL  
t
24  
36  
30  
2 V  
75  
110  
22  
95  
4.5 V  
6 V  
15  
19  
ns  
6
30  
19  
16  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance  
No load  
88  
pF  
pd  
4
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SCLS599 − NOVEMBER 2004  
PARAMETER MEASUREMENT INFORMATION  
V
From Output  
Under Test  
Test  
Point  
CC  
Reference  
Input  
50%  
C
= 50 pF  
L
0 V  
(see Note A)  
t
su  
V
CC  
Data  
Input  
90%  
90%  
LOAD CIRCUIT  
50%  
10%  
50%  
10%  
0 V  
t
t
V
CC  
r
f
Input  
50%  
50%  
VOLTAGE WAVEFORMS  
SETUP AND INPUT RISE AND FALL TIMES  
0 V  
t
t
PLH  
PHL  
90%  
V
OH  
In-Phase  
Output  
90%  
50%  
10%  
50%  
10%  
V
CC  
V
OL  
High-Level  
50%  
50%  
50%  
t
t
r
f
f
Pulse  
0 V  
t
t
PHL  
90%  
PLH  
V
t
OH  
OL  
w
90%  
t
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
V
CC  
Low-Level  
Pulse  
V
50%  
t
r
0 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
VOLTAGE WAVEFORMS  
PULSE DURATIONS  
NOTES: A.  
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.  
C includes probe and test-fixture capacitance.  
L
O
r
f
C. For clock inputs, f  
is measured when the input duty cycle is 50%.  
max  
D. The outputs are measured one at a time, with one input transition per measurement.  
E. and t are the same as t  
t
.
PLH  
PHL pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
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SCLS599 − NOVEMBER 2004  
CONNECTING AN RC-OSCILLATOR CIRCUIT TO THE SN74HC4060 DEVICE  
The SN74HC4060 device consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator  
configuration allows design of either RC- or crystal-oscillator circuits.  
When an RC-oscillator circuit is implemented, two resistors and a capacitor are required. The components are  
attached to the terminals as shown:  
1
2
3
4
5
6
16  
15  
14  
13  
12  
11  
R2  
R1  
7
8
10  
9
C
To determine the values of capacitance and resistance necessary to obtain a specific oscillator frequency (f), use  
this formula:  
1
f +  
0.405 R2  
ǒ
Ǔ
) 0.693  
2(R1)(C)  
R1)R2  
If R2 > > R1 (i.e., R2 = 10R1), the above formula simplifies to:  
0.455  
RC  
f +  
6
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Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2004, Texas Instruments Incorporated  

相关型号：

SI9130DB

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SI9130CG-T1-E3

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SI9137

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