5962-9752601Q2A [TI]

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS; 3线路至8线路解码器/多路解复用器
5962-9752601Q2A
元器件型号: 5962-9752601Q2A
生产厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述和应用:

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
3线路至8线路解码器/多路解复用器

解码器解复用器逻辑集成电路输入元件驱动
PDF文件: 总25页 (文件大小:821K)
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型号参数:5962-9752601Q2A参数
Brand NameTexas Instruments
生命周期Active
零件包装代码QLCC
包装说明QCCN, LCC20,.35SQ
针数20
Reach Compliance Codenot_compliant
ECCN代码EAR99
HTS代码8542.39.00.01
风险等级5.39
其他特性TWO ACTIVE-LOW AND ONE ACTIVE-HIGH ENABLE INPUTS
系列LVC/LCX/Z
输入调节STANDARD
JESD-30 代码S-CQCC-N20
长度8.89 mm
负载电容(CL)50 pF
逻辑集成电路类型OTHER DECODER/DRIVER
最大I(ol)0.024 A
位数8
功能数量1
端子数量20
最高工作温度125 °C
最低工作温度-55 °C
输出极性INVERTED
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码QCCN
封装等效代码LCC20,.35SQ
封装形状SQUARE
封装形式CHIP CARRIER
包装方法TUBE
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
最大电源电流(ICC)0.01 mA
Prop。Delay @ Nom-Sup6.7 ns
传播延迟(tpd)7.9 ns
认证状态Qualified
筛选级别MIL-PRF-38535 Class Q
座面最大高度2.03 mm
子类别Decoder/Driver
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.7 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子形式NO LEAD
端子节距1.27 mm
端子位置QUAD
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度8.89 mm
Base Number Matches1
MAX34334CSE前5页PDF页面详情预览
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCAS291T – MARCH 1993 – REVISED JULY 2005
FEATURES
Operate From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t
pd
of 5.8 ns at 3.3 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25°C
SN54LVC138A . . . J OR W PACKAGE
SN74LVC138A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
BRK
BRK
SN74LVC138A . . . RGY PACKAGE
(TOP VIEW)
SN54LVC138A . . . FK PACKAGE
(TOP VIEW)
GND
Y6
8
9
8
9
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
The SN54LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V V
CC
operation, and the
SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 1.65-V to 3.6-V V
CC
operation.
ORDERING INFORMATION
T
A
QFN – RGY
SOIC – D
SOP – NS
–40°C to 85°C
SSOP – DB
TSSOP – PW
TVSOP – DGV
VFBGA – GQN
VFBGA – ZQN (Pb-free)
CDIP – J
–55°C to 125°C
CFP – W
LCCC – FK
(1)
PACKAGE
(1)
Reel of 1000
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Reel of 2000
Reel of 1000
Tube of 25
Tube of 150
Tube of 55
ORDERABLE PART NUMBER
SN74LVC138ARGYR
SN74LVC138AD
SN74LVC138ADR
SN74LVC138ADT
SN74LVC138ANSR
SN74LVC138ADBR
SN74LVC138APW
SN74LVC138APWR
SN74LVC138APWT
SN74LVC138ADGVR
SN74LVC138AGQNR
SN74LVC138AZQNR
SNJ54LVC138AJ
SNJ54LVC138AW
SNJ54LVC138AFK
LC138A
LC138A
SNJ54LVC138AJ
SNJ54LVC138AW
SNJ54LVC138AFK
LC138A
LVC138A
LC138A
LVC138A
TOP-SIDE MARKING
LC138A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Y7
GND
NC
Y6
Y5
A
B
C
G2A
G2B
G1
Y7
GND
1
2
3
4
5
6
7
16
15
14
13
12
11
10
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
1
16
15
14
13
12
11
10
V
CC
A
B
A
NC
V
CC
Y0
Y0
Y1
Y2
Y3
Y4
Y5
C
G2A
NC
G2B
G1
3
4
5
6
7
8
2 1 20 19
18
17
16
15
14
9 10 11 12 13
B
C
G2A
G2B
G1
Y7
2
3
4
5
6
7
Y1
Y2
NC
Y3
Y4
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291T – MARCH 1993 – REVISED JULY 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The 'LVC138A devices are designed for high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders minimize the
effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times
of these decoders and the enable time of the memory usually are less than the typical access time of the
memory. This means that the effective system delay introduced by the decoders is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only
one inverter. An enable input can be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
GQN OR ZQN PACKAGE
(TOP VIEW)
1
A
B
C
D
E
2
3
4
TERMINAL ASSIGNMENTS
1
A
B
C
D
E
B
C
G2B
G1
GND
2
A
NC
(1)
G2A
NC
(1)
Y7
3
V
CC
NC
(1)
Y3
NC
(1)
Y6
4
Y0
Y1
Y2
Y4
Y5
(1)
SDFGDFGDFG
NC - No internal connection
FUNCTION TABLE
ENABLE INPUTS
G1
X
X
L
H
H
H
H
H
H
H
H
G2A
H
X
X
L
L
L
L
L
L
L
L
G2B
X
H
X
L
L
L
L
L
L
L
L
C
X
X
X
L
L
L
L
H
H
H
H
SELECT INPUTS
B
X
X
X
L
L
H
H
L
L
H
H
A
X
X
X
L
H
L
H
L
H
L
H
Y0
H
H
H
L
H
H
H
H
H
H
H
Y1
H
H
H
H
L
H
H
H
H
H
H
Y2
H
H
H
H
H
L
H
H
H
H
H
OUTPUTS
Y3
H
H
H
H
H
H
L
H
H
H
H
Y4
H
H
H
H
H
H
H
L
H
H
H
Y5
H
H
H
H
H
H
H
H
L
H
H
Y6
H
H
H
H
H
H
H
H
H
L
H
Y7
H
H
H
H
H
H
H
H
H
H
L
2
www.ti.com
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291T – MARCH 1993 – REVISED JULY 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
15
A
1
14
Select
Inputs
2
13
Y0
Y1
B
Y2
C
3
12
Y3
Data
Outputs
Y4
11
10
Y5
G1
6
9
Y6
Enable
Inputs
4
G2A
5
7
Y7
G2B
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
3
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291T – MARCH 1993 – REVISED JULY 2005
www.ti.com
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply voltage range
Input voltage range
(2)
Output voltage range
(2) (3)
Input clamp current
Output clamp current
Continuous output current
Continuous current through V
CC
or GND
D package
(4)
DB package
(4)
DGV package
(4)
θ
JA
Package thermal impedance
GQN/ZQN
package
(4)
NS package
(4)
PW package
(4)
RGY package
(5)
T
stg
(1)
(2)
(3)
(4)
(5)
Storage temperature range
–65
V
I
< 0
V
O
< 0
–0.5
–0.5
–0.5
MAX
6.5
6.5
V
CC
+ 0.5
–50
–50
±50
±100
73
82
120
78
64
108
39
150
°C
°C/W
UNIT
V
V
V
mA
mA
mA
mA
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of V
CC
is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
4
www.ti.com
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291T – MARCH 1993 – REVISED JULY 2005
Recommended Operating Conditions
(1)
SN54LVC138A
MIN
V
CC
Supply voltage
Operating
Data retention only
V
CC
= 1.65 V to 1.95 V
V
IH
High-level input voltage
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 1.65 V to 1.95 V
V
IL
V
I
V
O
Low-level input voltage
Input voltage
Output voltage
V
CC
= 1.65 V
I
OH
High-level output current
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3 V
V
CC
= 1.65 V
I
OL
Low-level output current
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3 V
∆t/∆v
Input transition rise or fall rate
T
A
(1)
Operating free-air temperature
–55
12
24
10
125
-40
–12
–24
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
0
0
0.8
5.5
V
CC
0
0
2
2
1.5
MAX
3.6
SN74LVC138A
MIN
1.65
1.5
0.65
×
V
CC
1.7
2
0.35
×
V
CC
0.7
0.8
5.5
V
CC
–4
–8
–12
–24
4
8
12
24
10
85
ns/V
°C
mA
mA
V
V
V
V
MAX
3.6
UNIT
V
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
5
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